xref: /llvm-project/llvm/test/Transforms/LoopVectorize/vplan-printing-outer-loop.ll (revision 6383a12e3b4339fa4743bb97da4d51dea6d2e2ea)
1; REQUIRES: asserts
2
3; RUN: opt -passes=loop-vectorize -pass-remarks=loop-vectorize -enable-vplan-native-path -debug -disable-output %s 2>&1 | FileCheck %s
4
5@arr2 = external global [8 x i64], align 16
6@arr = external global [8 x [8 x i64]], align 16
7
8define void @foo(i64 %n) {
9; CHECK:      VPlan 'HCFGBuilder: Plain CFG
10; CHECK-NEXT: {
11; CHECK-NEXT: Live-in vp<[[VTC:%.+]]> = vector-trip-count
12; CHECK-NEXT: Live-in ir<8> = original trip-count
13; CHECK-EMPTY:
14; CHECK-NEXT: ir-bb<entry>:
15; CHECK-NEXT: Successor(s): vector.ph
16; CHECK-EMPTY:
17; CHECK-NEXT: vector.ph:
18; CHECK-NEXT: Successor(s): vector loop
19; CHECK-EMPTY:
20; CHECK-NEXT: <x1> vector loop: {
21; CHECK-NEXT:   vector.body:
22; CHECK-NEXT:     WIDEN-PHI ir<%outer.iv> = phi ir<0>, ir<%outer.iv.next>
23; CHECK-NEXT:     EMIT ir<%gep.1> = getelementptr ir<@arr2>, ir<0>, ir<%outer.iv>
24; CHECK-NEXT:     EMIT store ir<%outer.iv>, ir<%gep.1>
25; CHECK-NEXT:     EMIT ir<%add> = add ir<%outer.iv>, ir<%n>
26; CHECK-NEXT:   Successor(s): inner
27; CHECK-EMPTY:
28; CHECK-NEXT:   <x1> inner: {
29; CHECK-NEXT:     inner:
30; CHECK-NEXT:       WIDEN-PHI ir<%inner.iv> = phi ir<0>, ir<%inner.iv.next>
31; CHECK-NEXT:       EMIT ir<%gep.2> = getelementptr ir<@arr>, ir<0>, ir<%inner.iv>, ir<%outer.iv>
32; CHECK-NEXT:       EMIT store ir<%add>, ir<%gep.2>
33; CHECK-NEXT:       EMIT ir<%inner.iv.next> = add ir<%inner.iv>, ir<1>
34; CHECK-NEXT:       EMIT ir<%inner.ec> = icmp ir<%inner.iv.next>, ir<8>
35; CHECK-NEXT:       EMIT branch-on-cond ir<%inner.ec>
36; CHECK-NEXT:   No successors
37; CHECK-NEXT:  }
38; CHECK-NEXT:  Successor(s): outer.latch
39; CHECK-EMPTY:
40; CHECK-NEXT:  outer.latch:
41; CHECK-NEXT:     EMIT ir<%outer.iv.next> = add ir<%outer.iv>, ir<1>
42; CHECK-NEXT:     EMIT ir<%outer.ec> = icmp ir<%outer.iv.next>, ir<8>
43; CHECK-NEXT:  Successor(s): vector.latch
44; CHECK-EMPTY:
45; CHECK-NEXT:   vector.latch:
46; CHECK-NEXT:   No successors
47; CHECK-NEXT:  }
48; CHECK-NEXT: Successor(s): middle.block
49; CHECK-EMPTY:
50; CHECK-NEXT: middle.block:
51; CHECK-NEXT:   EMIT vp<[[C:%.+]]> = icmp eq ir<8>, vp<[[VTC]]>
52; CHECK-NEXT:   EMIT branch-on-cond vp<[[C]]>
53; CHECK-NEXT: Successor(s): ir-bb<exit>, scalar.ph
54; CHECK-EMPTY:
55; CHECK-NEXT: scalar.ph:
56; CHECK-NEXT: Successor(s): ir-bb<outer.header>
57; CHECK-EMPTY:
58; CHECK-NEXT: ir-bb<outer.header>:
59; CHECK-NEXT:   IR   %outer.iv = phi i64 [ 0, %entry ], [ %outer.iv.next, %outer.latch ]
60; CHECK-NEXT:   IR   %gep.1 = getelementptr inbounds [8 x i64], ptr @arr2, i64 0, i64 %outer.iv
61; CHECK-NEXT:   IR   store i64 %outer.iv, ptr %gep.1, align 4
62; CHECK-NEXT:   IR   %add = add nsw i64 %outer.iv, %n
63; CHECK-NEXT: No successors
64; CHECK-EMPTY:
65; CHECK-NEXT: ir-bb<exit>:
66; CHECK-NEXT: No successors
67; CHECK-NEXT: }
68entry:
69  br label %outer.header
70
71outer.header:
72  %outer.iv = phi i64 [ 0, %entry ], [ %outer.iv.next, %outer.latch ]
73  %gep.1 = getelementptr inbounds [8 x i64], ptr @arr2, i64 0, i64 %outer.iv
74  store i64 %outer.iv, ptr %gep.1, align 4
75  %add = add nsw i64 %outer.iv, %n
76  br label %inner
77
78inner:
79  %inner.iv = phi i64 [ 0, %outer.header ], [ %inner.iv.next, %inner ]
80  %gep.2 = getelementptr inbounds [8 x [8 x i64]], ptr @arr, i64 0, i64 %inner.iv, i64 %outer.iv
81  store i64 %add, ptr %gep.2, align 4
82  %inner.iv.next = add nuw nsw i64 %inner.iv, 1
83  %inner.ec = icmp eq i64 %inner.iv.next, 8
84  br i1 %inner.ec, label %outer.latch, label %inner
85
86outer.latch:
87  %outer.iv.next = add nuw nsw i64 %outer.iv, 1
88  %outer.ec = icmp eq i64 %outer.iv.next, 8
89  br i1 %outer.ec, label %exit, label %outer.header, !llvm.loop !1
90
91exit:
92  ret void
93}
94
95; CHECK: remark: <unknown>:0:0: vectorized outer loop (vectorization width: 4, interleaved count: 1)
96
97!1 = distinct !{!1, !2, !3}
98!2 = !{!"llvm.loop.vectorize.width", i32 4}
99!3 = !{!"llvm.loop.vectorize.enable", i1 true}
100