1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 2; RUN: opt < %s -passes=loop-vectorize -force-vector-interleave=1 -force-vector-width=4 -S | FileCheck %s 3target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128" 4 5 6; Function Attrs: nofree norecurse nounwind 7define void @a(ptr readnone %b) { 8; CHECK-LABEL: @a( 9; CHECK-NEXT: entry: 10; CHECK-NEXT: [[B1:%.*]] = ptrtoint ptr [[B:%.*]] to i64 11; CHECK-NEXT: [[CMP_NOT4:%.*]] = icmp eq ptr [[B]], null 12; CHECK-NEXT: br i1 [[CMP_NOT4]], label [[FOR_COND_CLEANUP:%.*]], label [[FOR_BODY_PREHEADER:%.*]] 13; CHECK: for.body.preheader: 14; CHECK-NEXT: [[TMP0:%.*]] = sub i64 0, [[B1]] 15; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[TMP0]], 4 16; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] 17; CHECK: vector.ph: 18; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[TMP0]], 4 19; CHECK-NEXT: [[N_VEC:%.*]] = sub i64 [[TMP0]], [[N_MOD_VF]] 20; CHECK-NEXT: [[TMP1:%.*]] = mul i64 [[N_VEC]], -1 21; CHECK-NEXT: [[IND_END:%.*]] = getelementptr i8, ptr null, i64 [[TMP1]] 22; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] 23; CHECK: vector.body: 24; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[PRED_STORE_CONTINUE10:%.*]] ] 25; CHECK-NEXT: [[TMP2:%.*]] = add i64 [[INDEX]], 0 26; CHECK-NEXT: [[TMP3:%.*]] = mul i64 [[TMP2]], -1 27; CHECK-NEXT: [[NEXT_GEP:%.*]] = getelementptr i8, ptr null, i64 [[TMP3]] 28; CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds i8, ptr [[NEXT_GEP]], i64 -1 29; CHECK-NEXT: [[TMP5:%.*]] = getelementptr inbounds i8, ptr [[TMP4]], i32 0 30; CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds i8, ptr [[TMP5]], i32 -3 31; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <4 x i8>, ptr [[TMP6]], align 1 32; CHECK-NEXT: [[REVERSE:%.*]] = shufflevector <4 x i8> [[WIDE_LOAD]], <4 x i8> poison, <4 x i32> <i32 3, i32 2, i32 1, i32 0> 33; CHECK-NEXT: [[TMP7:%.*]] = icmp eq <4 x i8> [[REVERSE]], zeroinitializer 34; CHECK-NEXT: [[TMP8:%.*]] = xor <4 x i1> [[TMP7]], <i1 true, i1 true, i1 true, i1 true> 35; CHECK-NEXT: [[TMP9:%.*]] = extractelement <4 x i1> [[TMP8]], i32 0 36; CHECK-NEXT: br i1 [[TMP9]], label [[PRED_STORE_IF:%.*]], label [[PRED_STORE_CONTINUE:%.*]] 37; CHECK: pred.store.if: 38; CHECK-NEXT: [[TMP10:%.*]] = getelementptr inbounds i8, ptr [[NEXT_GEP]], i64 -1 39; CHECK-NEXT: store i8 95, ptr [[TMP10]], align 1 40; CHECK-NEXT: br label [[PRED_STORE_CONTINUE]] 41; CHECK: pred.store.continue: 42; CHECK-NEXT: [[TMP11:%.*]] = extractelement <4 x i1> [[TMP8]], i32 1 43; CHECK-NEXT: br i1 [[TMP11]], label [[PRED_STORE_IF5:%.*]], label [[PRED_STORE_CONTINUE6:%.*]] 44; CHECK: pred.store.if5: 45; CHECK-NEXT: [[TMP12:%.*]] = add i64 [[INDEX]], 1 46; CHECK-NEXT: [[TMP13:%.*]] = mul i64 [[TMP12]], -1 47; CHECK-NEXT: [[NEXT_GEP2:%.*]] = getelementptr i8, ptr null, i64 [[TMP13]] 48; CHECK-NEXT: [[TMP14:%.*]] = getelementptr inbounds i8, ptr [[NEXT_GEP2]], i64 -1 49; CHECK-NEXT: store i8 95, ptr [[TMP14]], align 1 50; CHECK-NEXT: br label [[PRED_STORE_CONTINUE6]] 51; CHECK: pred.store.continue6: 52; CHECK-NEXT: [[TMP15:%.*]] = extractelement <4 x i1> [[TMP8]], i32 2 53; CHECK-NEXT: br i1 [[TMP15]], label [[PRED_STORE_IF7:%.*]], label [[PRED_STORE_CONTINUE8:%.*]] 54; CHECK: pred.store.if7: 55; CHECK-NEXT: [[TMP16:%.*]] = add i64 [[INDEX]], 2 56; CHECK-NEXT: [[TMP17:%.*]] = mul i64 [[TMP16]], -1 57; CHECK-NEXT: [[NEXT_GEP3:%.*]] = getelementptr i8, ptr null, i64 [[TMP17]] 58; CHECK-NEXT: [[TMP18:%.*]] = getelementptr inbounds i8, ptr [[NEXT_GEP3]], i64 -1 59; CHECK-NEXT: store i8 95, ptr [[TMP18]], align 1 60; CHECK-NEXT: br label [[PRED_STORE_CONTINUE8]] 61; CHECK: pred.store.continue8: 62; CHECK-NEXT: [[TMP19:%.*]] = extractelement <4 x i1> [[TMP8]], i32 3 63; CHECK-NEXT: br i1 [[TMP19]], label [[PRED_STORE_IF9:%.*]], label [[PRED_STORE_CONTINUE10]] 64; CHECK: pred.store.if9: 65; CHECK-NEXT: [[TMP20:%.*]] = add i64 [[INDEX]], 3 66; CHECK-NEXT: [[TMP21:%.*]] = mul i64 [[TMP20]], -1 67; CHECK-NEXT: [[NEXT_GEP4:%.*]] = getelementptr i8, ptr null, i64 [[TMP21]] 68; CHECK-NEXT: [[TMP22:%.*]] = getelementptr inbounds i8, ptr [[NEXT_GEP4]], i64 -1 69; CHECK-NEXT: store i8 95, ptr [[TMP22]], align 1 70; CHECK-NEXT: br label [[PRED_STORE_CONTINUE10]] 71; CHECK: pred.store.continue10: 72; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4 73; CHECK-NEXT: [[TMP23:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]] 74; CHECK-NEXT: br i1 [[TMP23]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]] 75; CHECK: middle.block: 76; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[TMP0]], [[N_VEC]] 77; CHECK-NEXT: br i1 [[CMP_N]], label [[FOR_COND_CLEANUP_LOOPEXIT:%.*]], label [[SCALAR_PH]] 78; CHECK: scalar.ph: 79; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi ptr [ [[IND_END]], [[MIDDLE_BLOCK]] ], [ null, [[FOR_BODY_PREHEADER]] ] 80; CHECK-NEXT: br label [[FOR_BODY:%.*]] 81; CHECK: for.cond.cleanup.loopexit: 82; CHECK-NEXT: br label [[FOR_COND_CLEANUP]] 83; CHECK: for.cond.cleanup: 84; CHECK-NEXT: ret void 85; CHECK: for.body: 86; CHECK-NEXT: [[C_05:%.*]] = phi ptr [ [[INCDEC_PTR:%.*]], [[IF_END:%.*]] ], [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ] 87; CHECK-NEXT: [[INCDEC_PTR]] = getelementptr inbounds i8, ptr [[C_05]], i64 -1 88; CHECK-NEXT: [[TMP24:%.*]] = load i8, ptr [[INCDEC_PTR]], align 1 89; CHECK-NEXT: [[TOBOOL_NOT:%.*]] = icmp eq i8 [[TMP24]], 0 90; CHECK-NEXT: br i1 [[TOBOOL_NOT]], label [[IF_END]], label [[IF_THEN:%.*]] 91; CHECK: if.then: 92; CHECK-NEXT: store i8 95, ptr [[INCDEC_PTR]], align 1 93; CHECK-NEXT: br label [[IF_END]] 94; CHECK: if.end: 95; CHECK-NEXT: [[CMP_NOT:%.*]] = icmp eq ptr [[INCDEC_PTR]], [[B]] 96; CHECK-NEXT: br i1 [[CMP_NOT]], label [[FOR_COND_CLEANUP_LOOPEXIT]], label [[FOR_BODY]], !llvm.loop [[LOOP2:![0-9]+]] 97; 98 99entry: 100 %cmp.not4 = icmp eq ptr %b, null 101 br i1 %cmp.not4, label %for.cond.cleanup, label %for.body.preheader 102 103for.body.preheader: ; preds = %entry 104 br label %for.body 105 106for.cond.cleanup.loopexit: ; preds = %if.end 107 br label %for.cond.cleanup 108 109for.cond.cleanup: ; preds = %for.cond.cleanup.loopexit, %entry 110 ret void 111 112for.body: ; preds = %for.body.preheader, %if.end 113 %c.05 = phi ptr [ %incdec.ptr, %if.end ], [ null, %for.body.preheader ] 114 %incdec.ptr = getelementptr inbounds i8, ptr %c.05, i64 -1 115 %0 = load i8, ptr %incdec.ptr, align 1 116 %tobool.not = icmp eq i8 %0, 0 117 br i1 %tobool.not, label %if.end, label %if.then 118 119if.then: ; preds = %for.body 120 store i8 95, ptr %incdec.ptr, align 1 121 br label %if.end 122 123if.end: ; preds = %for.body, %if.then 124 %cmp.not = icmp eq ptr %incdec.ptr, %b 125 br i1 %cmp.not, label %for.cond.cleanup.loopexit, label %for.body 126} 127 128; In the test below the pointer phi %ptr.iv.2 is used as 129; 1. As a uniform address for the load, and 130; 2. Non-uniform use by the getelementptr which is stored. This requires the 131; vector value. 132define void @pointer_induction_used_as_vector(ptr noalias %start.1, ptr noalias %start.2, i64 %N) { 133; CHECK-LABEL: @pointer_induction_used_as_vector( 134; CHECK-NEXT: entry: 135; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[N:%.*]], 4 136; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] 137; CHECK: vector.ph: 138; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[N]], 4 139; CHECK-NEXT: [[N_VEC:%.*]] = sub i64 [[N]], [[N_MOD_VF]] 140; CHECK-NEXT: [[TMP0:%.*]] = mul i64 [[N_VEC]], 8 141; CHECK-NEXT: [[IND_END:%.*]] = getelementptr i8, ptr [[START_1:%.*]], i64 [[TMP0]] 142; CHECK-NEXT: [[IND_END2:%.*]] = getelementptr i8, ptr [[START_2:%.*]], i64 [[N_VEC]] 143; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] 144; CHECK: vector.body: 145; CHECK-NEXT: [[POINTER_PHI:%.*]] = phi ptr [ [[START_2]], [[VECTOR_PH]] ], [ [[PTR_IND:%.*]], [[VECTOR_BODY]] ] 146; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] 147; CHECK-NEXT: [[TMP1:%.*]] = add i64 [[INDEX]], 0 148; CHECK-NEXT: [[TMP2:%.*]] = mul i64 [[TMP1]], 8 149; CHECK-NEXT: [[NEXT_GEP:%.*]] = getelementptr i8, ptr [[START_1]], i64 [[TMP2]] 150; CHECK-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[POINTER_PHI]], <4 x i64> <i64 0, i64 1, i64 2, i64 3> 151; CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds i8, <4 x ptr> [[TMP3]], i64 1 152; CHECK-NEXT: [[TMP5:%.*]] = getelementptr ptr, ptr [[NEXT_GEP]], i32 0 153; CHECK-NEXT: store <4 x ptr> [[TMP4]], ptr [[TMP5]], align 8 154; CHECK-NEXT: [[TMP6:%.*]] = extractelement <4 x ptr> [[TMP3]], i32 0 155; CHECK-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP6]], i32 0 156; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <4 x i8>, ptr [[TMP7]], align 1 157; CHECK-NEXT: [[TMP8:%.*]] = add <4 x i8> [[WIDE_LOAD]], <i8 1, i8 1, i8 1, i8 1> 158; CHECK-NEXT: store <4 x i8> [[TMP8]], ptr [[TMP7]], align 1 159; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4 160; CHECK-NEXT: [[PTR_IND]] = getelementptr i8, ptr [[POINTER_PHI]], i64 4 161; CHECK-NEXT: [[TMP9:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]] 162; CHECK-NEXT: br i1 [[TMP9]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP4:![0-9]+]] 163; CHECK: middle.block: 164; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[N]], [[N_VEC]] 165; CHECK-NEXT: br i1 [[CMP_N]], label [[EXIT:%.*]], label [[SCALAR_PH]] 166; CHECK: scalar.ph: 167; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], [[MIDDLE_BLOCK]] ], [ 0, [[ENTRY:%.*]] ] 168; CHECK-NEXT: [[BC_RESUME_VAL1:%.*]] = phi ptr [ [[IND_END]], [[MIDDLE_BLOCK]] ], [ [[START_1]], [[ENTRY]] ] 169; CHECK-NEXT: [[BC_RESUME_VAL3:%.*]] = phi ptr [ [[IND_END2]], [[MIDDLE_BLOCK]] ], [ [[START_2]], [[ENTRY]] ] 170; CHECK-NEXT: br label [[LOOP_BODY:%.*]] 171; CHECK: loop.body: 172; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], [[LOOP_BODY]] ] 173; CHECK-NEXT: [[PTR_IV_1:%.*]] = phi ptr [ [[BC_RESUME_VAL1]], [[SCALAR_PH]] ], [ [[PTR_IV_1_NEXT:%.*]], [[LOOP_BODY]] ] 174; CHECK-NEXT: [[PTR_IV_2:%.*]] = phi ptr [ [[BC_RESUME_VAL3]], [[SCALAR_PH]] ], [ [[PTR_IV_2_NEXT:%.*]], [[LOOP_BODY]] ] 175; CHECK-NEXT: [[PTR_IV_1_NEXT]] = getelementptr inbounds ptr, ptr [[PTR_IV_1]], i64 1 176; CHECK-NEXT: [[PTR_IV_2_NEXT]] = getelementptr inbounds i8, ptr [[PTR_IV_2]], i64 1 177; CHECK-NEXT: store ptr [[PTR_IV_2_NEXT]], ptr [[PTR_IV_1]], align 8 178; CHECK-NEXT: [[LV:%.*]] = load i8, ptr [[PTR_IV_2]], align 1 179; CHECK-NEXT: [[ADD:%.*]] = add i8 [[LV]], 1 180; CHECK-NEXT: store i8 [[ADD]], ptr [[PTR_IV_2]], align 1 181; CHECK-NEXT: [[IV_NEXT]] = add nuw i64 [[IV]], 1 182; CHECK-NEXT: [[C:%.*]] = icmp ne i64 [[IV_NEXT]], [[N]] 183; CHECK-NEXT: br i1 [[C]], label [[LOOP_BODY]], label [[EXIT]], !llvm.loop [[LOOP5:![0-9]+]] 184; CHECK: exit: 185; CHECK-NEXT: ret void 186; 187 188entry: 189 br label %loop.body 190 191loop.body: ; preds = %loop.body, %entry 192 %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop.body ] 193 %ptr.iv.1 = phi ptr [ %start.1, %entry ], [ %ptr.iv.1.next, %loop.body ] 194 %ptr.iv.2 = phi ptr [ %start.2, %entry ], [ %ptr.iv.2.next, %loop.body ] 195 %ptr.iv.1.next = getelementptr inbounds ptr, ptr %ptr.iv.1, i64 1 196 %ptr.iv.2.next = getelementptr inbounds i8, ptr %ptr.iv.2, i64 1 197 store ptr %ptr.iv.2.next, ptr %ptr.iv.1, align 8 198 %lv = load i8, ptr %ptr.iv.2, align 1 199 %add = add i8 %lv, 1 200 store i8 %add, ptr %ptr.iv.2, align 1 201 %iv.next = add nuw i64 %iv, 1 202 %c = icmp ne i64 %iv.next, %N 203 br i1 %c, label %loop.body, label %exit 204 205exit: ; preds = %loop.body 206 ret void 207} 208