1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 2; RUN: opt -S -passes='require<profile-summary>,function(codegenprepare)' -mtriple=riscv32 %s \ 3; RUN: | FileCheck --check-prefixes=CHECK,NOZBS %s 4; RUN: opt -S -passes='require<profile-summary>,function(codegenprepare)' -mtriple=riscv32 -mattr=+zbs %s \ 5; RUN: | FileCheck --check-prefixes=CHECK,ZBS %s 6; RUN: opt -S -passes='require<profile-summary>,function(codegenprepare)' -mtriple=riscv64 %s \ 7; RUN: | FileCheck --check-prefixes=CHECK,NOZBS %s 8; RUN: opt -S -passes='require<profile-summary>,function(codegenprepare)' -mtriple=riscv64 -mattr=zbs %s \ 9; RUN: | FileCheck --check-prefixes=CHECK,ZBS %s 10 11@A = global i32 zeroinitializer 12 13; And should be sunk when Zbs is present and the mask doesn't fit in ANDI's 14; immediate. 15define i32 @and_sink1(i32 %a, i1 %c) { 16; NOZBS-LABEL: @and_sink1( 17; NOZBS-NEXT: [[AND:%.*]] = and i32 [[A:%.*]], 2048 18; NOZBS-NEXT: br label [[BB0:%.*]] 19; NOZBS: bb0: 20; NOZBS-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], 0 21; NOZBS-NEXT: store i32 0, ptr @A, align 4 22; NOZBS-NEXT: br i1 [[CMP]], label [[BB0]], label [[BB2:%.*]] 23; NOZBS: bb2: 24; NOZBS-NEXT: ret i32 0 25; 26; ZBS-LABEL: @and_sink1( 27; ZBS-NEXT: br label [[BB0:%.*]] 28; ZBS: bb0: 29; ZBS-NEXT: [[TMP1:%.*]] = and i32 [[A:%.*]], 2048 30; ZBS-NEXT: [[CMP:%.*]] = icmp eq i32 [[TMP1]], 0 31; ZBS-NEXT: store i32 0, ptr @A, align 4 32; ZBS-NEXT: br i1 [[CMP]], label [[BB0]], label [[BB2:%.*]] 33; ZBS: bb2: 34; ZBS-NEXT: ret i32 0 35; 36 %and = and i32 %a, 2048 37 br label %bb0 38bb0: 39 %cmp = icmp eq i32 %and, 0 40 store i32 0, ptr @A 41 br i1 %cmp, label %bb0, label %bb2 42bb2: 43 ret i32 0 44} 45 46; Don't sink when the mask has more than 1 bit set. 47define i32 @and_sink2(i32 %a) { 48; CHECK-LABEL: @and_sink2( 49; CHECK-NEXT: [[AND:%.*]] = and i32 [[A:%.*]], 2049 50; CHECK-NEXT: br label [[BB0:%.*]] 51; CHECK: bb0: 52; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], 0 53; CHECK-NEXT: store i32 0, ptr @A, align 4 54; CHECK-NEXT: br i1 [[CMP]], label [[BB0]], label [[BB2:%.*]] 55; CHECK: bb2: 56; CHECK-NEXT: ret i32 0 57; 58 %and = and i32 %a, 2049 59 br label %bb0 60bb0: 61 %cmp = icmp eq i32 %and, 0 62 store i32 0, ptr @A 63 br i1 %cmp, label %bb0, label %bb2 64bb2: 65 ret i32 0 66} 67 68; Don't sink when the mask fits in ANDI's immediate. 69define i32 @and_sink3(i32 %a) { 70; CHECK-LABEL: @and_sink3( 71; CHECK-NEXT: [[AND:%.*]] = and i32 [[A:%.*]], 1024 72; CHECK-NEXT: br label [[BB0:%.*]] 73; CHECK: bb0: 74; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], 0 75; CHECK-NEXT: store i32 0, ptr @A, align 4 76; CHECK-NEXT: br i1 [[CMP]], label [[BB0]], label [[BB2:%.*]] 77; CHECK: bb2: 78; CHECK-NEXT: ret i32 0 79; 80 %and = and i32 %a, 1024 81 br label %bb0 82bb0: 83 %cmp = icmp eq i32 %and, 0 84 store i32 0, ptr @A 85 br i1 %cmp, label %bb0, label %bb2 86bb2: 87 ret i32 0 88} 89