1; RUN: opt < %s -msan-check-access-address=0 -S -passes=msan 2>&1 | FileCheck %s 2; REQUIRES: x86-registered-target 3 4target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128" 5target triple = "x86_64-unknown-linux-gnu" 6 7declare i32 @llvm.x86.bmi.bzhi.32(i32, i32) 8declare i32 @llvm.x86.bmi.bextr.32(i32, i32) 9declare i32 @llvm.x86.bmi.pdep.32(i32, i32) 10declare i32 @llvm.x86.bmi.pext.32(i32, i32) 11 12declare i64 @llvm.x86.bmi.bzhi.64(i64, i64) 13declare i64 @llvm.x86.bmi.bextr.64(i64, i64) 14declare i64 @llvm.x86.bmi.pdep.64(i64, i64) 15declare i64 @llvm.x86.bmi.pext.64(i64, i64) 16 17define i32 @Test_bzhi_32(i32 %a, i32 %b) sanitize_memory { 18entry: 19 %c = tail call i32 @llvm.x86.bmi.bzhi.32(i32 %a, i32 %b) 20 ret i32 %c 21} 22 23; CHECK-LABEL: @Test_bzhi_32( 24; CHECK-DAG: %[[SA:.*]] = load i32, ptr @__msan_param_tls 25; CHECK-DAG: %[[SB:.*]] = load i32, {{.*}}@__msan_param_tls to i64), i64 8) 26; CHECK-DAG: %[[SB0:.*]] = icmp ne i32 %[[SB]], 0 27; CHECK-DAG: %[[SB1:.*]] = sext i1 %[[SB0]] to i32 28; CHECK-DAG: %[[X:.*]] = call i32 @llvm.x86.bmi.bzhi.32(i32 %[[SA]], i32 %b) 29; CHECK-DAG: %[[S:.*]] = or i32 %[[SB1]], %[[X]] 30; CHECK-DAG: store i32 %[[S]], {{.*}}@__msan_retval_tls 31; CHECK: ret i32 32 33define i64 @Test_bzhi_64(i64 %a, i64 %b) sanitize_memory { 34entry: 35 %c = tail call i64 @llvm.x86.bmi.bzhi.64(i64 %a, i64 %b) 36 ret i64 %c 37} 38 39; CHECK-LABEL: @Test_bzhi_64( 40; CHECK-DAG: %[[SA:.*]] = load i64, ptr @__msan_param_tls 41; CHECK-DAG: %[[SB:.*]] = load i64, {{.*}}@__msan_param_tls to i64), i64 8) 42; CHECK-DAG: %[[SB0:.*]] = icmp ne i64 %[[SB]], 0 43; CHECK-DAG: %[[SB1:.*]] = sext i1 %[[SB0]] to i64 44; CHECK-DAG: %[[X:.*]] = call i64 @llvm.x86.bmi.bzhi.64(i64 %[[SA]], i64 %b) 45; CHECK-DAG: %[[S:.*]] = or i64 %[[SB1]], %[[X]] 46; CHECK-DAG: store i64 %[[S]], {{.*}}@__msan_retval_tls 47; CHECK: ret i64 48 49 50define i32 @Test_bextr_32(i32 %a, i32 %b) sanitize_memory { 51entry: 52 %c = tail call i32 @llvm.x86.bmi.bextr.32(i32 %a, i32 %b) 53 ret i32 %c 54} 55 56; CHECK-LABEL: @Test_bextr_32( 57; CHECK-DAG: %[[SA:.*]] = load i32, ptr @__msan_param_tls 58; CHECK-DAG: %[[SB:.*]] = load i32, {{.*}}@__msan_param_tls to i64), i64 8) 59; CHECK-DAG: %[[SB0:.*]] = icmp ne i32 %[[SB]], 0 60; CHECK-DAG: %[[SB1:.*]] = sext i1 %[[SB0]] to i32 61; CHECK-DAG: %[[X:.*]] = call i32 @llvm.x86.bmi.bextr.32(i32 %[[SA]], i32 %b) 62; CHECK-DAG: %[[S:.*]] = or i32 %[[SB1]], %[[X]] 63; CHECK-DAG: store i32 %[[S]], {{.*}}@__msan_retval_tls 64; CHECK: ret i32 65 66define i64 @Test_bextr_64(i64 %a, i64 %b) sanitize_memory { 67entry: 68 %c = tail call i64 @llvm.x86.bmi.bextr.64(i64 %a, i64 %b) 69 ret i64 %c 70} 71 72; CHECK-LABEL: @Test_bextr_64( 73; CHECK-DAG: %[[SA:.*]] = load i64, ptr @__msan_param_tls 74; CHECK-DAG: %[[SB:.*]] = load i64, {{.*}}@__msan_param_tls to i64), i64 8) 75; CHECK-DAG: %[[SB0:.*]] = icmp ne i64 %[[SB]], 0 76; CHECK-DAG: %[[SB1:.*]] = sext i1 %[[SB0]] to i64 77; CHECK-DAG: %[[X:.*]] = call i64 @llvm.x86.bmi.bextr.64(i64 %[[SA]], i64 %b) 78; CHECK-DAG: %[[S:.*]] = or i64 %[[SB1]], %[[X]] 79; CHECK-DAG: store i64 %[[S]], {{.*}}@__msan_retval_tls 80; CHECK: ret i64 81 82 83define i32 @Test_pdep_32(i32 %a, i32 %b) sanitize_memory { 84entry: 85 %c = tail call i32 @llvm.x86.bmi.pdep.32(i32 %a, i32 %b) 86 ret i32 %c 87} 88 89; CHECK-LABEL: @Test_pdep_32( 90; CHECK-DAG: %[[SA:.*]] = load i32, ptr @__msan_param_tls 91; CHECK-DAG: %[[SB:.*]] = load i32, {{.*}}@__msan_param_tls to i64), i64 8) 92; CHECK-DAG: %[[SB0:.*]] = icmp ne i32 %[[SB]], 0 93; CHECK-DAG: %[[SB1:.*]] = sext i1 %[[SB0]] to i32 94; CHECK-DAG: %[[X:.*]] = call i32 @llvm.x86.bmi.pdep.32(i32 %[[SA]], i32 %b) 95; CHECK-DAG: %[[S:.*]] = or i32 %[[SB1]], %[[X]] 96; CHECK-DAG: store i32 %[[S]], {{.*}}@__msan_retval_tls 97; CHECK: ret i32 98 99define i64 @Test_pdep_64(i64 %a, i64 %b) sanitize_memory { 100entry: 101 %c = tail call i64 @llvm.x86.bmi.pdep.64(i64 %a, i64 %b) 102 ret i64 %c 103} 104 105; CHECK-LABEL: @Test_pdep_64( 106; CHECK-DAG: %[[SA:.*]] = load i64, ptr @__msan_param_tls 107; CHECK-DAG: %[[SB:.*]] = load i64, {{.*}}@__msan_param_tls to i64), i64 8) 108; CHECK-DAG: %[[SB0:.*]] = icmp ne i64 %[[SB]], 0 109; CHECK-DAG: %[[SB1:.*]] = sext i1 %[[SB0]] to i64 110; CHECK-DAG: %[[X:.*]] = call i64 @llvm.x86.bmi.pdep.64(i64 %[[SA]], i64 %b) 111; CHECK-DAG: %[[S:.*]] = or i64 %[[SB1]], %[[X]] 112; CHECK-DAG: store i64 %[[S]], {{.*}}@__msan_retval_tls 113; CHECK: ret i64 114 115define i32 @Test_pext_32(i32 %a, i32 %b) sanitize_memory { 116entry: 117 %c = tail call i32 @llvm.x86.bmi.pext.32(i32 %a, i32 %b) 118 ret i32 %c 119} 120 121; CHECK-LABEL: @Test_pext_32( 122; CHECK-DAG: %[[SA:.*]] = load i32, ptr @__msan_param_tls 123; CHECK-DAG: %[[SB:.*]] = load i32, {{.*}}@__msan_param_tls to i64), i64 8) 124; CHECK-DAG: %[[SB0:.*]] = icmp ne i32 %[[SB]], 0 125; CHECK-DAG: %[[SB1:.*]] = sext i1 %[[SB0]] to i32 126; CHECK-DAG: %[[X:.*]] = call i32 @llvm.x86.bmi.pext.32(i32 %[[SA]], i32 %b) 127; CHECK-DAG: %[[S:.*]] = or i32 %[[SB1]], %[[X]] 128; CHECK-DAG: store i32 %[[S]], {{.*}}@__msan_retval_tls 129; CHECK: ret i32 130 131define i64 @Test_pext_64(i64 %a, i64 %b) sanitize_memory { 132entry: 133 %c = tail call i64 @llvm.x86.bmi.pext.64(i64 %a, i64 %b) 134 ret i64 %c 135} 136 137; CHECK-LABEL: @Test_pext_64( 138; CHECK-DAG: %[[SA:.*]] = load i64, ptr @__msan_param_tls 139; CHECK-DAG: %[[SB:.*]] = load i64, {{.*}}@__msan_param_tls to i64), i64 8) 140; CHECK-DAG: %[[SB0:.*]] = icmp ne i64 %[[SB]], 0 141; CHECK-DAG: %[[SB1:.*]] = sext i1 %[[SB0]] to i64 142; CHECK-DAG: %[[X:.*]] = call i64 @llvm.x86.bmi.pext.64(i64 %[[SA]], i64 %b) 143; CHECK-DAG: %[[S:.*]] = or i64 %[[SB1]], %[[X]] 144; CHECK-DAG: store i64 %[[S]], {{.*}}@__msan_retval_tls 145; CHECK: ret i64 146