1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5 2; RUN: opt < %s -S -msan-kernel=1 -passes=msan -msan-origin-base=0x40000000 -msan-and-mask=0x80000000 2>&1 | FileCheck %s 3 4target datalayout = "e-m:e-i64:64-n32:64" 5target triple = "powerpcle--linux" 6 7define void @Store1(ptr %p, i8 %x) sanitize_memory { 8; CHECK-LABEL: define void @Store1( 9; CHECK-SAME: ptr [[P:%.*]], i8 [[X:%.*]]) #[[ATTR0:[0-9]+]] { 10; CHECK-NEXT: [[ENTRY:.*:]] 11; CHECK-NEXT: [[TMP0:%.*]] = call ptr @__msan_get_context_state() 12; CHECK-NEXT: [[PARAM_SHADOW:%.*]] = getelementptr { [100 x i64], [100 x i64], [100 x i64], [100 x i64], i64, [200 x i32], i32, i32 }, ptr [[TMP0]], i32 0, i32 0 13; CHECK-NEXT: [[RETVAL_SHADOW:%.*]] = getelementptr { [100 x i64], [100 x i64], [100 x i64], [100 x i64], i64, [200 x i32], i32, i32 }, ptr [[TMP0]], i32 0, i32 1 14; CHECK-NEXT: [[VA_ARG_SHADOW:%.*]] = getelementptr { [100 x i64], [100 x i64], [100 x i64], [100 x i64], i64, [200 x i32], i32, i32 }, ptr [[TMP0]], i32 0, i32 2 15; CHECK-NEXT: [[VA_ARG_ORIGIN:%.*]] = getelementptr { [100 x i64], [100 x i64], [100 x i64], [100 x i64], i64, [200 x i32], i32, i32 }, ptr [[TMP0]], i32 0, i32 3 16; CHECK-NEXT: [[VA_ARG_OVERFLOW_SIZE:%.*]] = getelementptr { [100 x i64], [100 x i64], [100 x i64], [100 x i64], i64, [200 x i32], i32, i32 }, ptr [[TMP0]], i32 0, i32 4 17; CHECK-NEXT: [[PARAM_ORIGIN:%.*]] = getelementptr { [100 x i64], [100 x i64], [100 x i64], [100 x i64], i64, [200 x i32], i32, i32 }, ptr [[TMP0]], i32 0, i32 5 18; CHECK-NEXT: [[RETVAL_ORIGIN:%.*]] = getelementptr { [100 x i64], [100 x i64], [100 x i64], [100 x i64], i64, [200 x i32], i32, i32 }, ptr [[TMP0]], i32 0, i32 6 19; CHECK-NEXT: [[TMP1:%.*]] = ptrtoint ptr [[PARAM_SHADOW]] to i64 20; CHECK-NEXT: [[_MSARG:%.*]] = inttoptr i64 [[TMP1]] to ptr 21; CHECK-NEXT: [[TMP2:%.*]] = load i64, ptr [[_MSARG]], align 8 22; CHECK-NEXT: [[TMP3:%.*]] = ptrtoint ptr [[PARAM_ORIGIN]] to i64 23; CHECK-NEXT: [[_MSARG_O:%.*]] = inttoptr i64 [[TMP3]] to ptr 24; CHECK-NEXT: [[TMP4:%.*]] = load i32, ptr [[_MSARG_O]], align 4 25; CHECK-NEXT: [[TMP5:%.*]] = load i64, ptr [[VA_ARG_OVERFLOW_SIZE]], align 8 26; CHECK-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[PARAM_SHADOW]] to i64 27; CHECK-NEXT: [[TMP8:%.*]] = add i64 [[TMP7]], 8 28; CHECK-NEXT: [[_MSARG1:%.*]] = inttoptr i64 [[TMP8]] to ptr 29; CHECK-NEXT: [[TMP9:%.*]] = load i8, ptr [[_MSARG1]], align 8 30; CHECK-NEXT: [[TMP10:%.*]] = ptrtoint ptr [[PARAM_ORIGIN]] to i64 31; CHECK-NEXT: [[TMP11:%.*]] = add i64 [[TMP10]], 8 32; CHECK-NEXT: [[_MSARG_O2:%.*]] = inttoptr i64 [[TMP11]] to ptr 33; CHECK-NEXT: [[TMP12:%.*]] = load i32, ptr [[_MSARG_O2]], align 4 34; CHECK-NEXT: call void @llvm.donothing() 35; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP2]], 0 36; CHECK-NEXT: br i1 [[_MSCMP]], label %[[BB12:.*]], label %[[BB13:.*]], !prof [[PROF1:![0-9]+]] 37; CHECK: [[BB12]]: 38; CHECK-NEXT: call void @__msan_warning(i32 [[TMP4]]) #[[ATTR2:[0-9]+]] 39; CHECK-NEXT: br label %[[BB13]] 40; CHECK: [[BB13]]: 41; CHECK-NEXT: [[TMP15:%.*]] = call { ptr, ptr } @__msan_metadata_ptr_for_store_1(ptr [[P]]) 42; CHECK-NEXT: [[TMP16:%.*]] = extractvalue { ptr, ptr } [[TMP15]], 0 43; CHECK-NEXT: [[TMP17:%.*]] = extractvalue { ptr, ptr } [[TMP15]], 1 44; CHECK-NEXT: store i8 [[TMP9]], ptr [[TMP16]], align 1 45; CHECK-NEXT: [[_MSCMP3:%.*]] = icmp ne i8 [[TMP9]], 0 46; CHECK-NEXT: br i1 [[_MSCMP3]], label %[[BB17:.*]], label %[[BB19:.*]], !prof [[PROF1]] 47; CHECK: [[BB17]]: 48; CHECK-NEXT: [[TMP19:%.*]] = call i32 @__msan_chain_origin(i32 [[TMP12]]) 49; CHECK-NEXT: store i32 [[TMP19]], ptr [[TMP17]], align 4 50; CHECK-NEXT: br label %[[BB19]] 51; CHECK: [[BB19]]: 52; CHECK-NEXT: store i8 [[X]], ptr [[P]], align 1 53; CHECK-NEXT: ret void 54; 55entry: 56 store i8 %x, ptr %p 57 ret void 58} 59 60 61define void @Store2(ptr %p, i16 %x) sanitize_memory { 62; CHECK-LABEL: define void @Store2( 63; CHECK-SAME: ptr [[P:%.*]], i16 [[X:%.*]]) #[[ATTR0]] { 64; CHECK-NEXT: [[ENTRY:.*:]] 65; CHECK-NEXT: [[TMP0:%.*]] = call ptr @__msan_get_context_state() 66; CHECK-NEXT: [[PARAM_SHADOW:%.*]] = getelementptr { [100 x i64], [100 x i64], [100 x i64], [100 x i64], i64, [200 x i32], i32, i32 }, ptr [[TMP0]], i32 0, i32 0 67; CHECK-NEXT: [[RETVAL_SHADOW:%.*]] = getelementptr { [100 x i64], [100 x i64], [100 x i64], [100 x i64], i64, [200 x i32], i32, i32 }, ptr [[TMP0]], i32 0, i32 1 68; CHECK-NEXT: [[VA_ARG_SHADOW:%.*]] = getelementptr { [100 x i64], [100 x i64], [100 x i64], [100 x i64], i64, [200 x i32], i32, i32 }, ptr [[TMP0]], i32 0, i32 2 69; CHECK-NEXT: [[VA_ARG_ORIGIN:%.*]] = getelementptr { [100 x i64], [100 x i64], [100 x i64], [100 x i64], i64, [200 x i32], i32, i32 }, ptr [[TMP0]], i32 0, i32 3 70; CHECK-NEXT: [[VA_ARG_OVERFLOW_SIZE:%.*]] = getelementptr { [100 x i64], [100 x i64], [100 x i64], [100 x i64], i64, [200 x i32], i32, i32 }, ptr [[TMP0]], i32 0, i32 4 71; CHECK-NEXT: [[PARAM_ORIGIN:%.*]] = getelementptr { [100 x i64], [100 x i64], [100 x i64], [100 x i64], i64, [200 x i32], i32, i32 }, ptr [[TMP0]], i32 0, i32 5 72; CHECK-NEXT: [[RETVAL_ORIGIN:%.*]] = getelementptr { [100 x i64], [100 x i64], [100 x i64], [100 x i64], i64, [200 x i32], i32, i32 }, ptr [[TMP0]], i32 0, i32 6 73; CHECK-NEXT: [[TMP1:%.*]] = ptrtoint ptr [[PARAM_SHADOW]] to i64 74; CHECK-NEXT: [[_MSARG:%.*]] = inttoptr i64 [[TMP1]] to ptr 75; CHECK-NEXT: [[TMP2:%.*]] = load i64, ptr [[_MSARG]], align 8 76; CHECK-NEXT: [[TMP3:%.*]] = ptrtoint ptr [[PARAM_ORIGIN]] to i64 77; CHECK-NEXT: [[_MSARG_O:%.*]] = inttoptr i64 [[TMP3]] to ptr 78; CHECK-NEXT: [[TMP4:%.*]] = load i32, ptr [[_MSARG_O]], align 4 79; CHECK-NEXT: [[TMP5:%.*]] = load i64, ptr [[VA_ARG_OVERFLOW_SIZE]], align 8 80; CHECK-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[PARAM_SHADOW]] to i64 81; CHECK-NEXT: [[TMP8:%.*]] = add i64 [[TMP7]], 8 82; CHECK-NEXT: [[_MSARG1:%.*]] = inttoptr i64 [[TMP8]] to ptr 83; CHECK-NEXT: [[TMP9:%.*]] = load i16, ptr [[_MSARG1]], align 8 84; CHECK-NEXT: [[TMP10:%.*]] = ptrtoint ptr [[PARAM_ORIGIN]] to i64 85; CHECK-NEXT: [[TMP11:%.*]] = add i64 [[TMP10]], 8 86; CHECK-NEXT: [[_MSARG_O2:%.*]] = inttoptr i64 [[TMP11]] to ptr 87; CHECK-NEXT: [[TMP12:%.*]] = load i32, ptr [[_MSARG_O2]], align 4 88; CHECK-NEXT: call void @llvm.donothing() 89; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP2]], 0 90; CHECK-NEXT: br i1 [[_MSCMP]], label %[[BB12:.*]], label %[[BB13:.*]], !prof [[PROF1]] 91; CHECK: [[BB12]]: 92; CHECK-NEXT: call void @__msan_warning(i32 [[TMP4]]) #[[ATTR2]] 93; CHECK-NEXT: br label %[[BB13]] 94; CHECK: [[BB13]]: 95; CHECK-NEXT: [[TMP15:%.*]] = call { ptr, ptr } @__msan_metadata_ptr_for_store_2(ptr [[P]]) 96; CHECK-NEXT: [[TMP16:%.*]] = extractvalue { ptr, ptr } [[TMP15]], 0 97; CHECK-NEXT: [[TMP17:%.*]] = extractvalue { ptr, ptr } [[TMP15]], 1 98; CHECK-NEXT: store i16 [[TMP9]], ptr [[TMP16]], align 2 99; CHECK-NEXT: [[_MSCMP3:%.*]] = icmp ne i16 [[TMP9]], 0 100; CHECK-NEXT: br i1 [[_MSCMP3]], label %[[BB17:.*]], label %[[BB19:.*]], !prof [[PROF1]] 101; CHECK: [[BB17]]: 102; CHECK-NEXT: [[TMP19:%.*]] = call i32 @__msan_chain_origin(i32 [[TMP12]]) 103; CHECK-NEXT: store i32 [[TMP19]], ptr [[TMP17]], align 4 104; CHECK-NEXT: br label %[[BB19]] 105; CHECK: [[BB19]]: 106; CHECK-NEXT: store i16 [[X]], ptr [[P]], align 2 107; CHECK-NEXT: ret void 108; 109entry: 110 store i16 %x, ptr %p 111 ret void 112} 113 114 115define void @Store4(ptr %p, i32 %x) sanitize_memory { 116; CHECK-LABEL: define void @Store4( 117; CHECK-SAME: ptr [[P:%.*]], i32 [[X:%.*]]) #[[ATTR0]] { 118; CHECK-NEXT: [[ENTRY:.*:]] 119; CHECK-NEXT: [[TMP0:%.*]] = call ptr @__msan_get_context_state() 120; CHECK-NEXT: [[PARAM_SHADOW:%.*]] = getelementptr { [100 x i64], [100 x i64], [100 x i64], [100 x i64], i64, [200 x i32], i32, i32 }, ptr [[TMP0]], i32 0, i32 0 121; CHECK-NEXT: [[RETVAL_SHADOW:%.*]] = getelementptr { [100 x i64], [100 x i64], [100 x i64], [100 x i64], i64, [200 x i32], i32, i32 }, ptr [[TMP0]], i32 0, i32 1 122; CHECK-NEXT: [[VA_ARG_SHADOW:%.*]] = getelementptr { [100 x i64], [100 x i64], [100 x i64], [100 x i64], i64, [200 x i32], i32, i32 }, ptr [[TMP0]], i32 0, i32 2 123; CHECK-NEXT: [[VA_ARG_ORIGIN:%.*]] = getelementptr { [100 x i64], [100 x i64], [100 x i64], [100 x i64], i64, [200 x i32], i32, i32 }, ptr [[TMP0]], i32 0, i32 3 124; CHECK-NEXT: [[VA_ARG_OVERFLOW_SIZE:%.*]] = getelementptr { [100 x i64], [100 x i64], [100 x i64], [100 x i64], i64, [200 x i32], i32, i32 }, ptr [[TMP0]], i32 0, i32 4 125; CHECK-NEXT: [[PARAM_ORIGIN:%.*]] = getelementptr { [100 x i64], [100 x i64], [100 x i64], [100 x i64], i64, [200 x i32], i32, i32 }, ptr [[TMP0]], i32 0, i32 5 126; CHECK-NEXT: [[RETVAL_ORIGIN:%.*]] = getelementptr { [100 x i64], [100 x i64], [100 x i64], [100 x i64], i64, [200 x i32], i32, i32 }, ptr [[TMP0]], i32 0, i32 6 127; CHECK-NEXT: [[TMP1:%.*]] = ptrtoint ptr [[PARAM_SHADOW]] to i64 128; CHECK-NEXT: [[_MSARG:%.*]] = inttoptr i64 [[TMP1]] to ptr 129; CHECK-NEXT: [[TMP2:%.*]] = load i64, ptr [[_MSARG]], align 8 130; CHECK-NEXT: [[TMP3:%.*]] = ptrtoint ptr [[PARAM_ORIGIN]] to i64 131; CHECK-NEXT: [[_MSARG_O:%.*]] = inttoptr i64 [[TMP3]] to ptr 132; CHECK-NEXT: [[TMP4:%.*]] = load i32, ptr [[_MSARG_O]], align 4 133; CHECK-NEXT: [[TMP5:%.*]] = load i64, ptr [[VA_ARG_OVERFLOW_SIZE]], align 8 134; CHECK-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[PARAM_SHADOW]] to i64 135; CHECK-NEXT: [[TMP8:%.*]] = add i64 [[TMP7]], 8 136; CHECK-NEXT: [[_MSARG1:%.*]] = inttoptr i64 [[TMP8]] to ptr 137; CHECK-NEXT: [[TMP9:%.*]] = load i32, ptr [[_MSARG1]], align 8 138; CHECK-NEXT: [[TMP10:%.*]] = ptrtoint ptr [[PARAM_ORIGIN]] to i64 139; CHECK-NEXT: [[TMP11:%.*]] = add i64 [[TMP10]], 8 140; CHECK-NEXT: [[_MSARG_O2:%.*]] = inttoptr i64 [[TMP11]] to ptr 141; CHECK-NEXT: [[TMP12:%.*]] = load i32, ptr [[_MSARG_O2]], align 4 142; CHECK-NEXT: call void @llvm.donothing() 143; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP2]], 0 144; CHECK-NEXT: br i1 [[_MSCMP]], label %[[BB12:.*]], label %[[BB13:.*]], !prof [[PROF1]] 145; CHECK: [[BB12]]: 146; CHECK-NEXT: call void @__msan_warning(i32 [[TMP4]]) #[[ATTR2]] 147; CHECK-NEXT: br label %[[BB13]] 148; CHECK: [[BB13]]: 149; CHECK-NEXT: [[TMP15:%.*]] = call { ptr, ptr } @__msan_metadata_ptr_for_store_4(ptr [[P]]) 150; CHECK-NEXT: [[TMP16:%.*]] = extractvalue { ptr, ptr } [[TMP15]], 0 151; CHECK-NEXT: [[TMP17:%.*]] = extractvalue { ptr, ptr } [[TMP15]], 1 152; CHECK-NEXT: store i32 [[TMP9]], ptr [[TMP16]], align 4 153; CHECK-NEXT: [[_MSCMP3:%.*]] = icmp ne i32 [[TMP9]], 0 154; CHECK-NEXT: br i1 [[_MSCMP3]], label %[[BB17:.*]], label %[[BB19:.*]], !prof [[PROF1]] 155; CHECK: [[BB17]]: 156; CHECK-NEXT: [[TMP19:%.*]] = call i32 @__msan_chain_origin(i32 [[TMP12]]) 157; CHECK-NEXT: store i32 [[TMP19]], ptr [[TMP17]], align 4 158; CHECK-NEXT: br label %[[BB19]] 159; CHECK: [[BB19]]: 160; CHECK-NEXT: store i32 [[X]], ptr [[P]], align 4 161; CHECK-NEXT: ret void 162; 163entry: 164 store i32 %x, ptr %p 165 ret void 166} 167 168 169define void @Store8(ptr %p, i64 %x) sanitize_memory { 170; CHECK-LABEL: define void @Store8( 171; CHECK-SAME: ptr [[P:%.*]], i64 [[X:%.*]]) #[[ATTR0]] { 172; CHECK-NEXT: [[ENTRY:.*:]] 173; CHECK-NEXT: [[TMP0:%.*]] = call ptr @__msan_get_context_state() 174; CHECK-NEXT: [[PARAM_SHADOW:%.*]] = getelementptr { [100 x i64], [100 x i64], [100 x i64], [100 x i64], i64, [200 x i32], i32, i32 }, ptr [[TMP0]], i32 0, i32 0 175; CHECK-NEXT: [[RETVAL_SHADOW:%.*]] = getelementptr { [100 x i64], [100 x i64], [100 x i64], [100 x i64], i64, [200 x i32], i32, i32 }, ptr [[TMP0]], i32 0, i32 1 176; CHECK-NEXT: [[VA_ARG_SHADOW:%.*]] = getelementptr { [100 x i64], [100 x i64], [100 x i64], [100 x i64], i64, [200 x i32], i32, i32 }, ptr [[TMP0]], i32 0, i32 2 177; CHECK-NEXT: [[VA_ARG_ORIGIN:%.*]] = getelementptr { [100 x i64], [100 x i64], [100 x i64], [100 x i64], i64, [200 x i32], i32, i32 }, ptr [[TMP0]], i32 0, i32 3 178; CHECK-NEXT: [[VA_ARG_OVERFLOW_SIZE:%.*]] = getelementptr { [100 x i64], [100 x i64], [100 x i64], [100 x i64], i64, [200 x i32], i32, i32 }, ptr [[TMP0]], i32 0, i32 4 179; CHECK-NEXT: [[PARAM_ORIGIN:%.*]] = getelementptr { [100 x i64], [100 x i64], [100 x i64], [100 x i64], i64, [200 x i32], i32, i32 }, ptr [[TMP0]], i32 0, i32 5 180; CHECK-NEXT: [[RETVAL_ORIGIN:%.*]] = getelementptr { [100 x i64], [100 x i64], [100 x i64], [100 x i64], i64, [200 x i32], i32, i32 }, ptr [[TMP0]], i32 0, i32 6 181; CHECK-NEXT: [[TMP1:%.*]] = ptrtoint ptr [[PARAM_SHADOW]] to i64 182; CHECK-NEXT: [[_MSARG:%.*]] = inttoptr i64 [[TMP1]] to ptr 183; CHECK-NEXT: [[TMP2:%.*]] = load i64, ptr [[_MSARG]], align 8 184; CHECK-NEXT: [[TMP3:%.*]] = ptrtoint ptr [[PARAM_ORIGIN]] to i64 185; CHECK-NEXT: [[_MSARG_O:%.*]] = inttoptr i64 [[TMP3]] to ptr 186; CHECK-NEXT: [[TMP4:%.*]] = load i32, ptr [[_MSARG_O]], align 4 187; CHECK-NEXT: [[TMP5:%.*]] = load i64, ptr [[VA_ARG_OVERFLOW_SIZE]], align 8 188; CHECK-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[PARAM_SHADOW]] to i64 189; CHECK-NEXT: [[TMP8:%.*]] = add i64 [[TMP7]], 8 190; CHECK-NEXT: [[_MSARG1:%.*]] = inttoptr i64 [[TMP8]] to ptr 191; CHECK-NEXT: [[TMP9:%.*]] = load i64, ptr [[_MSARG1]], align 8 192; CHECK-NEXT: [[TMP10:%.*]] = ptrtoint ptr [[PARAM_ORIGIN]] to i64 193; CHECK-NEXT: [[TMP11:%.*]] = add i64 [[TMP10]], 8 194; CHECK-NEXT: [[_MSARG_O2:%.*]] = inttoptr i64 [[TMP11]] to ptr 195; CHECK-NEXT: [[TMP12:%.*]] = load i32, ptr [[_MSARG_O2]], align 4 196; CHECK-NEXT: call void @llvm.donothing() 197; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP2]], 0 198; CHECK-NEXT: br i1 [[_MSCMP]], label %[[BB12:.*]], label %[[BB13:.*]], !prof [[PROF1]] 199; CHECK: [[BB12]]: 200; CHECK-NEXT: call void @__msan_warning(i32 [[TMP4]]) #[[ATTR2]] 201; CHECK-NEXT: br label %[[BB13]] 202; CHECK: [[BB13]]: 203; CHECK-NEXT: [[TMP15:%.*]] = call { ptr, ptr } @__msan_metadata_ptr_for_store_8(ptr [[P]]) 204; CHECK-NEXT: [[TMP16:%.*]] = extractvalue { ptr, ptr } [[TMP15]], 0 205; CHECK-NEXT: [[TMP17:%.*]] = extractvalue { ptr, ptr } [[TMP15]], 1 206; CHECK-NEXT: store i64 [[TMP9]], ptr [[TMP16]], align 8 207; CHECK-NEXT: [[_MSCMP3:%.*]] = icmp ne i64 [[TMP9]], 0 208; CHECK-NEXT: br i1 [[_MSCMP3]], label %[[BB17:.*]], label %[[BB22:.*]], !prof [[PROF1]] 209; CHECK: [[BB17]]: 210; CHECK-NEXT: [[TMP19:%.*]] = call i32 @__msan_chain_origin(i32 [[TMP12]]) 211; CHECK-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i64 212; CHECK-NEXT: [[TMP21:%.*]] = shl i64 [[TMP20]], 32 213; CHECK-NEXT: [[TMP22:%.*]] = or i64 [[TMP20]], [[TMP21]] 214; CHECK-NEXT: store i64 [[TMP22]], ptr [[TMP17]], align 8 215; CHECK-NEXT: br label %[[BB22]] 216; CHECK: [[BB22]]: 217; CHECK-NEXT: store i64 [[X]], ptr [[P]], align 8 218; CHECK-NEXT: ret void 219; 220entry: 221 store i64 %x, ptr %p 222 ret void 223} 224 225 226define void @Store16(ptr %p, i128 %x) sanitize_memory { 227; CHECK-LABEL: define void @Store16( 228; CHECK-SAME: ptr [[P:%.*]], i128 [[X:%.*]]) #[[ATTR0]] { 229; CHECK-NEXT: [[ENTRY:.*:]] 230; CHECK-NEXT: [[TMP0:%.*]] = call ptr @__msan_get_context_state() 231; CHECK-NEXT: [[PARAM_SHADOW:%.*]] = getelementptr { [100 x i64], [100 x i64], [100 x i64], [100 x i64], i64, [200 x i32], i32, i32 }, ptr [[TMP0]], i32 0, i32 0 232; CHECK-NEXT: [[RETVAL_SHADOW:%.*]] = getelementptr { [100 x i64], [100 x i64], [100 x i64], [100 x i64], i64, [200 x i32], i32, i32 }, ptr [[TMP0]], i32 0, i32 1 233; CHECK-NEXT: [[VA_ARG_SHADOW:%.*]] = getelementptr { [100 x i64], [100 x i64], [100 x i64], [100 x i64], i64, [200 x i32], i32, i32 }, ptr [[TMP0]], i32 0, i32 2 234; CHECK-NEXT: [[VA_ARG_ORIGIN:%.*]] = getelementptr { [100 x i64], [100 x i64], [100 x i64], [100 x i64], i64, [200 x i32], i32, i32 }, ptr [[TMP0]], i32 0, i32 3 235; CHECK-NEXT: [[VA_ARG_OVERFLOW_SIZE:%.*]] = getelementptr { [100 x i64], [100 x i64], [100 x i64], [100 x i64], i64, [200 x i32], i32, i32 }, ptr [[TMP0]], i32 0, i32 4 236; CHECK-NEXT: [[PARAM_ORIGIN:%.*]] = getelementptr { [100 x i64], [100 x i64], [100 x i64], [100 x i64], i64, [200 x i32], i32, i32 }, ptr [[TMP0]], i32 0, i32 5 237; CHECK-NEXT: [[RETVAL_ORIGIN:%.*]] = getelementptr { [100 x i64], [100 x i64], [100 x i64], [100 x i64], i64, [200 x i32], i32, i32 }, ptr [[TMP0]], i32 0, i32 6 238; CHECK-NEXT: [[TMP1:%.*]] = ptrtoint ptr [[PARAM_SHADOW]] to i64 239; CHECK-NEXT: [[_MSARG:%.*]] = inttoptr i64 [[TMP1]] to ptr 240; CHECK-NEXT: [[TMP2:%.*]] = load i64, ptr [[_MSARG]], align 8 241; CHECK-NEXT: [[TMP3:%.*]] = ptrtoint ptr [[PARAM_ORIGIN]] to i64 242; CHECK-NEXT: [[_MSARG_O:%.*]] = inttoptr i64 [[TMP3]] to ptr 243; CHECK-NEXT: [[TMP4:%.*]] = load i32, ptr [[_MSARG_O]], align 4 244; CHECK-NEXT: [[TMP5:%.*]] = load i64, ptr [[VA_ARG_OVERFLOW_SIZE]], align 8 245; CHECK-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[PARAM_SHADOW]] to i64 246; CHECK-NEXT: [[TMP8:%.*]] = add i64 [[TMP7]], 8 247; CHECK-NEXT: [[_MSARG1:%.*]] = inttoptr i64 [[TMP8]] to ptr 248; CHECK-NEXT: [[TMP9:%.*]] = load i128, ptr [[_MSARG1]], align 8 249; CHECK-NEXT: [[TMP10:%.*]] = ptrtoint ptr [[PARAM_ORIGIN]] to i64 250; CHECK-NEXT: [[TMP11:%.*]] = add i64 [[TMP10]], 8 251; CHECK-NEXT: [[_MSARG_O2:%.*]] = inttoptr i64 [[TMP11]] to ptr 252; CHECK-NEXT: [[TMP12:%.*]] = load i32, ptr [[_MSARG_O2]], align 4 253; CHECK-NEXT: call void @llvm.donothing() 254; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP2]], 0 255; CHECK-NEXT: br i1 [[_MSCMP]], label %[[BB12:.*]], label %[[BB13:.*]], !prof [[PROF1]] 256; CHECK: [[BB12]]: 257; CHECK-NEXT: call void @__msan_warning(i32 [[TMP4]]) #[[ATTR2]] 258; CHECK-NEXT: br label %[[BB13]] 259; CHECK: [[BB13]]: 260; CHECK-NEXT: [[TMP15:%.*]] = call { ptr, ptr } @__msan_metadata_ptr_for_store_n(ptr [[P]], i64 16) 261; CHECK-NEXT: [[TMP16:%.*]] = extractvalue { ptr, ptr } [[TMP15]], 0 262; CHECK-NEXT: [[TMP17:%.*]] = extractvalue { ptr, ptr } [[TMP15]], 1 263; CHECK-NEXT: store i128 [[TMP9]], ptr [[TMP16]], align 8 264; CHECK-NEXT: [[_MSCMP3:%.*]] = icmp ne i128 [[TMP9]], 0 265; CHECK-NEXT: br i1 [[_MSCMP3]], label %[[BB17:.*]], label %[[BB23:.*]], !prof [[PROF1]] 266; CHECK: [[BB17]]: 267; CHECK-NEXT: [[TMP19:%.*]] = call i32 @__msan_chain_origin(i32 [[TMP12]]) 268; CHECK-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i64 269; CHECK-NEXT: [[TMP21:%.*]] = shl i64 [[TMP20]], 32 270; CHECK-NEXT: [[TMP22:%.*]] = or i64 [[TMP20]], [[TMP21]] 271; CHECK-NEXT: store i64 [[TMP22]], ptr [[TMP17]], align 8 272; CHECK-NEXT: [[TMP23:%.*]] = getelementptr i64, ptr [[TMP17]], i32 1 273; CHECK-NEXT: store i64 [[TMP22]], ptr [[TMP23]], align 8 274; CHECK-NEXT: br label %[[BB23]] 275; CHECK: [[BB23]]: 276; CHECK-NEXT: store i128 [[X]], ptr [[P]], align 8 277; CHECK-NEXT: ret void 278; 279entry: 280 store i128 %x, ptr %p 281 ret void 282} 283 284 285define i8 @Load1(ptr %p) sanitize_memory { 286; CHECK-LABEL: define i8 @Load1( 287; CHECK-SAME: ptr [[P:%.*]]) #[[ATTR0]] { 288; CHECK-NEXT: [[ENTRY:.*:]] 289; CHECK-NEXT: [[TMP0:%.*]] = call ptr @__msan_get_context_state() 290; CHECK-NEXT: [[PARAM_SHADOW:%.*]] = getelementptr { [100 x i64], [100 x i64], [100 x i64], [100 x i64], i64, [200 x i32], i32, i32 }, ptr [[TMP0]], i32 0, i32 0 291; CHECK-NEXT: [[RETVAL_SHADOW:%.*]] = getelementptr { [100 x i64], [100 x i64], [100 x i64], [100 x i64], i64, [200 x i32], i32, i32 }, ptr [[TMP0]], i32 0, i32 1 292; CHECK-NEXT: [[VA_ARG_SHADOW:%.*]] = getelementptr { [100 x i64], [100 x i64], [100 x i64], [100 x i64], i64, [200 x i32], i32, i32 }, ptr [[TMP0]], i32 0, i32 2 293; CHECK-NEXT: [[VA_ARG_ORIGIN:%.*]] = getelementptr { [100 x i64], [100 x i64], [100 x i64], [100 x i64], i64, [200 x i32], i32, i32 }, ptr [[TMP0]], i32 0, i32 3 294; CHECK-NEXT: [[VA_ARG_OVERFLOW_SIZE:%.*]] = getelementptr { [100 x i64], [100 x i64], [100 x i64], [100 x i64], i64, [200 x i32], i32, i32 }, ptr [[TMP0]], i32 0, i32 4 295; CHECK-NEXT: [[PARAM_ORIGIN:%.*]] = getelementptr { [100 x i64], [100 x i64], [100 x i64], [100 x i64], i64, [200 x i32], i32, i32 }, ptr [[TMP0]], i32 0, i32 5 296; CHECK-NEXT: [[RETVAL_ORIGIN:%.*]] = getelementptr { [100 x i64], [100 x i64], [100 x i64], [100 x i64], i64, [200 x i32], i32, i32 }, ptr [[TMP0]], i32 0, i32 6 297; CHECK-NEXT: [[TMP1:%.*]] = ptrtoint ptr [[PARAM_SHADOW]] to i64 298; CHECK-NEXT: [[_MSARG:%.*]] = inttoptr i64 [[TMP1]] to ptr 299; CHECK-NEXT: [[TMP2:%.*]] = load i64, ptr [[_MSARG]], align 8 300; CHECK-NEXT: [[TMP3:%.*]] = ptrtoint ptr [[PARAM_ORIGIN]] to i64 301; CHECK-NEXT: [[_MSARG_O:%.*]] = inttoptr i64 [[TMP3]] to ptr 302; CHECK-NEXT: [[TMP4:%.*]] = load i32, ptr [[_MSARG_O]], align 4 303; CHECK-NEXT: [[TMP5:%.*]] = load i64, ptr [[VA_ARG_OVERFLOW_SIZE]], align 8 304; CHECK-NEXT: call void @llvm.donothing() 305; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP2]], 0 306; CHECK-NEXT: br i1 [[_MSCMP]], label %[[BB6:.*]], label %[[BB7:.*]], !prof [[PROF1]] 307; CHECK: [[BB6]]: 308; CHECK-NEXT: call void @__msan_warning(i32 [[TMP4]]) #[[ATTR2]] 309; CHECK-NEXT: br label %[[BB7]] 310; CHECK: [[BB7]]: 311; CHECK-NEXT: [[TMP9:%.*]] = load i8, ptr [[P]], align 1 312; CHECK-NEXT: [[TMP10:%.*]] = call { ptr, ptr } @__msan_metadata_ptr_for_load_1(ptr [[P]]) 313; CHECK-NEXT: [[TMP11:%.*]] = extractvalue { ptr, ptr } [[TMP10]], 0 314; CHECK-NEXT: [[TMP12:%.*]] = extractvalue { ptr, ptr } [[TMP10]], 1 315; CHECK-NEXT: [[_MSLD:%.*]] = load i8, ptr [[TMP11]], align 1 316; CHECK-NEXT: [[TMP13:%.*]] = load i32, ptr [[TMP12]], align 4 317; CHECK-NEXT: store i8 [[_MSLD]], ptr [[RETVAL_SHADOW]], align 8 318; CHECK-NEXT: store i32 [[TMP13]], ptr [[RETVAL_ORIGIN]], align 4 319; CHECK-NEXT: ret i8 [[TMP9]] 320; 321entry: 322 %0 = load i8, ptr %p 323 ret i8 %0 324} 325 326 327define i16 @Load2(ptr %p) sanitize_memory { 328; CHECK-LABEL: define i16 @Load2( 329; CHECK-SAME: ptr [[P:%.*]]) #[[ATTR0]] { 330; CHECK-NEXT: [[ENTRY:.*:]] 331; CHECK-NEXT: [[TMP0:%.*]] = call ptr @__msan_get_context_state() 332; CHECK-NEXT: [[PARAM_SHADOW:%.*]] = getelementptr { [100 x i64], [100 x i64], [100 x i64], [100 x i64], i64, [200 x i32], i32, i32 }, ptr [[TMP0]], i32 0, i32 0 333; CHECK-NEXT: [[RETVAL_SHADOW:%.*]] = getelementptr { [100 x i64], [100 x i64], [100 x i64], [100 x i64], i64, [200 x i32], i32, i32 }, ptr [[TMP0]], i32 0, i32 1 334; CHECK-NEXT: [[VA_ARG_SHADOW:%.*]] = getelementptr { [100 x i64], [100 x i64], [100 x i64], [100 x i64], i64, [200 x i32], i32, i32 }, ptr [[TMP0]], i32 0, i32 2 335; CHECK-NEXT: [[VA_ARG_ORIGIN:%.*]] = getelementptr { [100 x i64], [100 x i64], [100 x i64], [100 x i64], i64, [200 x i32], i32, i32 }, ptr [[TMP0]], i32 0, i32 3 336; CHECK-NEXT: [[VA_ARG_OVERFLOW_SIZE:%.*]] = getelementptr { [100 x i64], [100 x i64], [100 x i64], [100 x i64], i64, [200 x i32], i32, i32 }, ptr [[TMP0]], i32 0, i32 4 337; CHECK-NEXT: [[PARAM_ORIGIN:%.*]] = getelementptr { [100 x i64], [100 x i64], [100 x i64], [100 x i64], i64, [200 x i32], i32, i32 }, ptr [[TMP0]], i32 0, i32 5 338; CHECK-NEXT: [[RETVAL_ORIGIN:%.*]] = getelementptr { [100 x i64], [100 x i64], [100 x i64], [100 x i64], i64, [200 x i32], i32, i32 }, ptr [[TMP0]], i32 0, i32 6 339; CHECK-NEXT: [[TMP1:%.*]] = ptrtoint ptr [[PARAM_SHADOW]] to i64 340; CHECK-NEXT: [[_MSARG:%.*]] = inttoptr i64 [[TMP1]] to ptr 341; CHECK-NEXT: [[TMP2:%.*]] = load i64, ptr [[_MSARG]], align 8 342; CHECK-NEXT: [[TMP3:%.*]] = ptrtoint ptr [[PARAM_ORIGIN]] to i64 343; CHECK-NEXT: [[_MSARG_O:%.*]] = inttoptr i64 [[TMP3]] to ptr 344; CHECK-NEXT: [[TMP4:%.*]] = load i32, ptr [[_MSARG_O]], align 4 345; CHECK-NEXT: [[TMP5:%.*]] = load i64, ptr [[VA_ARG_OVERFLOW_SIZE]], align 8 346; CHECK-NEXT: call void @llvm.donothing() 347; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP2]], 0 348; CHECK-NEXT: br i1 [[_MSCMP]], label %[[BB6:.*]], label %[[BB7:.*]], !prof [[PROF1]] 349; CHECK: [[BB6]]: 350; CHECK-NEXT: call void @__msan_warning(i32 [[TMP4]]) #[[ATTR2]] 351; CHECK-NEXT: br label %[[BB7]] 352; CHECK: [[BB7]]: 353; CHECK-NEXT: [[TMP9:%.*]] = load i16, ptr [[P]], align 2 354; CHECK-NEXT: [[TMP10:%.*]] = call { ptr, ptr } @__msan_metadata_ptr_for_load_2(ptr [[P]]) 355; CHECK-NEXT: [[TMP11:%.*]] = extractvalue { ptr, ptr } [[TMP10]], 0 356; CHECK-NEXT: [[TMP12:%.*]] = extractvalue { ptr, ptr } [[TMP10]], 1 357; CHECK-NEXT: [[_MSLD:%.*]] = load i16, ptr [[TMP11]], align 2 358; CHECK-NEXT: [[TMP13:%.*]] = load i32, ptr [[TMP12]], align 4 359; CHECK-NEXT: store i16 [[_MSLD]], ptr [[RETVAL_SHADOW]], align 8 360; CHECK-NEXT: store i32 [[TMP13]], ptr [[RETVAL_ORIGIN]], align 4 361; CHECK-NEXT: ret i16 [[TMP9]] 362; 363entry: 364 %0 = load i16, ptr %p 365 ret i16 %0 366} 367 368 369define i32 @Load4(ptr %p) sanitize_memory { 370; CHECK-LABEL: define i32 @Load4( 371; CHECK-SAME: ptr [[P:%.*]]) #[[ATTR0]] { 372; CHECK-NEXT: [[ENTRY:.*:]] 373; CHECK-NEXT: [[TMP0:%.*]] = call ptr @__msan_get_context_state() 374; CHECK-NEXT: [[PARAM_SHADOW:%.*]] = getelementptr { [100 x i64], [100 x i64], [100 x i64], [100 x i64], i64, [200 x i32], i32, i32 }, ptr [[TMP0]], i32 0, i32 0 375; CHECK-NEXT: [[RETVAL_SHADOW:%.*]] = getelementptr { [100 x i64], [100 x i64], [100 x i64], [100 x i64], i64, [200 x i32], i32, i32 }, ptr [[TMP0]], i32 0, i32 1 376; CHECK-NEXT: [[VA_ARG_SHADOW:%.*]] = getelementptr { [100 x i64], [100 x i64], [100 x i64], [100 x i64], i64, [200 x i32], i32, i32 }, ptr [[TMP0]], i32 0, i32 2 377; CHECK-NEXT: [[VA_ARG_ORIGIN:%.*]] = getelementptr { [100 x i64], [100 x i64], [100 x i64], [100 x i64], i64, [200 x i32], i32, i32 }, ptr [[TMP0]], i32 0, i32 3 378; CHECK-NEXT: [[VA_ARG_OVERFLOW_SIZE:%.*]] = getelementptr { [100 x i64], [100 x i64], [100 x i64], [100 x i64], i64, [200 x i32], i32, i32 }, ptr [[TMP0]], i32 0, i32 4 379; CHECK-NEXT: [[PARAM_ORIGIN:%.*]] = getelementptr { [100 x i64], [100 x i64], [100 x i64], [100 x i64], i64, [200 x i32], i32, i32 }, ptr [[TMP0]], i32 0, i32 5 380; CHECK-NEXT: [[RETVAL_ORIGIN:%.*]] = getelementptr { [100 x i64], [100 x i64], [100 x i64], [100 x i64], i64, [200 x i32], i32, i32 }, ptr [[TMP0]], i32 0, i32 6 381; CHECK-NEXT: [[TMP1:%.*]] = ptrtoint ptr [[PARAM_SHADOW]] to i64 382; CHECK-NEXT: [[_MSARG:%.*]] = inttoptr i64 [[TMP1]] to ptr 383; CHECK-NEXT: [[TMP2:%.*]] = load i64, ptr [[_MSARG]], align 8 384; CHECK-NEXT: [[TMP3:%.*]] = ptrtoint ptr [[PARAM_ORIGIN]] to i64 385; CHECK-NEXT: [[_MSARG_O:%.*]] = inttoptr i64 [[TMP3]] to ptr 386; CHECK-NEXT: [[TMP4:%.*]] = load i32, ptr [[_MSARG_O]], align 4 387; CHECK-NEXT: [[TMP5:%.*]] = load i64, ptr [[VA_ARG_OVERFLOW_SIZE]], align 8 388; CHECK-NEXT: call void @llvm.donothing() 389; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP2]], 0 390; CHECK-NEXT: br i1 [[_MSCMP]], label %[[BB6:.*]], label %[[BB7:.*]], !prof [[PROF1]] 391; CHECK: [[BB6]]: 392; CHECK-NEXT: call void @__msan_warning(i32 [[TMP4]]) #[[ATTR2]] 393; CHECK-NEXT: br label %[[BB7]] 394; CHECK: [[BB7]]: 395; CHECK-NEXT: [[TMP9:%.*]] = load i32, ptr [[P]], align 4 396; CHECK-NEXT: [[TMP10:%.*]] = call { ptr, ptr } @__msan_metadata_ptr_for_load_4(ptr [[P]]) 397; CHECK-NEXT: [[TMP11:%.*]] = extractvalue { ptr, ptr } [[TMP10]], 0 398; CHECK-NEXT: [[TMP12:%.*]] = extractvalue { ptr, ptr } [[TMP10]], 1 399; CHECK-NEXT: [[_MSLD:%.*]] = load i32, ptr [[TMP11]], align 4 400; CHECK-NEXT: [[TMP13:%.*]] = load i32, ptr [[TMP12]], align 4 401; CHECK-NEXT: store i32 [[_MSLD]], ptr [[RETVAL_SHADOW]], align 8 402; CHECK-NEXT: store i32 [[TMP13]], ptr [[RETVAL_ORIGIN]], align 4 403; CHECK-NEXT: ret i32 [[TMP9]] 404; 405entry: 406 %0 = load i32, ptr %p 407 ret i32 %0 408} 409 410 411define i64 @Load8(ptr %p) sanitize_memory { 412; CHECK-LABEL: define i64 @Load8( 413; CHECK-SAME: ptr [[P:%.*]]) #[[ATTR0]] { 414; CHECK-NEXT: [[ENTRY:.*:]] 415; CHECK-NEXT: [[TMP0:%.*]] = call ptr @__msan_get_context_state() 416; CHECK-NEXT: [[PARAM_SHADOW:%.*]] = getelementptr { [100 x i64], [100 x i64], [100 x i64], [100 x i64], i64, [200 x i32], i32, i32 }, ptr [[TMP0]], i32 0, i32 0 417; CHECK-NEXT: [[RETVAL_SHADOW:%.*]] = getelementptr { [100 x i64], [100 x i64], [100 x i64], [100 x i64], i64, [200 x i32], i32, i32 }, ptr [[TMP0]], i32 0, i32 1 418; CHECK-NEXT: [[VA_ARG_SHADOW:%.*]] = getelementptr { [100 x i64], [100 x i64], [100 x i64], [100 x i64], i64, [200 x i32], i32, i32 }, ptr [[TMP0]], i32 0, i32 2 419; CHECK-NEXT: [[VA_ARG_ORIGIN:%.*]] = getelementptr { [100 x i64], [100 x i64], [100 x i64], [100 x i64], i64, [200 x i32], i32, i32 }, ptr [[TMP0]], i32 0, i32 3 420; CHECK-NEXT: [[VA_ARG_OVERFLOW_SIZE:%.*]] = getelementptr { [100 x i64], [100 x i64], [100 x i64], [100 x i64], i64, [200 x i32], i32, i32 }, ptr [[TMP0]], i32 0, i32 4 421; CHECK-NEXT: [[PARAM_ORIGIN:%.*]] = getelementptr { [100 x i64], [100 x i64], [100 x i64], [100 x i64], i64, [200 x i32], i32, i32 }, ptr [[TMP0]], i32 0, i32 5 422; CHECK-NEXT: [[RETVAL_ORIGIN:%.*]] = getelementptr { [100 x i64], [100 x i64], [100 x i64], [100 x i64], i64, [200 x i32], i32, i32 }, ptr [[TMP0]], i32 0, i32 6 423; CHECK-NEXT: [[TMP1:%.*]] = ptrtoint ptr [[PARAM_SHADOW]] to i64 424; CHECK-NEXT: [[_MSARG:%.*]] = inttoptr i64 [[TMP1]] to ptr 425; CHECK-NEXT: [[TMP2:%.*]] = load i64, ptr [[_MSARG]], align 8 426; CHECK-NEXT: [[TMP3:%.*]] = ptrtoint ptr [[PARAM_ORIGIN]] to i64 427; CHECK-NEXT: [[_MSARG_O:%.*]] = inttoptr i64 [[TMP3]] to ptr 428; CHECK-NEXT: [[TMP4:%.*]] = load i32, ptr [[_MSARG_O]], align 4 429; CHECK-NEXT: [[TMP5:%.*]] = load i64, ptr [[VA_ARG_OVERFLOW_SIZE]], align 8 430; CHECK-NEXT: call void @llvm.donothing() 431; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP2]], 0 432; CHECK-NEXT: br i1 [[_MSCMP]], label %[[BB6:.*]], label %[[BB7:.*]], !prof [[PROF1]] 433; CHECK: [[BB6]]: 434; CHECK-NEXT: call void @__msan_warning(i32 [[TMP4]]) #[[ATTR2]] 435; CHECK-NEXT: br label %[[BB7]] 436; CHECK: [[BB7]]: 437; CHECK-NEXT: [[TMP9:%.*]] = load i64, ptr [[P]], align 8 438; CHECK-NEXT: [[TMP10:%.*]] = call { ptr, ptr } @__msan_metadata_ptr_for_load_8(ptr [[P]]) 439; CHECK-NEXT: [[TMP11:%.*]] = extractvalue { ptr, ptr } [[TMP10]], 0 440; CHECK-NEXT: [[TMP12:%.*]] = extractvalue { ptr, ptr } [[TMP10]], 1 441; CHECK-NEXT: [[_MSLD:%.*]] = load i64, ptr [[TMP11]], align 8 442; CHECK-NEXT: [[TMP13:%.*]] = load i32, ptr [[TMP12]], align 8 443; CHECK-NEXT: store i64 [[_MSLD]], ptr [[RETVAL_SHADOW]], align 8 444; CHECK-NEXT: store i32 [[TMP13]], ptr [[RETVAL_ORIGIN]], align 4 445; CHECK-NEXT: ret i64 [[TMP9]] 446; 447entry: 448 %0 = load i64, ptr %p 449 ret i64 %0 450} 451 452 453define i128 @Load16(ptr %p) sanitize_memory { 454; CHECK-LABEL: define i128 @Load16( 455; CHECK-SAME: ptr [[P:%.*]]) #[[ATTR0]] { 456; CHECK-NEXT: [[ENTRY:.*:]] 457; CHECK-NEXT: [[TMP0:%.*]] = call ptr @__msan_get_context_state() 458; CHECK-NEXT: [[PARAM_SHADOW:%.*]] = getelementptr { [100 x i64], [100 x i64], [100 x i64], [100 x i64], i64, [200 x i32], i32, i32 }, ptr [[TMP0]], i32 0, i32 0 459; CHECK-NEXT: [[RETVAL_SHADOW:%.*]] = getelementptr { [100 x i64], [100 x i64], [100 x i64], [100 x i64], i64, [200 x i32], i32, i32 }, ptr [[TMP0]], i32 0, i32 1 460; CHECK-NEXT: [[VA_ARG_SHADOW:%.*]] = getelementptr { [100 x i64], [100 x i64], [100 x i64], [100 x i64], i64, [200 x i32], i32, i32 }, ptr [[TMP0]], i32 0, i32 2 461; CHECK-NEXT: [[VA_ARG_ORIGIN:%.*]] = getelementptr { [100 x i64], [100 x i64], [100 x i64], [100 x i64], i64, [200 x i32], i32, i32 }, ptr [[TMP0]], i32 0, i32 3 462; CHECK-NEXT: [[VA_ARG_OVERFLOW_SIZE:%.*]] = getelementptr { [100 x i64], [100 x i64], [100 x i64], [100 x i64], i64, [200 x i32], i32, i32 }, ptr [[TMP0]], i32 0, i32 4 463; CHECK-NEXT: [[PARAM_ORIGIN:%.*]] = getelementptr { [100 x i64], [100 x i64], [100 x i64], [100 x i64], i64, [200 x i32], i32, i32 }, ptr [[TMP0]], i32 0, i32 5 464; CHECK-NEXT: [[RETVAL_ORIGIN:%.*]] = getelementptr { [100 x i64], [100 x i64], [100 x i64], [100 x i64], i64, [200 x i32], i32, i32 }, ptr [[TMP0]], i32 0, i32 6 465; CHECK-NEXT: [[TMP1:%.*]] = ptrtoint ptr [[PARAM_SHADOW]] to i64 466; CHECK-NEXT: [[_MSARG:%.*]] = inttoptr i64 [[TMP1]] to ptr 467; CHECK-NEXT: [[TMP2:%.*]] = load i64, ptr [[_MSARG]], align 8 468; CHECK-NEXT: [[TMP3:%.*]] = ptrtoint ptr [[PARAM_ORIGIN]] to i64 469; CHECK-NEXT: [[_MSARG_O:%.*]] = inttoptr i64 [[TMP3]] to ptr 470; CHECK-NEXT: [[TMP4:%.*]] = load i32, ptr [[_MSARG_O]], align 4 471; CHECK-NEXT: [[TMP5:%.*]] = load i64, ptr [[VA_ARG_OVERFLOW_SIZE]], align 8 472; CHECK-NEXT: call void @llvm.donothing() 473; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP2]], 0 474; CHECK-NEXT: br i1 [[_MSCMP]], label %[[BB6:.*]], label %[[BB7:.*]], !prof [[PROF1]] 475; CHECK: [[BB6]]: 476; CHECK-NEXT: call void @__msan_warning(i32 [[TMP4]]) #[[ATTR2]] 477; CHECK-NEXT: br label %[[BB7]] 478; CHECK: [[BB7]]: 479; CHECK-NEXT: [[TMP9:%.*]] = load i128, ptr [[P]], align 8 480; CHECK-NEXT: [[TMP10:%.*]] = call { ptr, ptr } @__msan_metadata_ptr_for_load_n(ptr [[P]], i64 16) 481; CHECK-NEXT: [[TMP11:%.*]] = extractvalue { ptr, ptr } [[TMP10]], 0 482; CHECK-NEXT: [[TMP12:%.*]] = extractvalue { ptr, ptr } [[TMP10]], 1 483; CHECK-NEXT: [[_MSLD:%.*]] = load i128, ptr [[TMP11]], align 8 484; CHECK-NEXT: [[TMP13:%.*]] = load i32, ptr [[TMP12]], align 8 485; CHECK-NEXT: store i128 [[_MSLD]], ptr [[RETVAL_SHADOW]], align 8 486; CHECK-NEXT: store i32 [[TMP13]], ptr [[RETVAL_ORIGIN]], align 4 487; CHECK-NEXT: ret i128 [[TMP9]] 488; 489entry: 490 %0 = load i128, ptr %p 491 ret i128 %0 492} 493 494;. 495; CHECK: [[PROF1]] = !{!"branch_weights", i32 1, i32 1048575} 496;. 497