xref: /llvm-project/llvm/test/DebugInfo/MIR/X86/empty-inline.mir (revision b468ed494acde4d1cc496a436ab9109660db5b80)
1# RUN: llc -verify-machineinstrs -start-after=virtregrewriter -filetype=obj -o - %s | llvm-dwarfdump -a - | FileCheck %s
2#
3# This testcase has an implicit def pseudo-instruction with a debug location.
4#
5# CHECK: .debug_info contents:
6# CHECK: DW_TAG_subprogram
7# CHECK:	DW_AT_low_pc (0x0000000000000000)
8# CHECK-NOT: DW_TAG
9# CHECK:	DW_AT_specification {{.*}} "_ZN1C5m_fn3Ev"
10# CHECK-NOT: DW_TAG
11#	     Here should not be an inlined subroutine with 0 length.
12# CHECK: NULL
13#
14# CHECK: Address            Line   Column File   ISA Discriminator OpIndex Flags
15# CHECK-NEXT:                ---
16# CHECK-NEXT:                 25      0      1   0             0         0 is_stmt prologue_end
17# CHECK-NEXT:                 29     28      1   0             0         0 is_stmt
18# CHECK-NEXT:                 29     28      1   0             0         0 is_stmt end_sequence
19
20--- |
21  source_filename = "t.ll"
22  target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
23  target triple = "x86_64-apple-macosx"
24
25  %class.E = type { %class.D }
26  %class.D = type { %class.B }
27  %class.B = type { %class.A, %class.A }
28  %class.A = type { i8 }
29  %class.C = type <{ ptr, %class.B, [2 x i8] }>
30
31  @a = local_unnamed_addr global ptr null, align 4
32
33  define i32 @_ZN1C5m_fn3Ev(ptr nocapture) local_unnamed_addr align 2 !dbg !6 {
34    %2 = alloca %class.B, align 1
35    %3 = load ptr, ptr @a, align 4
36    %4 = icmp eq ptr %3, null
37    br i1 %4, label %10, label %5
38
39  ; <label>:5:                                      ; preds = %1
40    %6 = bitcast ptr %0 to ptr
41    %7 = load ptr, ptr %6, align 4
42    %8 = bitcast ptr %7 to ptr
43    %9 = load i8, ptr %8, align 1
44    br label %10
45
46  ; <label>:10:                                     ; preds = %5, %1
47    %11 = phi i8 [ %9, %5 ], [ undef, %1 ], !dbg !10
48    %12 = getelementptr inbounds %class.C, ptr %0, i32 0, i32 1, i32 0, i32 0
49    store i8 %11, ptr %12, align 1, !dbg !14
50    ret i32 undef
51  }
52
53  !llvm.dbg.cu = !{!0}
54  !llvm.module.flags = !{!3, !4, !5}
55
56  !0 = distinct !DICompileUnit(language: DW_LANG_C_plus_plus, file: !1, producer: "Apple LLVM version 8.1.0 (clang-802.0.30.3)", isOptimized: true, runtimeVersion: 0, emissionKind: FullDebug, enums: !2, globals: !2)
57  !1 = !DIFile(filename: "test.ii", directory: "/")
58  !2 = !{}
59  !3 = !{i32 2, !"Dwarf Version", i32 4}
60  !4 = !{i32 2, !"Debug Info Version", i32 3}
61  !5 = !{i32 1, !"PIC Level", i32 2}
62  !6 = distinct !DISubprogram(name: "m_fn3", linkageName: "_ZN1C5m_fn3Ev", scope: !7, file: !1, line: 25, type: !8, isLocal: false, isDefinition: true, scopeLine: 25, flags: DIFlagPrototyped, isOptimized: true, unit: !0, declaration: !9, retainedNodes: !2)
63  !7 = distinct !DICompositeType(tag: DW_TAG_class_type, name: "C", file: !1, line: 14, size: 64, align: 32, elements: !2, identifier: "_ZTS1C")
64  !8 = !DISubroutineType(types: !2)
65  !9 = !DISubprogram(name: "m_fn3", linkageName: "_ZN1C5m_fn3Ev", scope: !7, file: !1, line: 15, type: !8, isLocal: false, isDefinition: false, scopeLine: 15, flags: DIFlagPrototyped, isOptimized: true)
66  !10 = !DILocation(line: 99, column: 9, scope: !11, inlinedAt: !14)
67  !11 = distinct !DISubprogram(name: "m_fn1", linkageName: "_ZN1A5m_fn1Ev", scope: !12, file: !1, line: 5, type: !8, isLocal: false, isDefinition: true, scopeLine: 5, flags: DIFlagPrototyped, isOptimized: true, unit: !0, declaration: !13, retainedNodes: !2)
68  !12 = distinct !DICompositeType(tag: DW_TAG_class_type, name: "A", file: !1, line: 1, size: 8, align: 8, elements: !2, identifier: "_ZTS1A")
69  !13 = !DISubprogram(name: "m_fn1", linkageName: "_ZN1A5m_fn1Ev", scope: !12, file: !1, line: 5, type: !8, isLocal: false, isDefinition: false, scopeLine: 5, flags: DIFlagPublic | DIFlagPrototyped, isOptimized: true)
70  !14 = !DILocation(line: 29, column: 28, scope: !6)
71
72...
73---
74name:            _ZN1C5m_fn3Ev
75alignment:       16
76exposesReturnsTwice: false
77legalized:       false
78regBankSelected: false
79selected:        false
80tracksRegLiveness: true
81liveins:
82  - { reg: '$rdi' }
83frameInfo:
84  isFrameAddressTaken: false
85  isReturnAddressTaken: false
86  hasStackMap:     false
87  hasPatchPoint:   false
88  stackSize:       0
89  offsetAdjustment: 0
90  maxAlignment:    8
91  adjustsStack:    false
92  hasCalls:        false
93  maxCallFrameSize: 0
94  hasOpaqueSPAdjustment: false
95  hasVAStart:      false
96  hasMustTailInVarArgFunc: false
97#stack:
98#  - { id: 0, name: '<unnamed alloca>', offset: -16, size: 2, alignment: 8 }
99body:             |
100  bb.0 (%ir-block.1):
101    successors: %bb.1(0x30000000), %bb.2(0x50000000)
102    liveins: $rdi
103
104    CMP64mi32 $rip, 1, _, @a, _, 0, implicit-def $eflags :: (dereferenceable load (s64) from @a, align 4)
105    JCC_1 %bb.1, 4, implicit $eflags
106
107  bb.2 (%ir-block.5):
108    liveins: $rdi
109
110    $rax = MOV64rm $rdi, 1, _, 0, _ :: (load (s64) from %ir.6, align 4)
111    $al = MOV8rm killed $rax, 1, _, 0, _ :: (load (s8) from %ir.8)
112    MOV8mr killed $rdi, 1, _, 8, _, killed $al, debug-location !14 :: (store (s8) into %ir.12)
113    RET64 undef $eax
114
115  bb.1:
116    liveins: $rdi
117
118    $al = IMPLICIT_DEF debug-location !10
119    MOV8mr killed $rdi, 1, _, 8, _, killed $al, debug-location !14 :: (store (s8) into %ir.12)
120    RET64 undef $eax
121
122...
123