xref: /llvm-project/llvm/test/CodeGen/X86/overflow.ll (revision 250b4a74917edc79f2d34773cdb92c37ab83fa6c)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=X32
3; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=X64
4
5define i1 @mulhioverflow(i64 %a, i64 %b, i64 %c) nounwind {
6; X32-LABEL: mulhioverflow:
7; X32:       # BB#0:
8; X32-NEXT:    pushl %ebp
9; X32-NEXT:    movl %esp, %ebp
10; X32-NEXT:    pushl %esi
11; X32-NEXT:    andl $-8, %esp
12; X32-NEXT:    subl $24, %esp
13; X32-NEXT:    movl 24(%ebp), %esi
14; X32-NEXT:    movl %esp, %eax
15; X32-NEXT:    pushl $0
16; X32-NEXT:    pushl $0
17; X32-NEXT:    pushl 20(%ebp)
18; X32-NEXT:    pushl 16(%ebp)
19; X32-NEXT:    pushl $0
20; X32-NEXT:    pushl $0
21; X32-NEXT:    pushl 12(%ebp)
22; X32-NEXT:    pushl 8(%ebp)
23; X32-NEXT:    pushl %eax
24; X32-NEXT:    calll __multi3
25; X32-NEXT:    addl $32, %esp
26; X32-NEXT:    movl {{[0-9]+}}(%esp), %eax
27; X32-NEXT:    andl $1, %esi
28; X32-NEXT:    addl {{[0-9]+}}(%esp), %esi
29; X32-NEXT:    adcl $0, %eax
30; X32-NEXT:    setb %al
31; X32-NEXT:    leal -4(%ebp), %esp
32; X32-NEXT:    popl %esi
33; X32-NEXT:    popl %ebp
34; X32-NEXT:    retl
35;
36; X64-LABEL: mulhioverflow:
37; X64:       # BB#0:
38; X64-NEXT:    movq %rdx, %rcx
39; X64-NEXT:    movq %rdi, %rax
40; X64-NEXT:    mulq %rsi
41; X64-NEXT:    andl $1, %ecx
42; X64-NEXT:    addq %rdx, %rcx
43; X64-NEXT:    setb %al
44; X64-NEXT:    retq
45  %1 = zext i64 %a to i128
46  %2 = zext i64 %b to i128
47  %3 = mul i128 %1, %2
48  %4 = lshr i128 %3, 64
49  %5 = and i64 %c, 1
50  %6 = zext i64 %5 to i128
51  %7 = add i128 %4, %6
52  %8 = lshr i128 %7, 64
53  %9 = trunc i128 %8 to i1
54  ret i1 %9
55}
56