1a5f12623SSimon Moll; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2a5f12623SSimon Moll; RUN: llc < %s -mtriple=ve-unknown-unknown -mattr=+vpu | FileCheck %s 3a5f12623SSimon Moll 4*b006b60dSNikita Popovdeclare void @llvm.masked.scatter.v256i64.v256p0(<256 x i64>, <256 x ptr>, i32 immarg, <256 x i1>) #0 5a5f12623SSimon Moll 6a5f12623SSimon Moll; Function Attrs: nounwind 7*b006b60dSNikita Popovdefine fastcc void @vec_mscatter_v256i64(<256 x i64> %V, <256 x ptr> %P, <256 x i1> %M) { 8a5f12623SSimon Moll; CHECK-LABEL: vec_mscatter_v256i64: 9a5f12623SSimon Moll; CHECK: # %bb.0: 10a5f12623SSimon Moll; CHECK-NEXT: lea %s0, 256 11a5f12623SSimon Moll; CHECK-NEXT: lvl %s0 12a5f12623SSimon Moll; CHECK-NEXT: vsc %v0, %v1, 0, 0 13a5f12623SSimon Moll; CHECK-NEXT: b.l.t (, %s10) 14*b006b60dSNikita Popov call void @llvm.masked.scatter.v256i64.v256p0(<256 x i64> %V, <256 x ptr> %P, i32 4, <256 x i1> %M) 15a5f12623SSimon Moll ret void 16a5f12623SSimon Moll} 17a5f12623SSimon Moll 18*b006b60dSNikita Popovdeclare void @llvm.masked.scatter.v256f64.v256p0(<256 x double>, <256 x ptr>, i32 immarg, <256 x i1>) #0 19a5f12623SSimon Moll 20a5f12623SSimon Moll; Function Attrs: nounwind 21*b006b60dSNikita Popovdefine fastcc void @vec_mscatter_v256f64(<256 x double> %V, <256 x ptr> %P, <256 x i1> %M) { 22a5f12623SSimon Moll; CHECK-LABEL: vec_mscatter_v256f64: 23a5f12623SSimon Moll; CHECK: # %bb.0: 24a5f12623SSimon Moll; CHECK-NEXT: lea %s0, 256 25a5f12623SSimon Moll; CHECK-NEXT: lvl %s0 26a5f12623SSimon Moll; CHECK-NEXT: vsc %v0, %v1, 0, 0 27a5f12623SSimon Moll; CHECK-NEXT: b.l.t (, %s10) 28*b006b60dSNikita Popov call void @llvm.masked.scatter.v256f64.v256p0(<256 x double> %V, <256 x ptr> %P, i32 4, <256 x i1> %M) 29a5f12623SSimon Moll ret void 30a5f12623SSimon Moll} 31a5f12623SSimon Moll 32*b006b60dSNikita Popovdeclare void @llvm.masked.scatter.v256f32.v256p0(<256 x float>, <256 x ptr>, i32 immarg, <256 x i1>) #0 33a5f12623SSimon Moll 34a5f12623SSimon Moll; Function Attrs: nounwind 35*b006b60dSNikita Popovdefine fastcc void @vec_mscatter_v256f32(<256 x float> %V, <256 x ptr> %P, <256 x i1> %M) { 36a5f12623SSimon Moll; CHECK-LABEL: vec_mscatter_v256f32: 37a5f12623SSimon Moll; CHECK: # %bb.0: 38a5f12623SSimon Moll; CHECK-NEXT: lea %s0, 256 39a5f12623SSimon Moll; CHECK-NEXT: lvl %s0 40a5f12623SSimon Moll; CHECK-NEXT: vscu %v0, %v1, 0, 0 41a5f12623SSimon Moll; CHECK-NEXT: b.l.t (, %s10) 42*b006b60dSNikita Popov call void @llvm.masked.scatter.v256f32.v256p0(<256 x float> %V, <256 x ptr> %P, i32 4, <256 x i1> %M) 43a5f12623SSimon Moll ret void 44a5f12623SSimon Moll} 45a5f12623SSimon Moll 46*b006b60dSNikita Popovdeclare void @llvm.masked.scatter.v256i32.v256p0(<256 x i32>, <256 x ptr>, i32 immarg, <256 x i1>) #0 47a5f12623SSimon Moll 48a5f12623SSimon Moll; Function Attrs: nounwind 49*b006b60dSNikita Popovdefine fastcc void @vec_mscatter_v256i32(<256 x i32> %V, <256 x ptr> %P, <256 x i1> %M) { 50a5f12623SSimon Moll; CHECK-LABEL: vec_mscatter_v256i32: 51a5f12623SSimon Moll; CHECK: # %bb.0: 52a5f12623SSimon Moll; CHECK-NEXT: lea %s0, 256 53a5f12623SSimon Moll; CHECK-NEXT: lvl %s0 54a5f12623SSimon Moll; CHECK-NEXT: vscl %v0, %v1, 0, 0 55a5f12623SSimon Moll; CHECK-NEXT: b.l.t (, %s10) 56*b006b60dSNikita Popov call void @llvm.masked.scatter.v256i32.v256p0(<256 x i32> %V, <256 x ptr> %P, i32 4, <256 x i1> %M) 57a5f12623SSimon Moll ret void 58a5f12623SSimon Moll} 59a5f12623SSimon Moll 60a5f12623SSimon Mollattributes #0 = { argmemonly nounwind readonly willreturn } 61