190f76844SCraig Topper; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 290f76844SCraig Topper; RUN: llc -mtriple=riscv64 -mattr=+m,+f,+d,+v -verify-machineinstrs -riscv-v-vector-bits-min=128 \ 390f76844SCraig Topper; RUN: < %s | FileCheck %s 490f76844SCraig Topper 590f76844SCraig Topperdefine <2 x double> @test_vp_reverse_v2f64_masked(<2 x double> %src, <2 x i1> %mask, i32 zeroext %evl) { 690f76844SCraig Topper; CHECK-LABEL: test_vp_reverse_v2f64_masked: 790f76844SCraig Topper; CHECK: # %bb.0: 890f76844SCraig Topper; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma 990f76844SCraig Topper; CHECK-NEXT: vid.v v9, v0.t 1090f76844SCraig Topper; CHECK-NEXT: addi a0, a0, -1 1190f76844SCraig Topper; CHECK-NEXT: vrsub.vx v10, v9, a0, v0.t 1290f76844SCraig Topper; CHECK-NEXT: vrgather.vv v9, v8, v10, v0.t 1390f76844SCraig Topper; CHECK-NEXT: vmv.v.v v8, v9 1490f76844SCraig Topper; CHECK-NEXT: ret 1590f76844SCraig Topper %dst = call <2 x double> @llvm.experimental.vp.reverse.v2f64(<2 x double> %src, <2 x i1> %mask, i32 %evl) 1690f76844SCraig Topper ret <2 x double> %dst 1790f76844SCraig Topper} 1890f76844SCraig Topper 1990f76844SCraig Topperdefine <2 x double> @test_vp_reverse_v2f64(<2 x double> %src, i32 zeroext %evl) { 2090f76844SCraig Topper; CHECK-LABEL: test_vp_reverse_v2f64: 2190f76844SCraig Topper; CHECK: # %bb.0: 2290f76844SCraig Topper; CHECK-NEXT: addi a1, a0, -1 2390f76844SCraig Topper; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma 2490f76844SCraig Topper; CHECK-NEXT: vid.v v9 2590f76844SCraig Topper; CHECK-NEXT: vrsub.vx v10, v9, a1 2690f76844SCraig Topper; CHECK-NEXT: vrgather.vv v9, v8, v10 2790f76844SCraig Topper; CHECK-NEXT: vmv.v.v v8, v9 2890f76844SCraig Topper; CHECK-NEXT: ret 2990f76844SCraig Topper 30*d8d131dfSLuke Lau %dst = call <2 x double> @llvm.experimental.vp.reverse.v2f64(<2 x double> %src, <2 x i1> splat (i1 1), i32 %evl) 3190f76844SCraig Topper ret <2 x double> %dst 3290f76844SCraig Topper} 3390f76844SCraig Topper 3490f76844SCraig Topperdefine <4 x float> @test_vp_reverse_v4f32_masked(<4 x float> %src, <4 x i1> %mask, i32 zeroext %evl) { 3590f76844SCraig Topper; CHECK-LABEL: test_vp_reverse_v4f32_masked: 3690f76844SCraig Topper; CHECK: # %bb.0: 3790f76844SCraig Topper; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma 3890f76844SCraig Topper; CHECK-NEXT: vid.v v9, v0.t 3990f76844SCraig Topper; CHECK-NEXT: addi a0, a0, -1 4090f76844SCraig Topper; CHECK-NEXT: vrsub.vx v10, v9, a0, v0.t 4190f76844SCraig Topper; CHECK-NEXT: vrgather.vv v9, v8, v10, v0.t 4290f76844SCraig Topper; CHECK-NEXT: vmv.v.v v8, v9 4390f76844SCraig Topper; CHECK-NEXT: ret 4490f76844SCraig Topper %dst = call <4 x float> @llvm.experimental.vp.reverse.v4f32(<4 x float> %src, <4 x i1> %mask, i32 %evl) 4590f76844SCraig Topper ret <4 x float> %dst 4690f76844SCraig Topper} 4790f76844SCraig Topper 4890f76844SCraig Topperdefine <4 x float> @test_vp_reverse_v4f32(<4 x float> %src, i32 zeroext %evl) { 4990f76844SCraig Topper; CHECK-LABEL: test_vp_reverse_v4f32: 5090f76844SCraig Topper; CHECK: # %bb.0: 5190f76844SCraig Topper; CHECK-NEXT: addi a1, a0, -1 5290f76844SCraig Topper; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma 5390f76844SCraig Topper; CHECK-NEXT: vid.v v9 5490f76844SCraig Topper; CHECK-NEXT: vrsub.vx v10, v9, a1 5590f76844SCraig Topper; CHECK-NEXT: vrgather.vv v9, v8, v10 5690f76844SCraig Topper; CHECK-NEXT: vmv.v.v v8, v9 5790f76844SCraig Topper; CHECK-NEXT: ret 5890f76844SCraig Topper 59*d8d131dfSLuke Lau %dst = call <4 x float> @llvm.experimental.vp.reverse.v4f32(<4 x float> %src, <4 x i1> splat (i1 1), i32 %evl) 6090f76844SCraig Topper ret <4 x float> %dst 6190f76844SCraig Topper} 6290f76844SCraig Topper 6390f76844SCraig Topperdeclare <2 x double> @llvm.experimental.vp.reverse.v2f64(<2 x double>,<2 x i1>,i32) 6490f76844SCraig Topperdeclare <4 x float> @llvm.experimental.vp.reverse.v4f32(<4 x float>,<4 x i1>,i32) 65