xref: /llvm-project/llvm/test/CodeGen/RISCV/rvv/riscv-codegenprepare.ll (revision 15b0fabb21af8395c1b810e7d992a869b9ef31d8)
1*15b0fabbSLuke Lau; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 4
2*15b0fabbSLuke Lau; RUN: opt %s -S -riscv-codegenprepare -mtriple=riscv64 -mattr=+v | FileCheck %s
3*15b0fabbSLuke Lau
4*15b0fabbSLuke Laudeclare i64 @llvm.vscale.i64()
5*15b0fabbSLuke Laudeclare float @llvm.vector.reduce.fadd.nxv4f32(float, <vscale x 4 x float>)
6*15b0fabbSLuke Lau
7*15b0fabbSLuke Laudefine float @reduce_fadd(ptr %f) {
8*15b0fabbSLuke Lau; CHECK-LABEL: define float @reduce_fadd(
9*15b0fabbSLuke Lau; CHECK-SAME: ptr [[F:%.*]]) #[[ATTR2:[0-9]+]] {
10*15b0fabbSLuke Lau; CHECK-NEXT:  entry:
11*15b0fabbSLuke Lau; CHECK-NEXT:    [[VSCALE:%.*]] = tail call i64 @llvm.vscale.i64()
12*15b0fabbSLuke Lau; CHECK-NEXT:    [[VECSIZE:%.*]] = shl nuw nsw i64 [[VSCALE]], 2
13*15b0fabbSLuke Lau; CHECK-NEXT:    br label [[VECTOR_BODY:%.*]]
14*15b0fabbSLuke Lau; CHECK:       vector.body:
15*15b0fabbSLuke Lau; CHECK-NEXT:    [[INDEX:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
16*15b0fabbSLuke Lau; CHECK-NEXT:    [[TMP0:%.*]] = phi <vscale x 4 x float> [ insertelement (<vscale x 4 x float> poison, float 0.000000e+00, i64 0), [[ENTRY]] ], [ [[TMP2:%.*]], [[VECTOR_BODY]] ]
17*15b0fabbSLuke Lau; CHECK-NEXT:    [[GEP:%.*]] = getelementptr inbounds float, ptr [[F]], i64 [[INDEX]]
18*15b0fabbSLuke Lau; CHECK-NEXT:    [[WIDE_LOAD:%.*]] = load <vscale x 4 x float>, ptr [[GEP]], align 4
19*15b0fabbSLuke Lau; CHECK-NEXT:    [[TMP1:%.*]] = extractelement <vscale x 4 x float> [[TMP0]], i64 0
20*15b0fabbSLuke Lau; CHECK-NEXT:    [[ACC:%.*]] = tail call float @llvm.vector.reduce.fadd.nxv4f32(float [[TMP1]], <vscale x 4 x float> [[WIDE_LOAD]])
21*15b0fabbSLuke Lau; CHECK-NEXT:    [[INDEX_NEXT]] = add nuw i64 [[INDEX]], [[VECSIZE]]
22*15b0fabbSLuke Lau; CHECK-NEXT:    [[DONE:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1024
23*15b0fabbSLuke Lau; CHECK-NEXT:    [[TMP2]] = insertelement <vscale x 4 x float> poison, float [[ACC]], i64 0
24*15b0fabbSLuke Lau; CHECK-NEXT:    br i1 [[DONE]], label [[EXIT:%.*]], label [[VECTOR_BODY]]
25*15b0fabbSLuke Lau; CHECK:       exit:
26*15b0fabbSLuke Lau; CHECK-NEXT:    ret float [[ACC]]
27*15b0fabbSLuke Lau;
28*15b0fabbSLuke Lau
29*15b0fabbSLuke Lauentry:
30*15b0fabbSLuke Lau  %vscale = tail call i64 @llvm.vscale.i64()
31*15b0fabbSLuke Lau  %vecsize = shl nuw nsw i64 %vscale, 2
32*15b0fabbSLuke Lau  br label %vector.body
33*15b0fabbSLuke Lau
34*15b0fabbSLuke Lauvector.body:
35*15b0fabbSLuke Lau  %index = phi i64 [ 0, %entry ], [ %index.next, %vector.body ]
36*15b0fabbSLuke Lau  %vec.phi = phi float [ 0.000000e+00, %entry ], [ %acc, %vector.body ]
37*15b0fabbSLuke Lau  %gep = getelementptr inbounds float, ptr %f, i64 %index
38*15b0fabbSLuke Lau  %wide.load = load <vscale x 4 x float>, ptr %gep, align 4
39*15b0fabbSLuke Lau  %acc = tail call float @llvm.vector.reduce.fadd.nxv4f32(float %vec.phi, <vscale x 4 x float> %wide.load)
40*15b0fabbSLuke Lau  %index.next = add nuw i64 %index, %vecsize
41*15b0fabbSLuke Lau  %done = icmp eq i64 %index.next, 1024
42*15b0fabbSLuke Lau  br i1 %done, label %exit, label %vector.body
43*15b0fabbSLuke Lau
44*15b0fabbSLuke Lauexit:
45*15b0fabbSLuke Lau  ret float %acc
46*15b0fabbSLuke Lau}
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