16da5968fSLuke Lau; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5 26da5968fSLuke Lau; RUN: llc < %s -mtriple=riscv32 -mattr=+v -verify-machineinstrs | FileCheck %s 36da5968fSLuke Lau; RUN: llc < %s -mtriple=riscv64 -mattr=+v -verify-machineinstrs | FileCheck %s 46da5968fSLuke Lau 56da5968fSLuke Laudefine <8 x float> @fpext_v8bf16(<8 x bfloat> %x) { 66da5968fSLuke Lau; CHECK-LABEL: fpext_v8bf16: 76da5968fSLuke Lau; CHECK: # %bb.0: 86da5968fSLuke Lau; CHECK-NEXT: fmv.x.w a0, fa0 96da5968fSLuke Lau; CHECK-NEXT: fmv.x.w a1, fa1 106da5968fSLuke Lau; CHECK-NEXT: fmv.x.w a2, fa2 116da5968fSLuke Lau; CHECK-NEXT: fmv.x.w a3, fa3 126da5968fSLuke Lau; CHECK-NEXT: fmv.x.w a4, fa4 136da5968fSLuke Lau; CHECK-NEXT: fmv.x.w a5, fa5 146da5968fSLuke Lau; CHECK-NEXT: fmv.x.w a6, fa6 156da5968fSLuke Lau; CHECK-NEXT: fmv.x.w a7, fa7 166da5968fSLuke Lau; CHECK-NEXT: slli a7, a7, 16 17*9122c523SPengcheng Wang; CHECK-NEXT: slli a6, a6, 16 18*9122c523SPengcheng Wang; CHECK-NEXT: slli a5, a5, 16 19*9122c523SPengcheng Wang; CHECK-NEXT: slli a4, a4, 16 20*9122c523SPengcheng Wang; CHECK-NEXT: slli a3, a3, 16 21*9122c523SPengcheng Wang; CHECK-NEXT: slli a2, a2, 16 22*9122c523SPengcheng Wang; CHECK-NEXT: slli a1, a1, 16 23*9122c523SPengcheng Wang; CHECK-NEXT: slli a0, a0, 16 246da5968fSLuke Lau; CHECK-NEXT: vsetivli zero, 2, e32, mf2, ta, ma 256da5968fSLuke Lau; CHECK-NEXT: vmv.s.x v8, a7 266da5968fSLuke Lau; CHECK-NEXT: vmv.s.x v9, a6 27*9122c523SPengcheng Wang; CHECK-NEXT: vmv.s.x v10, a5 28*9122c523SPengcheng Wang; CHECK-NEXT: vmv.s.x v12, a4 29*9122c523SPengcheng Wang; CHECK-NEXT: vmv.s.x v11, a3 30*9122c523SPengcheng Wang; CHECK-NEXT: vmv.s.x v13, a2 316da5968fSLuke Lau; CHECK-NEXT: vslideup.vi v9, v8, 1 32*9122c523SPengcheng Wang; CHECK-NEXT: vmv.s.x v14, a1 33*9122c523SPengcheng Wang; CHECK-NEXT: vslideup.vi v12, v10, 1 34*9122c523SPengcheng Wang; CHECK-NEXT: vslideup.vi v13, v11, 1 356da5968fSLuke Lau; CHECK-NEXT: vmv.s.x v8, a0 36*9122c523SPengcheng Wang; CHECK-NEXT: vslideup.vi v8, v14, 1 376da5968fSLuke Lau; CHECK-NEXT: vsetivli zero, 4, e32, m1, ta, ma 38*9122c523SPengcheng Wang; CHECK-NEXT: vslideup.vi v12, v9, 2 39*9122c523SPengcheng Wang; CHECK-NEXT: vslideup.vi v8, v13, 2 406da5968fSLuke Lau; CHECK-NEXT: vsetivli zero, 8, e32, m2, ta, ma 41*9122c523SPengcheng Wang; CHECK-NEXT: vslideup.vi v8, v12, 4 426da5968fSLuke Lau; CHECK-NEXT: ret 436da5968fSLuke Lau %y = fpext <8 x bfloat> %x to <8 x float> 446da5968fSLuke Lau ret <8 x float> %y 456da5968fSLuke Lau} 466da5968fSLuke Lau 476da5968fSLuke Laudefine <8 x float> @fpext_v8f16(<8 x bfloat> %x) { 486da5968fSLuke Lau; CHECK-LABEL: fpext_v8f16: 496da5968fSLuke Lau; CHECK: # %bb.0: 506da5968fSLuke Lau; CHECK-NEXT: fmv.x.w a0, fa0 516da5968fSLuke Lau; CHECK-NEXT: fmv.x.w a1, fa1 526da5968fSLuke Lau; CHECK-NEXT: fmv.x.w a2, fa2 536da5968fSLuke Lau; CHECK-NEXT: fmv.x.w a3, fa3 546da5968fSLuke Lau; CHECK-NEXT: fmv.x.w a4, fa4 556da5968fSLuke Lau; CHECK-NEXT: fmv.x.w a5, fa5 566da5968fSLuke Lau; CHECK-NEXT: fmv.x.w a6, fa6 576da5968fSLuke Lau; CHECK-NEXT: fmv.x.w a7, fa7 586da5968fSLuke Lau; CHECK-NEXT: slli a7, a7, 16 59*9122c523SPengcheng Wang; CHECK-NEXT: slli a6, a6, 16 60*9122c523SPengcheng Wang; CHECK-NEXT: slli a5, a5, 16 61*9122c523SPengcheng Wang; CHECK-NEXT: slli a4, a4, 16 62*9122c523SPengcheng Wang; CHECK-NEXT: slli a3, a3, 16 63*9122c523SPengcheng Wang; CHECK-NEXT: slli a2, a2, 16 64*9122c523SPengcheng Wang; CHECK-NEXT: slli a1, a1, 16 65*9122c523SPengcheng Wang; CHECK-NEXT: slli a0, a0, 16 666da5968fSLuke Lau; CHECK-NEXT: vsetivli zero, 2, e32, mf2, ta, ma 676da5968fSLuke Lau; CHECK-NEXT: vmv.s.x v8, a7 686da5968fSLuke Lau; CHECK-NEXT: vmv.s.x v9, a6 69*9122c523SPengcheng Wang; CHECK-NEXT: vmv.s.x v10, a5 70*9122c523SPengcheng Wang; CHECK-NEXT: vmv.s.x v12, a4 71*9122c523SPengcheng Wang; CHECK-NEXT: vmv.s.x v11, a3 72*9122c523SPengcheng Wang; CHECK-NEXT: vmv.s.x v13, a2 736da5968fSLuke Lau; CHECK-NEXT: vslideup.vi v9, v8, 1 74*9122c523SPengcheng Wang; CHECK-NEXT: vmv.s.x v14, a1 75*9122c523SPengcheng Wang; CHECK-NEXT: vslideup.vi v12, v10, 1 76*9122c523SPengcheng Wang; CHECK-NEXT: vslideup.vi v13, v11, 1 776da5968fSLuke Lau; CHECK-NEXT: vmv.s.x v8, a0 78*9122c523SPengcheng Wang; CHECK-NEXT: vslideup.vi v8, v14, 1 796da5968fSLuke Lau; CHECK-NEXT: vsetivli zero, 4, e32, m1, ta, ma 80*9122c523SPengcheng Wang; CHECK-NEXT: vslideup.vi v12, v9, 2 81*9122c523SPengcheng Wang; CHECK-NEXT: vslideup.vi v8, v13, 2 826da5968fSLuke Lau; CHECK-NEXT: vsetivli zero, 8, e32, m2, ta, ma 83*9122c523SPengcheng Wang; CHECK-NEXT: vslideup.vi v8, v12, 4 846da5968fSLuke Lau; CHECK-NEXT: ret 856da5968fSLuke Lau %y = fpext <8 x bfloat> %x to <8 x float> 866da5968fSLuke Lau ret <8 x float> %y 876da5968fSLuke Lau} 886da5968fSLuke Lau 89