xref: /llvm-project/llvm/test/CodeGen/PowerPC/vector-reduce-umin.ll (revision e9d12c248013b2d2b9880436727857e0ec8a7085)
1*e9d12c24SStefan Pintilie; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2*e9d12c24SStefan Pintilie; RUN: llc -verify-machineinstrs -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr \
3*e9d12c24SStefan Pintilie; RUN:   -mcpu=pwr9 -mtriple=powerpc64le < %s | FileCheck %s --check-prefix=PWR9LE
4*e9d12c24SStefan Pintilie; RUN: llc -verify-machineinstrs -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr \
5*e9d12c24SStefan Pintilie; RUN:   -mcpu=pwr9 -mtriple=powerpc64 < %s | FileCheck %s --check-prefix=PWR9BE
6*e9d12c24SStefan Pintilie; RUN: llc -verify-machineinstrs -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr \
7*e9d12c24SStefan Pintilie; RUN:   -mcpu=pwr10 -mtriple=powerpc64le < %s | FileCheck %s --check-prefix=PWR10LE
8*e9d12c24SStefan Pintilie; RUN: llc -verify-machineinstrs -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr \
9*e9d12c24SStefan Pintilie; RUN:   -mcpu=pwr10 -mtriple=powerpc64 < %s | FileCheck %s --check-prefix=PWR10BE
10*e9d12c24SStefan Pintilie
11*e9d12c24SStefan Pintilie;;
12*e9d12c24SStefan Pintilie;; Vectors of type i8
13*e9d12c24SStefan Pintilie;;
14*e9d12c24SStefan Pintiliedefine dso_local i8 @v2i8(<2 x i8> %a) local_unnamed_addr #0 {
15*e9d12c24SStefan Pintilie; PWR9LE-LABEL: v2i8:
16*e9d12c24SStefan Pintilie; PWR9LE:       # %bb.0: # %entry
17*e9d12c24SStefan Pintilie; PWR9LE-NEXT:    vspltb v3, v2, 14
18*e9d12c24SStefan Pintilie; PWR9LE-NEXT:    li r3, 0
19*e9d12c24SStefan Pintilie; PWR9LE-NEXT:    vminub v2, v2, v3
20*e9d12c24SStefan Pintilie; PWR9LE-NEXT:    vextubrx r3, r3, v2
21*e9d12c24SStefan Pintilie; PWR9LE-NEXT:    blr
22*e9d12c24SStefan Pintilie;
23*e9d12c24SStefan Pintilie; PWR9BE-LABEL: v2i8:
24*e9d12c24SStefan Pintilie; PWR9BE:       # %bb.0: # %entry
25*e9d12c24SStefan Pintilie; PWR9BE-NEXT:    vspltb v3, v2, 1
26*e9d12c24SStefan Pintilie; PWR9BE-NEXT:    li r3, 0
27*e9d12c24SStefan Pintilie; PWR9BE-NEXT:    vminub v2, v2, v3
28*e9d12c24SStefan Pintilie; PWR9BE-NEXT:    vextublx r3, r3, v2
29*e9d12c24SStefan Pintilie; PWR9BE-NEXT:    blr
30*e9d12c24SStefan Pintilie;
31*e9d12c24SStefan Pintilie; PWR10LE-LABEL: v2i8:
32*e9d12c24SStefan Pintilie; PWR10LE:       # %bb.0: # %entry
33*e9d12c24SStefan Pintilie; PWR10LE-NEXT:    vspltb v3, v2, 14
34*e9d12c24SStefan Pintilie; PWR10LE-NEXT:    li r3, 0
35*e9d12c24SStefan Pintilie; PWR10LE-NEXT:    vminub v2, v2, v3
36*e9d12c24SStefan Pintilie; PWR10LE-NEXT:    vextubrx r3, r3, v2
37*e9d12c24SStefan Pintilie; PWR10LE-NEXT:    blr
38*e9d12c24SStefan Pintilie;
39*e9d12c24SStefan Pintilie; PWR10BE-LABEL: v2i8:
40*e9d12c24SStefan Pintilie; PWR10BE:       # %bb.0: # %entry
41*e9d12c24SStefan Pintilie; PWR10BE-NEXT:    vspltb v3, v2, 1
42*e9d12c24SStefan Pintilie; PWR10BE-NEXT:    li r3, 0
43*e9d12c24SStefan Pintilie; PWR10BE-NEXT:    vminub v2, v2, v3
44*e9d12c24SStefan Pintilie; PWR10BE-NEXT:    vextublx r3, r3, v2
45*e9d12c24SStefan Pintilie; PWR10BE-NEXT:    blr
46*e9d12c24SStefan Pintilieentry:
47*e9d12c24SStefan Pintilie  %0 = call i8 @llvm.vector.reduce.umin.v2i8(<2 x i8> %a)
48*e9d12c24SStefan Pintilie  ret i8 %0
49*e9d12c24SStefan Pintilie}
50*e9d12c24SStefan Pintilie
51*e9d12c24SStefan Pintiliedefine dso_local i8 @v4i8(<4 x i8> %a) local_unnamed_addr #0 {
52*e9d12c24SStefan Pintilie; PWR9LE-LABEL: v4i8:
53*e9d12c24SStefan Pintilie; PWR9LE:       # %bb.0: # %entry
54*e9d12c24SStefan Pintilie; PWR9LE-NEXT:    vsplth v3, v2, 6
55*e9d12c24SStefan Pintilie; PWR9LE-NEXT:    li r3, 0
56*e9d12c24SStefan Pintilie; PWR9LE-NEXT:    vminub v2, v2, v3
57*e9d12c24SStefan Pintilie; PWR9LE-NEXT:    vspltb v3, v2, 14
58*e9d12c24SStefan Pintilie; PWR9LE-NEXT:    vminub v2, v2, v3
59*e9d12c24SStefan Pintilie; PWR9LE-NEXT:    vextubrx r3, r3, v2
60*e9d12c24SStefan Pintilie; PWR9LE-NEXT:    blr
61*e9d12c24SStefan Pintilie;
62*e9d12c24SStefan Pintilie; PWR9BE-LABEL: v4i8:
63*e9d12c24SStefan Pintilie; PWR9BE:       # %bb.0: # %entry
64*e9d12c24SStefan Pintilie; PWR9BE-NEXT:    vsplth v3, v2, 1
65*e9d12c24SStefan Pintilie; PWR9BE-NEXT:    li r3, 0
66*e9d12c24SStefan Pintilie; PWR9BE-NEXT:    vminub v2, v2, v3
67*e9d12c24SStefan Pintilie; PWR9BE-NEXT:    vspltb v3, v2, 1
68*e9d12c24SStefan Pintilie; PWR9BE-NEXT:    vminub v2, v2, v3
69*e9d12c24SStefan Pintilie; PWR9BE-NEXT:    vextublx r3, r3, v2
70*e9d12c24SStefan Pintilie; PWR9BE-NEXT:    blr
71*e9d12c24SStefan Pintilie;
72*e9d12c24SStefan Pintilie; PWR10LE-LABEL: v4i8:
73*e9d12c24SStefan Pintilie; PWR10LE:       # %bb.0: # %entry
74*e9d12c24SStefan Pintilie; PWR10LE-NEXT:    vsplth v3, v2, 6
75*e9d12c24SStefan Pintilie; PWR10LE-NEXT:    li r3, 0
76*e9d12c24SStefan Pintilie; PWR10LE-NEXT:    vminub v2, v2, v3
77*e9d12c24SStefan Pintilie; PWR10LE-NEXT:    vspltb v3, v2, 14
78*e9d12c24SStefan Pintilie; PWR10LE-NEXT:    vminub v2, v2, v3
79*e9d12c24SStefan Pintilie; PWR10LE-NEXT:    vextubrx r3, r3, v2
80*e9d12c24SStefan Pintilie; PWR10LE-NEXT:    blr
81*e9d12c24SStefan Pintilie;
82*e9d12c24SStefan Pintilie; PWR10BE-LABEL: v4i8:
83*e9d12c24SStefan Pintilie; PWR10BE:       # %bb.0: # %entry
84*e9d12c24SStefan Pintilie; PWR10BE-NEXT:    vsplth v3, v2, 1
85*e9d12c24SStefan Pintilie; PWR10BE-NEXT:    li r3, 0
86*e9d12c24SStefan Pintilie; PWR10BE-NEXT:    vminub v2, v2, v3
87*e9d12c24SStefan Pintilie; PWR10BE-NEXT:    vspltb v3, v2, 1
88*e9d12c24SStefan Pintilie; PWR10BE-NEXT:    vminub v2, v2, v3
89*e9d12c24SStefan Pintilie; PWR10BE-NEXT:    vextublx r3, r3, v2
90*e9d12c24SStefan Pintilie; PWR10BE-NEXT:    blr
91*e9d12c24SStefan Pintilieentry:
92*e9d12c24SStefan Pintilie  %0 = call i8 @llvm.vector.reduce.umin.v4i8(<4 x i8> %a)
93*e9d12c24SStefan Pintilie  ret i8 %0
94*e9d12c24SStefan Pintilie}
95*e9d12c24SStefan Pintilie
96*e9d12c24SStefan Pintiliedefine dso_local i8 @v8i8(<8 x i8> %a) local_unnamed_addr #0 {
97*e9d12c24SStefan Pintilie; PWR9LE-LABEL: v8i8:
98*e9d12c24SStefan Pintilie; PWR9LE:       # %bb.0: # %entry
99*e9d12c24SStefan Pintilie; PWR9LE-NEXT:    xxspltw v3, v2, 2
100*e9d12c24SStefan Pintilie; PWR9LE-NEXT:    li r3, 0
101*e9d12c24SStefan Pintilie; PWR9LE-NEXT:    vminub v2, v2, v3
102*e9d12c24SStefan Pintilie; PWR9LE-NEXT:    vsplth v3, v2, 6
103*e9d12c24SStefan Pintilie; PWR9LE-NEXT:    vminub v2, v2, v3
104*e9d12c24SStefan Pintilie; PWR9LE-NEXT:    vspltb v3, v2, 14
105*e9d12c24SStefan Pintilie; PWR9LE-NEXT:    vminub v2, v2, v3
106*e9d12c24SStefan Pintilie; PWR9LE-NEXT:    vextubrx r3, r3, v2
107*e9d12c24SStefan Pintilie; PWR9LE-NEXT:    blr
108*e9d12c24SStefan Pintilie;
109*e9d12c24SStefan Pintilie; PWR9BE-LABEL: v8i8:
110*e9d12c24SStefan Pintilie; PWR9BE:       # %bb.0: # %entry
111*e9d12c24SStefan Pintilie; PWR9BE-NEXT:    xxspltw v3, v2, 1
112*e9d12c24SStefan Pintilie; PWR9BE-NEXT:    li r3, 0
113*e9d12c24SStefan Pintilie; PWR9BE-NEXT:    vminub v2, v2, v3
114*e9d12c24SStefan Pintilie; PWR9BE-NEXT:    vsplth v3, v2, 1
115*e9d12c24SStefan Pintilie; PWR9BE-NEXT:    vminub v2, v2, v3
116*e9d12c24SStefan Pintilie; PWR9BE-NEXT:    vspltb v3, v2, 1
117*e9d12c24SStefan Pintilie; PWR9BE-NEXT:    vminub v2, v2, v3
118*e9d12c24SStefan Pintilie; PWR9BE-NEXT:    vextublx r3, r3, v2
119*e9d12c24SStefan Pintilie; PWR9BE-NEXT:    blr
120*e9d12c24SStefan Pintilie;
121*e9d12c24SStefan Pintilie; PWR10LE-LABEL: v8i8:
122*e9d12c24SStefan Pintilie; PWR10LE:       # %bb.0: # %entry
123*e9d12c24SStefan Pintilie; PWR10LE-NEXT:    xxspltw v3, v2, 2
124*e9d12c24SStefan Pintilie; PWR10LE-NEXT:    li r3, 0
125*e9d12c24SStefan Pintilie; PWR10LE-NEXT:    vminub v2, v2, v3
126*e9d12c24SStefan Pintilie; PWR10LE-NEXT:    vsplth v3, v2, 6
127*e9d12c24SStefan Pintilie; PWR10LE-NEXT:    vminub v2, v2, v3
128*e9d12c24SStefan Pintilie; PWR10LE-NEXT:    vspltb v3, v2, 14
129*e9d12c24SStefan Pintilie; PWR10LE-NEXT:    vminub v2, v2, v3
130*e9d12c24SStefan Pintilie; PWR10LE-NEXT:    vextubrx r3, r3, v2
131*e9d12c24SStefan Pintilie; PWR10LE-NEXT:    blr
132*e9d12c24SStefan Pintilie;
133*e9d12c24SStefan Pintilie; PWR10BE-LABEL: v8i8:
134*e9d12c24SStefan Pintilie; PWR10BE:       # %bb.0: # %entry
135*e9d12c24SStefan Pintilie; PWR10BE-NEXT:    xxspltw v3, v2, 1
136*e9d12c24SStefan Pintilie; PWR10BE-NEXT:    li r3, 0
137*e9d12c24SStefan Pintilie; PWR10BE-NEXT:    vminub v2, v2, v3
138*e9d12c24SStefan Pintilie; PWR10BE-NEXT:    vsplth v3, v2, 1
139*e9d12c24SStefan Pintilie; PWR10BE-NEXT:    vminub v2, v2, v3
140*e9d12c24SStefan Pintilie; PWR10BE-NEXT:    vspltb v3, v2, 1
141*e9d12c24SStefan Pintilie; PWR10BE-NEXT:    vminub v2, v2, v3
142*e9d12c24SStefan Pintilie; PWR10BE-NEXT:    vextublx r3, r3, v2
143*e9d12c24SStefan Pintilie; PWR10BE-NEXT:    blr
144*e9d12c24SStefan Pintilieentry:
145*e9d12c24SStefan Pintilie  %0 = call i8 @llvm.vector.reduce.umin.v8i8(<8 x i8> %a)
146*e9d12c24SStefan Pintilie  ret i8 %0
147*e9d12c24SStefan Pintilie}
148*e9d12c24SStefan Pintilie
149*e9d12c24SStefan Pintiliedefine dso_local i8 @v16i8(<16 x i8> %a) local_unnamed_addr #0 {
150*e9d12c24SStefan Pintilie; PWR9LE-LABEL: v16i8:
151*e9d12c24SStefan Pintilie; PWR9LE:       # %bb.0: # %entry
152*e9d12c24SStefan Pintilie; PWR9LE-NEXT:    xxswapd v3, v2
153*e9d12c24SStefan Pintilie; PWR9LE-NEXT:    li r3, 0
154*e9d12c24SStefan Pintilie; PWR9LE-NEXT:    vminub v2, v2, v3
155*e9d12c24SStefan Pintilie; PWR9LE-NEXT:    xxspltw v3, v2, 2
156*e9d12c24SStefan Pintilie; PWR9LE-NEXT:    vminub v2, v2, v3
157*e9d12c24SStefan Pintilie; PWR9LE-NEXT:    vsplth v3, v2, 6
158*e9d12c24SStefan Pintilie; PWR9LE-NEXT:    vminub v2, v2, v3
159*e9d12c24SStefan Pintilie; PWR9LE-NEXT:    vspltb v3, v2, 14
160*e9d12c24SStefan Pintilie; PWR9LE-NEXT:    vminub v2, v2, v3
161*e9d12c24SStefan Pintilie; PWR9LE-NEXT:    vextubrx r3, r3, v2
162*e9d12c24SStefan Pintilie; PWR9LE-NEXT:    blr
163*e9d12c24SStefan Pintilie;
164*e9d12c24SStefan Pintilie; PWR9BE-LABEL: v16i8:
165*e9d12c24SStefan Pintilie; PWR9BE:       # %bb.0: # %entry
166*e9d12c24SStefan Pintilie; PWR9BE-NEXT:    xxswapd v3, v2
167*e9d12c24SStefan Pintilie; PWR9BE-NEXT:    li r3, 0
168*e9d12c24SStefan Pintilie; PWR9BE-NEXT:    vminub v2, v2, v3
169*e9d12c24SStefan Pintilie; PWR9BE-NEXT:    xxspltw v3, v2, 1
170*e9d12c24SStefan Pintilie; PWR9BE-NEXT:    vminub v2, v2, v3
171*e9d12c24SStefan Pintilie; PWR9BE-NEXT:    vsplth v3, v2, 1
172*e9d12c24SStefan Pintilie; PWR9BE-NEXT:    vminub v2, v2, v3
173*e9d12c24SStefan Pintilie; PWR9BE-NEXT:    vspltb v3, v2, 1
174*e9d12c24SStefan Pintilie; PWR9BE-NEXT:    vminub v2, v2, v3
175*e9d12c24SStefan Pintilie; PWR9BE-NEXT:    vextublx r3, r3, v2
176*e9d12c24SStefan Pintilie; PWR9BE-NEXT:    blr
177*e9d12c24SStefan Pintilie;
178*e9d12c24SStefan Pintilie; PWR10LE-LABEL: v16i8:
179*e9d12c24SStefan Pintilie; PWR10LE:       # %bb.0: # %entry
180*e9d12c24SStefan Pintilie; PWR10LE-NEXT:    xxswapd v3, v2
181*e9d12c24SStefan Pintilie; PWR10LE-NEXT:    li r3, 0
182*e9d12c24SStefan Pintilie; PWR10LE-NEXT:    vminub v2, v2, v3
183*e9d12c24SStefan Pintilie; PWR10LE-NEXT:    xxspltw v3, v2, 2
184*e9d12c24SStefan Pintilie; PWR10LE-NEXT:    vminub v2, v2, v3
185*e9d12c24SStefan Pintilie; PWR10LE-NEXT:    vsplth v3, v2, 6
186*e9d12c24SStefan Pintilie; PWR10LE-NEXT:    vminub v2, v2, v3
187*e9d12c24SStefan Pintilie; PWR10LE-NEXT:    vspltb v3, v2, 14
188*e9d12c24SStefan Pintilie; PWR10LE-NEXT:    vminub v2, v2, v3
189*e9d12c24SStefan Pintilie; PWR10LE-NEXT:    vextubrx r3, r3, v2
190*e9d12c24SStefan Pintilie; PWR10LE-NEXT:    blr
191*e9d12c24SStefan Pintilie;
192*e9d12c24SStefan Pintilie; PWR10BE-LABEL: v16i8:
193*e9d12c24SStefan Pintilie; PWR10BE:       # %bb.0: # %entry
194*e9d12c24SStefan Pintilie; PWR10BE-NEXT:    xxswapd v3, v2
195*e9d12c24SStefan Pintilie; PWR10BE-NEXT:    li r3, 0
196*e9d12c24SStefan Pintilie; PWR10BE-NEXT:    vminub v2, v2, v3
197*e9d12c24SStefan Pintilie; PWR10BE-NEXT:    xxspltw v3, v2, 1
198*e9d12c24SStefan Pintilie; PWR10BE-NEXT:    vminub v2, v2, v3
199*e9d12c24SStefan Pintilie; PWR10BE-NEXT:    vsplth v3, v2, 1
200*e9d12c24SStefan Pintilie; PWR10BE-NEXT:    vminub v2, v2, v3
201*e9d12c24SStefan Pintilie; PWR10BE-NEXT:    vspltb v3, v2, 1
202*e9d12c24SStefan Pintilie; PWR10BE-NEXT:    vminub v2, v2, v3
203*e9d12c24SStefan Pintilie; PWR10BE-NEXT:    vextublx r3, r3, v2
204*e9d12c24SStefan Pintilie; PWR10BE-NEXT:    blr
205*e9d12c24SStefan Pintilieentry:
206*e9d12c24SStefan Pintilie  %0 = call i8 @llvm.vector.reduce.umin.v16i8(<16 x i8> %a)
207*e9d12c24SStefan Pintilie  ret i8 %0
208*e9d12c24SStefan Pintilie}
209*e9d12c24SStefan Pintilie
210*e9d12c24SStefan Pintiliedeclare i8 @llvm.vector.reduce.umin.v2i8(<2 x i8>) #0
211*e9d12c24SStefan Pintiliedeclare i8 @llvm.vector.reduce.umin.v4i8(<4 x i8>) #0
212*e9d12c24SStefan Pintiliedeclare i8 @llvm.vector.reduce.umin.v8i8(<8 x i8>) #0
213*e9d12c24SStefan Pintiliedeclare i8 @llvm.vector.reduce.umin.v16i8(<16 x i8>) #0
214*e9d12c24SStefan Pintilie
215*e9d12c24SStefan Pintilie;;
216*e9d12c24SStefan Pintilie;; Vectors of type i16
217*e9d12c24SStefan Pintilie;;
218*e9d12c24SStefan Pintiliedefine dso_local i16 @v2i16(<2 x i16> %a) local_unnamed_addr #0 {
219*e9d12c24SStefan Pintilie; PWR9LE-LABEL: v2i16:
220*e9d12c24SStefan Pintilie; PWR9LE:       # %bb.0: # %entry
221*e9d12c24SStefan Pintilie; PWR9LE-NEXT:    vsplth v3, v2, 6
222*e9d12c24SStefan Pintilie; PWR9LE-NEXT:    li r3, 0
223*e9d12c24SStefan Pintilie; PWR9LE-NEXT:    vminuh v2, v2, v3
224*e9d12c24SStefan Pintilie; PWR9LE-NEXT:    vextuhrx r3, r3, v2
225*e9d12c24SStefan Pintilie; PWR9LE-NEXT:    blr
226*e9d12c24SStefan Pintilie;
227*e9d12c24SStefan Pintilie; PWR9BE-LABEL: v2i16:
228*e9d12c24SStefan Pintilie; PWR9BE:       # %bb.0: # %entry
229*e9d12c24SStefan Pintilie; PWR9BE-NEXT:    vsplth v3, v2, 1
230*e9d12c24SStefan Pintilie; PWR9BE-NEXT:    li r3, 0
231*e9d12c24SStefan Pintilie; PWR9BE-NEXT:    vminuh v2, v2, v3
232*e9d12c24SStefan Pintilie; PWR9BE-NEXT:    vextuhlx r3, r3, v2
233*e9d12c24SStefan Pintilie; PWR9BE-NEXT:    blr
234*e9d12c24SStefan Pintilie;
235*e9d12c24SStefan Pintilie; PWR10LE-LABEL: v2i16:
236*e9d12c24SStefan Pintilie; PWR10LE:       # %bb.0: # %entry
237*e9d12c24SStefan Pintilie; PWR10LE-NEXT:    vsplth v3, v2, 6
238*e9d12c24SStefan Pintilie; PWR10LE-NEXT:    li r3, 0
239*e9d12c24SStefan Pintilie; PWR10LE-NEXT:    vminuh v2, v2, v3
240*e9d12c24SStefan Pintilie; PWR10LE-NEXT:    vextuhrx r3, r3, v2
241*e9d12c24SStefan Pintilie; PWR10LE-NEXT:    blr
242*e9d12c24SStefan Pintilie;
243*e9d12c24SStefan Pintilie; PWR10BE-LABEL: v2i16:
244*e9d12c24SStefan Pintilie; PWR10BE:       # %bb.0: # %entry
245*e9d12c24SStefan Pintilie; PWR10BE-NEXT:    vsplth v3, v2, 1
246*e9d12c24SStefan Pintilie; PWR10BE-NEXT:    li r3, 0
247*e9d12c24SStefan Pintilie; PWR10BE-NEXT:    vminuh v2, v2, v3
248*e9d12c24SStefan Pintilie; PWR10BE-NEXT:    vextuhlx r3, r3, v2
249*e9d12c24SStefan Pintilie; PWR10BE-NEXT:    blr
250*e9d12c24SStefan Pintilieentry:
251*e9d12c24SStefan Pintilie  %0 = call i16 @llvm.vector.reduce.umin.v2i16(<2 x i16> %a)
252*e9d12c24SStefan Pintilie  ret i16 %0
253*e9d12c24SStefan Pintilie}
254*e9d12c24SStefan Pintilie
255*e9d12c24SStefan Pintiliedefine dso_local i16 @v4i16(<4 x i16> %a) local_unnamed_addr #0 {
256*e9d12c24SStefan Pintilie; PWR9LE-LABEL: v4i16:
257*e9d12c24SStefan Pintilie; PWR9LE:       # %bb.0: # %entry
258*e9d12c24SStefan Pintilie; PWR9LE-NEXT:    xxspltw v3, v2, 2
259*e9d12c24SStefan Pintilie; PWR9LE-NEXT:    li r3, 0
260*e9d12c24SStefan Pintilie; PWR9LE-NEXT:    vminuh v2, v2, v3
261*e9d12c24SStefan Pintilie; PWR9LE-NEXT:    vsplth v3, v2, 6
262*e9d12c24SStefan Pintilie; PWR9LE-NEXT:    vminuh v2, v2, v3
263*e9d12c24SStefan Pintilie; PWR9LE-NEXT:    vextuhrx r3, r3, v2
264*e9d12c24SStefan Pintilie; PWR9LE-NEXT:    blr
265*e9d12c24SStefan Pintilie;
266*e9d12c24SStefan Pintilie; PWR9BE-LABEL: v4i16:
267*e9d12c24SStefan Pintilie; PWR9BE:       # %bb.0: # %entry
268*e9d12c24SStefan Pintilie; PWR9BE-NEXT:    xxspltw v3, v2, 1
269*e9d12c24SStefan Pintilie; PWR9BE-NEXT:    li r3, 0
270*e9d12c24SStefan Pintilie; PWR9BE-NEXT:    vminuh v2, v2, v3
271*e9d12c24SStefan Pintilie; PWR9BE-NEXT:    vsplth v3, v2, 1
272*e9d12c24SStefan Pintilie; PWR9BE-NEXT:    vminuh v2, v2, v3
273*e9d12c24SStefan Pintilie; PWR9BE-NEXT:    vextuhlx r3, r3, v2
274*e9d12c24SStefan Pintilie; PWR9BE-NEXT:    blr
275*e9d12c24SStefan Pintilie;
276*e9d12c24SStefan Pintilie; PWR10LE-LABEL: v4i16:
277*e9d12c24SStefan Pintilie; PWR10LE:       # %bb.0: # %entry
278*e9d12c24SStefan Pintilie; PWR10LE-NEXT:    xxspltw v3, v2, 2
279*e9d12c24SStefan Pintilie; PWR10LE-NEXT:    li r3, 0
280*e9d12c24SStefan Pintilie; PWR10LE-NEXT:    vminuh v2, v2, v3
281*e9d12c24SStefan Pintilie; PWR10LE-NEXT:    vsplth v3, v2, 6
282*e9d12c24SStefan Pintilie; PWR10LE-NEXT:    vminuh v2, v2, v3
283*e9d12c24SStefan Pintilie; PWR10LE-NEXT:    vextuhrx r3, r3, v2
284*e9d12c24SStefan Pintilie; PWR10LE-NEXT:    blr
285*e9d12c24SStefan Pintilie;
286*e9d12c24SStefan Pintilie; PWR10BE-LABEL: v4i16:
287*e9d12c24SStefan Pintilie; PWR10BE:       # %bb.0: # %entry
288*e9d12c24SStefan Pintilie; PWR10BE-NEXT:    xxspltw v3, v2, 1
289*e9d12c24SStefan Pintilie; PWR10BE-NEXT:    li r3, 0
290*e9d12c24SStefan Pintilie; PWR10BE-NEXT:    vminuh v2, v2, v3
291*e9d12c24SStefan Pintilie; PWR10BE-NEXT:    vsplth v3, v2, 1
292*e9d12c24SStefan Pintilie; PWR10BE-NEXT:    vminuh v2, v2, v3
293*e9d12c24SStefan Pintilie; PWR10BE-NEXT:    vextuhlx r3, r3, v2
294*e9d12c24SStefan Pintilie; PWR10BE-NEXT:    blr
295*e9d12c24SStefan Pintilieentry:
296*e9d12c24SStefan Pintilie  %0 = call i16 @llvm.vector.reduce.umin.v4i16(<4 x i16> %a)
297*e9d12c24SStefan Pintilie  ret i16 %0
298*e9d12c24SStefan Pintilie}
299*e9d12c24SStefan Pintilie
300*e9d12c24SStefan Pintiliedefine dso_local i16 @v8i16(<8 x i16> %a) local_unnamed_addr #0 {
301*e9d12c24SStefan Pintilie; PWR9LE-LABEL: v8i16:
302*e9d12c24SStefan Pintilie; PWR9LE:       # %bb.0: # %entry
303*e9d12c24SStefan Pintilie; PWR9LE-NEXT:    xxswapd v3, v2
304*e9d12c24SStefan Pintilie; PWR9LE-NEXT:    li r3, 0
305*e9d12c24SStefan Pintilie; PWR9LE-NEXT:    vminuh v2, v2, v3
306*e9d12c24SStefan Pintilie; PWR9LE-NEXT:    xxspltw v3, v2, 2
307*e9d12c24SStefan Pintilie; PWR9LE-NEXT:    vminuh v2, v2, v3
308*e9d12c24SStefan Pintilie; PWR9LE-NEXT:    vsplth v3, v2, 6
309*e9d12c24SStefan Pintilie; PWR9LE-NEXT:    vminuh v2, v2, v3
310*e9d12c24SStefan Pintilie; PWR9LE-NEXT:    vextuhrx r3, r3, v2
311*e9d12c24SStefan Pintilie; PWR9LE-NEXT:    blr
312*e9d12c24SStefan Pintilie;
313*e9d12c24SStefan Pintilie; PWR9BE-LABEL: v8i16:
314*e9d12c24SStefan Pintilie; PWR9BE:       # %bb.0: # %entry
315*e9d12c24SStefan Pintilie; PWR9BE-NEXT:    xxswapd v3, v2
316*e9d12c24SStefan Pintilie; PWR9BE-NEXT:    li r3, 0
317*e9d12c24SStefan Pintilie; PWR9BE-NEXT:    vminuh v2, v2, v3
318*e9d12c24SStefan Pintilie; PWR9BE-NEXT:    xxspltw v3, v2, 1
319*e9d12c24SStefan Pintilie; PWR9BE-NEXT:    vminuh v2, v2, v3
320*e9d12c24SStefan Pintilie; PWR9BE-NEXT:    vsplth v3, v2, 1
321*e9d12c24SStefan Pintilie; PWR9BE-NEXT:    vminuh v2, v2, v3
322*e9d12c24SStefan Pintilie; PWR9BE-NEXT:    vextuhlx r3, r3, v2
323*e9d12c24SStefan Pintilie; PWR9BE-NEXT:    blr
324*e9d12c24SStefan Pintilie;
325*e9d12c24SStefan Pintilie; PWR10LE-LABEL: v8i16:
326*e9d12c24SStefan Pintilie; PWR10LE:       # %bb.0: # %entry
327*e9d12c24SStefan Pintilie; PWR10LE-NEXT:    xxswapd v3, v2
328*e9d12c24SStefan Pintilie; PWR10LE-NEXT:    li r3, 0
329*e9d12c24SStefan Pintilie; PWR10LE-NEXT:    vminuh v2, v2, v3
330*e9d12c24SStefan Pintilie; PWR10LE-NEXT:    xxspltw v3, v2, 2
331*e9d12c24SStefan Pintilie; PWR10LE-NEXT:    vminuh v2, v2, v3
332*e9d12c24SStefan Pintilie; PWR10LE-NEXT:    vsplth v3, v2, 6
333*e9d12c24SStefan Pintilie; PWR10LE-NEXT:    vminuh v2, v2, v3
334*e9d12c24SStefan Pintilie; PWR10LE-NEXT:    vextuhrx r3, r3, v2
335*e9d12c24SStefan Pintilie; PWR10LE-NEXT:    blr
336*e9d12c24SStefan Pintilie;
337*e9d12c24SStefan Pintilie; PWR10BE-LABEL: v8i16:
338*e9d12c24SStefan Pintilie; PWR10BE:       # %bb.0: # %entry
339*e9d12c24SStefan Pintilie; PWR10BE-NEXT:    xxswapd v3, v2
340*e9d12c24SStefan Pintilie; PWR10BE-NEXT:    li r3, 0
341*e9d12c24SStefan Pintilie; PWR10BE-NEXT:    vminuh v2, v2, v3
342*e9d12c24SStefan Pintilie; PWR10BE-NEXT:    xxspltw v3, v2, 1
343*e9d12c24SStefan Pintilie; PWR10BE-NEXT:    vminuh v2, v2, v3
344*e9d12c24SStefan Pintilie; PWR10BE-NEXT:    vsplth v3, v2, 1
345*e9d12c24SStefan Pintilie; PWR10BE-NEXT:    vminuh v2, v2, v3
346*e9d12c24SStefan Pintilie; PWR10BE-NEXT:    vextuhlx r3, r3, v2
347*e9d12c24SStefan Pintilie; PWR10BE-NEXT:    blr
348*e9d12c24SStefan Pintilieentry:
349*e9d12c24SStefan Pintilie  %0 = call i16 @llvm.vector.reduce.umin.v8i16(<8 x i16> %a)
350*e9d12c24SStefan Pintilie  ret i16 %0
351*e9d12c24SStefan Pintilie}
352*e9d12c24SStefan Pintilie
353*e9d12c24SStefan Pintiliedefine dso_local i16 @v16i16(<16 x i16> %a) local_unnamed_addr #0 {
354*e9d12c24SStefan Pintilie; PWR9LE-LABEL: v16i16:
355*e9d12c24SStefan Pintilie; PWR9LE:       # %bb.0: # %entry
356*e9d12c24SStefan Pintilie; PWR9LE-NEXT:    vminuh v2, v2, v3
357*e9d12c24SStefan Pintilie; PWR9LE-NEXT:    li r3, 0
358*e9d12c24SStefan Pintilie; PWR9LE-NEXT:    xxswapd v3, v2
359*e9d12c24SStefan Pintilie; PWR9LE-NEXT:    vminuh v2, v2, v3
360*e9d12c24SStefan Pintilie; PWR9LE-NEXT:    xxspltw v3, v2, 2
361*e9d12c24SStefan Pintilie; PWR9LE-NEXT:    vminuh v2, v2, v3
362*e9d12c24SStefan Pintilie; PWR9LE-NEXT:    vsplth v3, v2, 6
363*e9d12c24SStefan Pintilie; PWR9LE-NEXT:    vminuh v2, v2, v3
364*e9d12c24SStefan Pintilie; PWR9LE-NEXT:    vextuhrx r3, r3, v2
365*e9d12c24SStefan Pintilie; PWR9LE-NEXT:    blr
366*e9d12c24SStefan Pintilie;
367*e9d12c24SStefan Pintilie; PWR9BE-LABEL: v16i16:
368*e9d12c24SStefan Pintilie; PWR9BE:       # %bb.0: # %entry
369*e9d12c24SStefan Pintilie; PWR9BE-NEXT:    vminuh v2, v2, v3
370*e9d12c24SStefan Pintilie; PWR9BE-NEXT:    li r3, 0
371*e9d12c24SStefan Pintilie; PWR9BE-NEXT:    xxswapd v3, v2
372*e9d12c24SStefan Pintilie; PWR9BE-NEXT:    vminuh v2, v2, v3
373*e9d12c24SStefan Pintilie; PWR9BE-NEXT:    xxspltw v3, v2, 1
374*e9d12c24SStefan Pintilie; PWR9BE-NEXT:    vminuh v2, v2, v3
375*e9d12c24SStefan Pintilie; PWR9BE-NEXT:    vsplth v3, v2, 1
376*e9d12c24SStefan Pintilie; PWR9BE-NEXT:    vminuh v2, v2, v3
377*e9d12c24SStefan Pintilie; PWR9BE-NEXT:    vextuhlx r3, r3, v2
378*e9d12c24SStefan Pintilie; PWR9BE-NEXT:    blr
379*e9d12c24SStefan Pintilie;
380*e9d12c24SStefan Pintilie; PWR10LE-LABEL: v16i16:
381*e9d12c24SStefan Pintilie; PWR10LE:       # %bb.0: # %entry
382*e9d12c24SStefan Pintilie; PWR10LE-NEXT:    vminuh v2, v2, v3
383*e9d12c24SStefan Pintilie; PWR10LE-NEXT:    li r3, 0
384*e9d12c24SStefan Pintilie; PWR10LE-NEXT:    xxswapd v3, v2
385*e9d12c24SStefan Pintilie; PWR10LE-NEXT:    vminuh v2, v2, v3
386*e9d12c24SStefan Pintilie; PWR10LE-NEXT:    xxspltw v3, v2, 2
387*e9d12c24SStefan Pintilie; PWR10LE-NEXT:    vminuh v2, v2, v3
388*e9d12c24SStefan Pintilie; PWR10LE-NEXT:    vsplth v3, v2, 6
389*e9d12c24SStefan Pintilie; PWR10LE-NEXT:    vminuh v2, v2, v3
390*e9d12c24SStefan Pintilie; PWR10LE-NEXT:    vextuhrx r3, r3, v2
391*e9d12c24SStefan Pintilie; PWR10LE-NEXT:    blr
392*e9d12c24SStefan Pintilie;
393*e9d12c24SStefan Pintilie; PWR10BE-LABEL: v16i16:
394*e9d12c24SStefan Pintilie; PWR10BE:       # %bb.0: # %entry
395*e9d12c24SStefan Pintilie; PWR10BE-NEXT:    vminuh v2, v2, v3
396*e9d12c24SStefan Pintilie; PWR10BE-NEXT:    li r3, 0
397*e9d12c24SStefan Pintilie; PWR10BE-NEXT:    xxswapd v3, v2
398*e9d12c24SStefan Pintilie; PWR10BE-NEXT:    vminuh v2, v2, v3
399*e9d12c24SStefan Pintilie; PWR10BE-NEXT:    xxspltw v3, v2, 1
400*e9d12c24SStefan Pintilie; PWR10BE-NEXT:    vminuh v2, v2, v3
401*e9d12c24SStefan Pintilie; PWR10BE-NEXT:    vsplth v3, v2, 1
402*e9d12c24SStefan Pintilie; PWR10BE-NEXT:    vminuh v2, v2, v3
403*e9d12c24SStefan Pintilie; PWR10BE-NEXT:    vextuhlx r3, r3, v2
404*e9d12c24SStefan Pintilie; PWR10BE-NEXT:    blr
405*e9d12c24SStefan Pintilieentry:
406*e9d12c24SStefan Pintilie  %0 = call i16 @llvm.vector.reduce.umin.v16i16(<16 x i16> %a)
407*e9d12c24SStefan Pintilie  ret i16 %0
408*e9d12c24SStefan Pintilie}
409*e9d12c24SStefan Pintilie
410*e9d12c24SStefan Pintiliedeclare i16 @llvm.vector.reduce.umin.v2i16(<2 x i16>) #0
411*e9d12c24SStefan Pintiliedeclare i16 @llvm.vector.reduce.umin.v4i16(<4 x i16>) #0
412*e9d12c24SStefan Pintiliedeclare i16 @llvm.vector.reduce.umin.v8i16(<8 x i16>) #0
413*e9d12c24SStefan Pintiliedeclare i16 @llvm.vector.reduce.umin.v16i16(<16 x i16>) #0
414*e9d12c24SStefan Pintilie
415*e9d12c24SStefan Pintilie;;
416*e9d12c24SStefan Pintilie;; Vectors of type i32
417*e9d12c24SStefan Pintilie;;
418*e9d12c24SStefan Pintiliedefine dso_local i32 @v2i32(<2 x i32> %a) local_unnamed_addr #0 {
419*e9d12c24SStefan Pintilie; PWR9LE-LABEL: v2i32:
420*e9d12c24SStefan Pintilie; PWR9LE:       # %bb.0: # %entry
421*e9d12c24SStefan Pintilie; PWR9LE-NEXT:    xxspltw v3, v2, 2
422*e9d12c24SStefan Pintilie; PWR9LE-NEXT:    li r3, 0
423*e9d12c24SStefan Pintilie; PWR9LE-NEXT:    vminuw v2, v2, v3
424*e9d12c24SStefan Pintilie; PWR9LE-NEXT:    vextuwrx r3, r3, v2
425*e9d12c24SStefan Pintilie; PWR9LE-NEXT:    blr
426*e9d12c24SStefan Pintilie;
427*e9d12c24SStefan Pintilie; PWR9BE-LABEL: v2i32:
428*e9d12c24SStefan Pintilie; PWR9BE:       # %bb.0: # %entry
429*e9d12c24SStefan Pintilie; PWR9BE-NEXT:    xxspltw v3, v2, 1
430*e9d12c24SStefan Pintilie; PWR9BE-NEXT:    li r3, 0
431*e9d12c24SStefan Pintilie; PWR9BE-NEXT:    vminuw v2, v2, v3
432*e9d12c24SStefan Pintilie; PWR9BE-NEXT:    vextuwlx r3, r3, v2
433*e9d12c24SStefan Pintilie; PWR9BE-NEXT:    blr
434*e9d12c24SStefan Pintilie;
435*e9d12c24SStefan Pintilie; PWR10LE-LABEL: v2i32:
436*e9d12c24SStefan Pintilie; PWR10LE:       # %bb.0: # %entry
437*e9d12c24SStefan Pintilie; PWR10LE-NEXT:    xxspltw v3, v2, 2
438*e9d12c24SStefan Pintilie; PWR10LE-NEXT:    li r3, 0
439*e9d12c24SStefan Pintilie; PWR10LE-NEXT:    vminuw v2, v2, v3
440*e9d12c24SStefan Pintilie; PWR10LE-NEXT:    vextuwrx r3, r3, v2
441*e9d12c24SStefan Pintilie; PWR10LE-NEXT:    blr
442*e9d12c24SStefan Pintilie;
443*e9d12c24SStefan Pintilie; PWR10BE-LABEL: v2i32:
444*e9d12c24SStefan Pintilie; PWR10BE:       # %bb.0: # %entry
445*e9d12c24SStefan Pintilie; PWR10BE-NEXT:    xxspltw v3, v2, 1
446*e9d12c24SStefan Pintilie; PWR10BE-NEXT:    li r3, 0
447*e9d12c24SStefan Pintilie; PWR10BE-NEXT:    vminuw v2, v2, v3
448*e9d12c24SStefan Pintilie; PWR10BE-NEXT:    vextuwlx r3, r3, v2
449*e9d12c24SStefan Pintilie; PWR10BE-NEXT:    blr
450*e9d12c24SStefan Pintilieentry:
451*e9d12c24SStefan Pintilie  %0 = call i32 @llvm.vector.reduce.umin.v2i32(<2 x i32> %a)
452*e9d12c24SStefan Pintilie  ret i32 %0
453*e9d12c24SStefan Pintilie}
454*e9d12c24SStefan Pintilie
455*e9d12c24SStefan Pintiliedefine dso_local i32 @v4i32(<4 x i32> %a) local_unnamed_addr #0 {
456*e9d12c24SStefan Pintilie; PWR9LE-LABEL: v4i32:
457*e9d12c24SStefan Pintilie; PWR9LE:       # %bb.0: # %entry
458*e9d12c24SStefan Pintilie; PWR9LE-NEXT:    xxswapd v3, v2
459*e9d12c24SStefan Pintilie; PWR9LE-NEXT:    li r3, 0
460*e9d12c24SStefan Pintilie; PWR9LE-NEXT:    vminuw v2, v2, v3
461*e9d12c24SStefan Pintilie; PWR9LE-NEXT:    xxspltw v3, v2, 2
462*e9d12c24SStefan Pintilie; PWR9LE-NEXT:    vminuw v2, v2, v3
463*e9d12c24SStefan Pintilie; PWR9LE-NEXT:    vextuwrx r3, r3, v2
464*e9d12c24SStefan Pintilie; PWR9LE-NEXT:    blr
465*e9d12c24SStefan Pintilie;
466*e9d12c24SStefan Pintilie; PWR9BE-LABEL: v4i32:
467*e9d12c24SStefan Pintilie; PWR9BE:       # %bb.0: # %entry
468*e9d12c24SStefan Pintilie; PWR9BE-NEXT:    xxswapd v3, v2
469*e9d12c24SStefan Pintilie; PWR9BE-NEXT:    li r3, 0
470*e9d12c24SStefan Pintilie; PWR9BE-NEXT:    vminuw v2, v2, v3
471*e9d12c24SStefan Pintilie; PWR9BE-NEXT:    xxspltw v3, v2, 1
472*e9d12c24SStefan Pintilie; PWR9BE-NEXT:    vminuw v2, v2, v3
473*e9d12c24SStefan Pintilie; PWR9BE-NEXT:    vextuwlx r3, r3, v2
474*e9d12c24SStefan Pintilie; PWR9BE-NEXT:    blr
475*e9d12c24SStefan Pintilie;
476*e9d12c24SStefan Pintilie; PWR10LE-LABEL: v4i32:
477*e9d12c24SStefan Pintilie; PWR10LE:       # %bb.0: # %entry
478*e9d12c24SStefan Pintilie; PWR10LE-NEXT:    xxswapd v3, v2
479*e9d12c24SStefan Pintilie; PWR10LE-NEXT:    li r3, 0
480*e9d12c24SStefan Pintilie; PWR10LE-NEXT:    vminuw v2, v2, v3
481*e9d12c24SStefan Pintilie; PWR10LE-NEXT:    xxspltw v3, v2, 2
482*e9d12c24SStefan Pintilie; PWR10LE-NEXT:    vminuw v2, v2, v3
483*e9d12c24SStefan Pintilie; PWR10LE-NEXT:    vextuwrx r3, r3, v2
484*e9d12c24SStefan Pintilie; PWR10LE-NEXT:    blr
485*e9d12c24SStefan Pintilie;
486*e9d12c24SStefan Pintilie; PWR10BE-LABEL: v4i32:
487*e9d12c24SStefan Pintilie; PWR10BE:       # %bb.0: # %entry
488*e9d12c24SStefan Pintilie; PWR10BE-NEXT:    xxswapd v3, v2
489*e9d12c24SStefan Pintilie; PWR10BE-NEXT:    li r3, 0
490*e9d12c24SStefan Pintilie; PWR10BE-NEXT:    vminuw v2, v2, v3
491*e9d12c24SStefan Pintilie; PWR10BE-NEXT:    xxspltw v3, v2, 1
492*e9d12c24SStefan Pintilie; PWR10BE-NEXT:    vminuw v2, v2, v3
493*e9d12c24SStefan Pintilie; PWR10BE-NEXT:    vextuwlx r3, r3, v2
494*e9d12c24SStefan Pintilie; PWR10BE-NEXT:    blr
495*e9d12c24SStefan Pintilieentry:
496*e9d12c24SStefan Pintilie  %0 = call i32 @llvm.vector.reduce.umin.v4i32(<4 x i32> %a)
497*e9d12c24SStefan Pintilie  ret i32 %0
498*e9d12c24SStefan Pintilie}
499*e9d12c24SStefan Pintilie
500*e9d12c24SStefan Pintiliedefine dso_local i32 @v8i32(<8 x i32> %a) local_unnamed_addr #0 {
501*e9d12c24SStefan Pintilie; PWR9LE-LABEL: v8i32:
502*e9d12c24SStefan Pintilie; PWR9LE:       # %bb.0: # %entry
503*e9d12c24SStefan Pintilie; PWR9LE-NEXT:    vminuw v2, v2, v3
504*e9d12c24SStefan Pintilie; PWR9LE-NEXT:    li r3, 0
505*e9d12c24SStefan Pintilie; PWR9LE-NEXT:    xxswapd v3, v2
506*e9d12c24SStefan Pintilie; PWR9LE-NEXT:    vminuw v2, v2, v3
507*e9d12c24SStefan Pintilie; PWR9LE-NEXT:    xxspltw v3, v2, 2
508*e9d12c24SStefan Pintilie; PWR9LE-NEXT:    vminuw v2, v2, v3
509*e9d12c24SStefan Pintilie; PWR9LE-NEXT:    vextuwrx r3, r3, v2
510*e9d12c24SStefan Pintilie; PWR9LE-NEXT:    blr
511*e9d12c24SStefan Pintilie;
512*e9d12c24SStefan Pintilie; PWR9BE-LABEL: v8i32:
513*e9d12c24SStefan Pintilie; PWR9BE:       # %bb.0: # %entry
514*e9d12c24SStefan Pintilie; PWR9BE-NEXT:    vminuw v2, v2, v3
515*e9d12c24SStefan Pintilie; PWR9BE-NEXT:    li r3, 0
516*e9d12c24SStefan Pintilie; PWR9BE-NEXT:    xxswapd v3, v2
517*e9d12c24SStefan Pintilie; PWR9BE-NEXT:    vminuw v2, v2, v3
518*e9d12c24SStefan Pintilie; PWR9BE-NEXT:    xxspltw v3, v2, 1
519*e9d12c24SStefan Pintilie; PWR9BE-NEXT:    vminuw v2, v2, v3
520*e9d12c24SStefan Pintilie; PWR9BE-NEXT:    vextuwlx r3, r3, v2
521*e9d12c24SStefan Pintilie; PWR9BE-NEXT:    blr
522*e9d12c24SStefan Pintilie;
523*e9d12c24SStefan Pintilie; PWR10LE-LABEL: v8i32:
524*e9d12c24SStefan Pintilie; PWR10LE:       # %bb.0: # %entry
525*e9d12c24SStefan Pintilie; PWR10LE-NEXT:    vminuw v2, v2, v3
526*e9d12c24SStefan Pintilie; PWR10LE-NEXT:    li r3, 0
527*e9d12c24SStefan Pintilie; PWR10LE-NEXT:    xxswapd v3, v2
528*e9d12c24SStefan Pintilie; PWR10LE-NEXT:    vminuw v2, v2, v3
529*e9d12c24SStefan Pintilie; PWR10LE-NEXT:    xxspltw v3, v2, 2
530*e9d12c24SStefan Pintilie; PWR10LE-NEXT:    vminuw v2, v2, v3
531*e9d12c24SStefan Pintilie; PWR10LE-NEXT:    vextuwrx r3, r3, v2
532*e9d12c24SStefan Pintilie; PWR10LE-NEXT:    blr
533*e9d12c24SStefan Pintilie;
534*e9d12c24SStefan Pintilie; PWR10BE-LABEL: v8i32:
535*e9d12c24SStefan Pintilie; PWR10BE:       # %bb.0: # %entry
536*e9d12c24SStefan Pintilie; PWR10BE-NEXT:    vminuw v2, v2, v3
537*e9d12c24SStefan Pintilie; PWR10BE-NEXT:    li r3, 0
538*e9d12c24SStefan Pintilie; PWR10BE-NEXT:    xxswapd v3, v2
539*e9d12c24SStefan Pintilie; PWR10BE-NEXT:    vminuw v2, v2, v3
540*e9d12c24SStefan Pintilie; PWR10BE-NEXT:    xxspltw v3, v2, 1
541*e9d12c24SStefan Pintilie; PWR10BE-NEXT:    vminuw v2, v2, v3
542*e9d12c24SStefan Pintilie; PWR10BE-NEXT:    vextuwlx r3, r3, v2
543*e9d12c24SStefan Pintilie; PWR10BE-NEXT:    blr
544*e9d12c24SStefan Pintilieentry:
545*e9d12c24SStefan Pintilie  %0 = call i32 @llvm.vector.reduce.umin.v8i32(<8 x i32> %a)
546*e9d12c24SStefan Pintilie  ret i32 %0
547*e9d12c24SStefan Pintilie}
548*e9d12c24SStefan Pintilie
549*e9d12c24SStefan Pintiliedefine dso_local i32 @v16i32(<16 x i32> %a) local_unnamed_addr #0 {
550*e9d12c24SStefan Pintilie; PWR9LE-LABEL: v16i32:
551*e9d12c24SStefan Pintilie; PWR9LE:       # %bb.0: # %entry
552*e9d12c24SStefan Pintilie; PWR9LE-NEXT:    vminuw v3, v3, v5
553*e9d12c24SStefan Pintilie; PWR9LE-NEXT:    vminuw v2, v2, v4
554*e9d12c24SStefan Pintilie; PWR9LE-NEXT:    li r3, 0
555*e9d12c24SStefan Pintilie; PWR9LE-NEXT:    vminuw v2, v2, v3
556*e9d12c24SStefan Pintilie; PWR9LE-NEXT:    xxswapd v3, v2
557*e9d12c24SStefan Pintilie; PWR9LE-NEXT:    vminuw v2, v2, v3
558*e9d12c24SStefan Pintilie; PWR9LE-NEXT:    xxspltw v3, v2, 2
559*e9d12c24SStefan Pintilie; PWR9LE-NEXT:    vminuw v2, v2, v3
560*e9d12c24SStefan Pintilie; PWR9LE-NEXT:    vextuwrx r3, r3, v2
561*e9d12c24SStefan Pintilie; PWR9LE-NEXT:    blr
562*e9d12c24SStefan Pintilie;
563*e9d12c24SStefan Pintilie; PWR9BE-LABEL: v16i32:
564*e9d12c24SStefan Pintilie; PWR9BE:       # %bb.0: # %entry
565*e9d12c24SStefan Pintilie; PWR9BE-NEXT:    vminuw v3, v3, v5
566*e9d12c24SStefan Pintilie; PWR9BE-NEXT:    vminuw v2, v2, v4
567*e9d12c24SStefan Pintilie; PWR9BE-NEXT:    li r3, 0
568*e9d12c24SStefan Pintilie; PWR9BE-NEXT:    vminuw v2, v2, v3
569*e9d12c24SStefan Pintilie; PWR9BE-NEXT:    xxswapd v3, v2
570*e9d12c24SStefan Pintilie; PWR9BE-NEXT:    vminuw v2, v2, v3
571*e9d12c24SStefan Pintilie; PWR9BE-NEXT:    xxspltw v3, v2, 1
572*e9d12c24SStefan Pintilie; PWR9BE-NEXT:    vminuw v2, v2, v3
573*e9d12c24SStefan Pintilie; PWR9BE-NEXT:    vextuwlx r3, r3, v2
574*e9d12c24SStefan Pintilie; PWR9BE-NEXT:    blr
575*e9d12c24SStefan Pintilie;
576*e9d12c24SStefan Pintilie; PWR10LE-LABEL: v16i32:
577*e9d12c24SStefan Pintilie; PWR10LE:       # %bb.0: # %entry
578*e9d12c24SStefan Pintilie; PWR10LE-NEXT:    vminuw v3, v3, v5
579*e9d12c24SStefan Pintilie; PWR10LE-NEXT:    vminuw v2, v2, v4
580*e9d12c24SStefan Pintilie; PWR10LE-NEXT:    li r3, 0
581*e9d12c24SStefan Pintilie; PWR10LE-NEXT:    vminuw v2, v2, v3
582*e9d12c24SStefan Pintilie; PWR10LE-NEXT:    xxswapd v3, v2
583*e9d12c24SStefan Pintilie; PWR10LE-NEXT:    vminuw v2, v2, v3
584*e9d12c24SStefan Pintilie; PWR10LE-NEXT:    xxspltw v3, v2, 2
585*e9d12c24SStefan Pintilie; PWR10LE-NEXT:    vminuw v2, v2, v3
586*e9d12c24SStefan Pintilie; PWR10LE-NEXT:    vextuwrx r3, r3, v2
587*e9d12c24SStefan Pintilie; PWR10LE-NEXT:    blr
588*e9d12c24SStefan Pintilie;
589*e9d12c24SStefan Pintilie; PWR10BE-LABEL: v16i32:
590*e9d12c24SStefan Pintilie; PWR10BE:       # %bb.0: # %entry
591*e9d12c24SStefan Pintilie; PWR10BE-NEXT:    vminuw v3, v3, v5
592*e9d12c24SStefan Pintilie; PWR10BE-NEXT:    vminuw v2, v2, v4
593*e9d12c24SStefan Pintilie; PWR10BE-NEXT:    li r3, 0
594*e9d12c24SStefan Pintilie; PWR10BE-NEXT:    vminuw v2, v2, v3
595*e9d12c24SStefan Pintilie; PWR10BE-NEXT:    xxswapd v3, v2
596*e9d12c24SStefan Pintilie; PWR10BE-NEXT:    vminuw v2, v2, v3
597*e9d12c24SStefan Pintilie; PWR10BE-NEXT:    xxspltw v3, v2, 1
598*e9d12c24SStefan Pintilie; PWR10BE-NEXT:    vminuw v2, v2, v3
599*e9d12c24SStefan Pintilie; PWR10BE-NEXT:    vextuwlx r3, r3, v2
600*e9d12c24SStefan Pintilie; PWR10BE-NEXT:    blr
601*e9d12c24SStefan Pintilieentry:
602*e9d12c24SStefan Pintilie  %0 = call i32 @llvm.vector.reduce.umin.v16i32(<16 x i32> %a)
603*e9d12c24SStefan Pintilie  ret i32 %0
604*e9d12c24SStefan Pintilie}
605*e9d12c24SStefan Pintilie
606*e9d12c24SStefan Pintiliedeclare i32 @llvm.vector.reduce.umin.v2i32(<2 x i32>) #0
607*e9d12c24SStefan Pintiliedeclare i32 @llvm.vector.reduce.umin.v4i32(<4 x i32>) #0
608*e9d12c24SStefan Pintiliedeclare i32 @llvm.vector.reduce.umin.v8i32(<8 x i32>) #0
609*e9d12c24SStefan Pintiliedeclare i32 @llvm.vector.reduce.umin.v16i32(<16 x i32>) #0
610*e9d12c24SStefan Pintilie
611*e9d12c24SStefan Pintilie;;
612*e9d12c24SStefan Pintilie;; Vectors of type i64
613*e9d12c24SStefan Pintilie;;
614*e9d12c24SStefan Pintiliedefine dso_local i64 @v2i64(<2 x i64> %a) local_unnamed_addr #0 {
615*e9d12c24SStefan Pintilie; PWR9LE-LABEL: v2i64:
616*e9d12c24SStefan Pintilie; PWR9LE:       # %bb.0: # %entry
617*e9d12c24SStefan Pintilie; PWR9LE-NEXT:    xxswapd v3, v2
618*e9d12c24SStefan Pintilie; PWR9LE-NEXT:    vminud v2, v2, v3
619*e9d12c24SStefan Pintilie; PWR9LE-NEXT:    mfvsrld r3, v2
620*e9d12c24SStefan Pintilie; PWR9LE-NEXT:    blr
621*e9d12c24SStefan Pintilie;
622*e9d12c24SStefan Pintilie; PWR9BE-LABEL: v2i64:
623*e9d12c24SStefan Pintilie; PWR9BE:       # %bb.0: # %entry
624*e9d12c24SStefan Pintilie; PWR9BE-NEXT:    xxswapd v3, v2
625*e9d12c24SStefan Pintilie; PWR9BE-NEXT:    vminud v2, v2, v3
626*e9d12c24SStefan Pintilie; PWR9BE-NEXT:    mfvsrd r3, v2
627*e9d12c24SStefan Pintilie; PWR9BE-NEXT:    blr
628*e9d12c24SStefan Pintilie;
629*e9d12c24SStefan Pintilie; PWR10LE-LABEL: v2i64:
630*e9d12c24SStefan Pintilie; PWR10LE:       # %bb.0: # %entry
631*e9d12c24SStefan Pintilie; PWR10LE-NEXT:    xxswapd v3, v2
632*e9d12c24SStefan Pintilie; PWR10LE-NEXT:    vminud v2, v2, v3
633*e9d12c24SStefan Pintilie; PWR10LE-NEXT:    mfvsrld r3, v2
634*e9d12c24SStefan Pintilie; PWR10LE-NEXT:    blr
635*e9d12c24SStefan Pintilie;
636*e9d12c24SStefan Pintilie; PWR10BE-LABEL: v2i64:
637*e9d12c24SStefan Pintilie; PWR10BE:       # %bb.0: # %entry
638*e9d12c24SStefan Pintilie; PWR10BE-NEXT:    xxswapd v3, v2
639*e9d12c24SStefan Pintilie; PWR10BE-NEXT:    vminud v2, v2, v3
640*e9d12c24SStefan Pintilie; PWR10BE-NEXT:    mfvsrd r3, v2
641*e9d12c24SStefan Pintilie; PWR10BE-NEXT:    blr
642*e9d12c24SStefan Pintilieentry:
643*e9d12c24SStefan Pintilie  %0 = call i64 @llvm.vector.reduce.umin.v2i64(<2 x i64> %a)
644*e9d12c24SStefan Pintilie  ret i64 %0
645*e9d12c24SStefan Pintilie}
646*e9d12c24SStefan Pintilie
647*e9d12c24SStefan Pintiliedefine dso_local i64 @v4i64(<4 x i64> %a) local_unnamed_addr #0 {
648*e9d12c24SStefan Pintilie; PWR9LE-LABEL: v4i64:
649*e9d12c24SStefan Pintilie; PWR9LE:       # %bb.0: # %entry
650*e9d12c24SStefan Pintilie; PWR9LE-NEXT:    vminud v2, v2, v3
651*e9d12c24SStefan Pintilie; PWR9LE-NEXT:    xxswapd v3, v2
652*e9d12c24SStefan Pintilie; PWR9LE-NEXT:    vminud v2, v2, v3
653*e9d12c24SStefan Pintilie; PWR9LE-NEXT:    mfvsrld r3, v2
654*e9d12c24SStefan Pintilie; PWR9LE-NEXT:    blr
655*e9d12c24SStefan Pintilie;
656*e9d12c24SStefan Pintilie; PWR9BE-LABEL: v4i64:
657*e9d12c24SStefan Pintilie; PWR9BE:       # %bb.0: # %entry
658*e9d12c24SStefan Pintilie; PWR9BE-NEXT:    vminud v2, v2, v3
659*e9d12c24SStefan Pintilie; PWR9BE-NEXT:    xxswapd v3, v2
660*e9d12c24SStefan Pintilie; PWR9BE-NEXT:    vminud v2, v2, v3
661*e9d12c24SStefan Pintilie; PWR9BE-NEXT:    mfvsrd r3, v2
662*e9d12c24SStefan Pintilie; PWR9BE-NEXT:    blr
663*e9d12c24SStefan Pintilie;
664*e9d12c24SStefan Pintilie; PWR10LE-LABEL: v4i64:
665*e9d12c24SStefan Pintilie; PWR10LE:       # %bb.0: # %entry
666*e9d12c24SStefan Pintilie; PWR10LE-NEXT:    vminud v2, v2, v3
667*e9d12c24SStefan Pintilie; PWR10LE-NEXT:    xxswapd v3, v2
668*e9d12c24SStefan Pintilie; PWR10LE-NEXT:    vminud v2, v2, v3
669*e9d12c24SStefan Pintilie; PWR10LE-NEXT:    mfvsrld r3, v2
670*e9d12c24SStefan Pintilie; PWR10LE-NEXT:    blr
671*e9d12c24SStefan Pintilie;
672*e9d12c24SStefan Pintilie; PWR10BE-LABEL: v4i64:
673*e9d12c24SStefan Pintilie; PWR10BE:       # %bb.0: # %entry
674*e9d12c24SStefan Pintilie; PWR10BE-NEXT:    vminud v2, v2, v3
675*e9d12c24SStefan Pintilie; PWR10BE-NEXT:    xxswapd v3, v2
676*e9d12c24SStefan Pintilie; PWR10BE-NEXT:    vminud v2, v2, v3
677*e9d12c24SStefan Pintilie; PWR10BE-NEXT:    mfvsrd r3, v2
678*e9d12c24SStefan Pintilie; PWR10BE-NEXT:    blr
679*e9d12c24SStefan Pintilieentry:
680*e9d12c24SStefan Pintilie  %0 = call i64 @llvm.vector.reduce.umin.v4i64(<4 x i64> %a)
681*e9d12c24SStefan Pintilie  ret i64 %0
682*e9d12c24SStefan Pintilie}
683*e9d12c24SStefan Pintilie
684*e9d12c24SStefan Pintiliedefine dso_local i64 @v8i64(<8 x i64> %a) local_unnamed_addr #0 {
685*e9d12c24SStefan Pintilie; PWR9LE-LABEL: v8i64:
686*e9d12c24SStefan Pintilie; PWR9LE:       # %bb.0: # %entry
687*e9d12c24SStefan Pintilie; PWR9LE-NEXT:    vminud v2, v2, v4
688*e9d12c24SStefan Pintilie; PWR9LE-NEXT:    vminud v3, v3, v5
689*e9d12c24SStefan Pintilie; PWR9LE-NEXT:    vminud v2, v2, v3
690*e9d12c24SStefan Pintilie; PWR9LE-NEXT:    xxswapd v3, v2
691*e9d12c24SStefan Pintilie; PWR9LE-NEXT:    vminud v2, v2, v3
692*e9d12c24SStefan Pintilie; PWR9LE-NEXT:    mfvsrld r3, v2
693*e9d12c24SStefan Pintilie; PWR9LE-NEXT:    blr
694*e9d12c24SStefan Pintilie;
695*e9d12c24SStefan Pintilie; PWR9BE-LABEL: v8i64:
696*e9d12c24SStefan Pintilie; PWR9BE:       # %bb.0: # %entry
697*e9d12c24SStefan Pintilie; PWR9BE-NEXT:    vminud v2, v2, v4
698*e9d12c24SStefan Pintilie; PWR9BE-NEXT:    vminud v3, v3, v5
699*e9d12c24SStefan Pintilie; PWR9BE-NEXT:    vminud v2, v2, v3
700*e9d12c24SStefan Pintilie; PWR9BE-NEXT:    xxswapd v3, v2
701*e9d12c24SStefan Pintilie; PWR9BE-NEXT:    vminud v2, v2, v3
702*e9d12c24SStefan Pintilie; PWR9BE-NEXT:    mfvsrd r3, v2
703*e9d12c24SStefan Pintilie; PWR9BE-NEXT:    blr
704*e9d12c24SStefan Pintilie;
705*e9d12c24SStefan Pintilie; PWR10LE-LABEL: v8i64:
706*e9d12c24SStefan Pintilie; PWR10LE:       # %bb.0: # %entry
707*e9d12c24SStefan Pintilie; PWR10LE-NEXT:    vminud v2, v2, v4
708*e9d12c24SStefan Pintilie; PWR10LE-NEXT:    vminud v3, v3, v5
709*e9d12c24SStefan Pintilie; PWR10LE-NEXT:    vminud v2, v2, v3
710*e9d12c24SStefan Pintilie; PWR10LE-NEXT:    xxswapd v3, v2
711*e9d12c24SStefan Pintilie; PWR10LE-NEXT:    vminud v2, v2, v3
712*e9d12c24SStefan Pintilie; PWR10LE-NEXT:    mfvsrld r3, v2
713*e9d12c24SStefan Pintilie; PWR10LE-NEXT:    blr
714*e9d12c24SStefan Pintilie;
715*e9d12c24SStefan Pintilie; PWR10BE-LABEL: v8i64:
716*e9d12c24SStefan Pintilie; PWR10BE:       # %bb.0: # %entry
717*e9d12c24SStefan Pintilie; PWR10BE-NEXT:    vminud v2, v2, v4
718*e9d12c24SStefan Pintilie; PWR10BE-NEXT:    vminud v3, v3, v5
719*e9d12c24SStefan Pintilie; PWR10BE-NEXT:    vminud v2, v2, v3
720*e9d12c24SStefan Pintilie; PWR10BE-NEXT:    xxswapd v3, v2
721*e9d12c24SStefan Pintilie; PWR10BE-NEXT:    vminud v2, v2, v3
722*e9d12c24SStefan Pintilie; PWR10BE-NEXT:    mfvsrd r3, v2
723*e9d12c24SStefan Pintilie; PWR10BE-NEXT:    blr
724*e9d12c24SStefan Pintilieentry:
725*e9d12c24SStefan Pintilie  %0 = call i64 @llvm.vector.reduce.umin.v8i64(<8 x i64> %a)
726*e9d12c24SStefan Pintilie  ret i64 %0
727*e9d12c24SStefan Pintilie}
728*e9d12c24SStefan Pintilie
729*e9d12c24SStefan Pintiliedefine dso_local i64 @v16i64(<16 x i64> %a) local_unnamed_addr #0 {
730*e9d12c24SStefan Pintilie; PWR9LE-LABEL: v16i64:
731*e9d12c24SStefan Pintilie; PWR9LE:       # %bb.0: # %entry
732*e9d12c24SStefan Pintilie; PWR9LE-NEXT:    vminud v3, v3, v7
733*e9d12c24SStefan Pintilie; PWR9LE-NEXT:    vminud v5, v5, v9
734*e9d12c24SStefan Pintilie; PWR9LE-NEXT:    vminud v2, v2, v6
735*e9d12c24SStefan Pintilie; PWR9LE-NEXT:    vminud v4, v4, v8
736*e9d12c24SStefan Pintilie; PWR9LE-NEXT:    vminud v2, v2, v4
737*e9d12c24SStefan Pintilie; PWR9LE-NEXT:    vminud v3, v3, v5
738*e9d12c24SStefan Pintilie; PWR9LE-NEXT:    vminud v2, v2, v3
739*e9d12c24SStefan Pintilie; PWR9LE-NEXT:    xxswapd v3, v2
740*e9d12c24SStefan Pintilie; PWR9LE-NEXT:    vminud v2, v2, v3
741*e9d12c24SStefan Pintilie; PWR9LE-NEXT:    mfvsrld r3, v2
742*e9d12c24SStefan Pintilie; PWR9LE-NEXT:    blr
743*e9d12c24SStefan Pintilie;
744*e9d12c24SStefan Pintilie; PWR9BE-LABEL: v16i64:
745*e9d12c24SStefan Pintilie; PWR9BE:       # %bb.0: # %entry
746*e9d12c24SStefan Pintilie; PWR9BE-NEXT:    vminud v3, v3, v7
747*e9d12c24SStefan Pintilie; PWR9BE-NEXT:    vminud v5, v5, v9
748*e9d12c24SStefan Pintilie; PWR9BE-NEXT:    vminud v2, v2, v6
749*e9d12c24SStefan Pintilie; PWR9BE-NEXT:    vminud v4, v4, v8
750*e9d12c24SStefan Pintilie; PWR9BE-NEXT:    vminud v2, v2, v4
751*e9d12c24SStefan Pintilie; PWR9BE-NEXT:    vminud v3, v3, v5
752*e9d12c24SStefan Pintilie; PWR9BE-NEXT:    vminud v2, v2, v3
753*e9d12c24SStefan Pintilie; PWR9BE-NEXT:    xxswapd v3, v2
754*e9d12c24SStefan Pintilie; PWR9BE-NEXT:    vminud v2, v2, v3
755*e9d12c24SStefan Pintilie; PWR9BE-NEXT:    mfvsrd r3, v2
756*e9d12c24SStefan Pintilie; PWR9BE-NEXT:    blr
757*e9d12c24SStefan Pintilie;
758*e9d12c24SStefan Pintilie; PWR10LE-LABEL: v16i64:
759*e9d12c24SStefan Pintilie; PWR10LE:       # %bb.0: # %entry
760*e9d12c24SStefan Pintilie; PWR10LE-NEXT:    vminud v3, v3, v7
761*e9d12c24SStefan Pintilie; PWR10LE-NEXT:    vminud v5, v5, v9
762*e9d12c24SStefan Pintilie; PWR10LE-NEXT:    vminud v2, v2, v6
763*e9d12c24SStefan Pintilie; PWR10LE-NEXT:    vminud v4, v4, v8
764*e9d12c24SStefan Pintilie; PWR10LE-NEXT:    vminud v2, v2, v4
765*e9d12c24SStefan Pintilie; PWR10LE-NEXT:    vminud v3, v3, v5
766*e9d12c24SStefan Pintilie; PWR10LE-NEXT:    vminud v2, v2, v3
767*e9d12c24SStefan Pintilie; PWR10LE-NEXT:    xxswapd v3, v2
768*e9d12c24SStefan Pintilie; PWR10LE-NEXT:    vminud v2, v2, v3
769*e9d12c24SStefan Pintilie; PWR10LE-NEXT:    mfvsrld r3, v2
770*e9d12c24SStefan Pintilie; PWR10LE-NEXT:    blr
771*e9d12c24SStefan Pintilie;
772*e9d12c24SStefan Pintilie; PWR10BE-LABEL: v16i64:
773*e9d12c24SStefan Pintilie; PWR10BE:       # %bb.0: # %entry
774*e9d12c24SStefan Pintilie; PWR10BE-NEXT:    vminud v3, v3, v7
775*e9d12c24SStefan Pintilie; PWR10BE-NEXT:    vminud v5, v5, v9
776*e9d12c24SStefan Pintilie; PWR10BE-NEXT:    vminud v2, v2, v6
777*e9d12c24SStefan Pintilie; PWR10BE-NEXT:    vminud v4, v4, v8
778*e9d12c24SStefan Pintilie; PWR10BE-NEXT:    vminud v2, v2, v4
779*e9d12c24SStefan Pintilie; PWR10BE-NEXT:    vminud v3, v3, v5
780*e9d12c24SStefan Pintilie; PWR10BE-NEXT:    vminud v2, v2, v3
781*e9d12c24SStefan Pintilie; PWR10BE-NEXT:    xxswapd v3, v2
782*e9d12c24SStefan Pintilie; PWR10BE-NEXT:    vminud v2, v2, v3
783*e9d12c24SStefan Pintilie; PWR10BE-NEXT:    mfvsrd r3, v2
784*e9d12c24SStefan Pintilie; PWR10BE-NEXT:    blr
785*e9d12c24SStefan Pintilieentry:
786*e9d12c24SStefan Pintilie  %0 = call i64 @llvm.vector.reduce.umin.v16i64(<16 x i64> %a)
787*e9d12c24SStefan Pintilie  ret i64 %0
788*e9d12c24SStefan Pintilie}
789*e9d12c24SStefan Pintilie
790*e9d12c24SStefan Pintiliedeclare i64 @llvm.vector.reduce.umin.v2i64(<2 x i64>) #0
791*e9d12c24SStefan Pintiliedeclare i64 @llvm.vector.reduce.umin.v4i64(<4 x i64>) #0
792*e9d12c24SStefan Pintiliedeclare i64 @llvm.vector.reduce.umin.v8i64(<8 x i64>) #0
793*e9d12c24SStefan Pintiliedeclare i64 @llvm.vector.reduce.umin.v16i64(<16 x i64>) #0
794*e9d12c24SStefan Pintilie
795*e9d12c24SStefan Pintilie
796*e9d12c24SStefan Pintilieattributes #0 = { nounwind }
797