1*9757f4f2SUmesh Kalappa; RUN: llc --relocation-model=pic \ 2*9757f4f2SUmesh Kalappa; RUN: -mtriple=ppc32 < %s | FileCheck %s 3*9757f4f2SUmesh Kalappa 4*9757f4f2SUmesh Kalappa@g = global i32 10, align 4 5*9757f4f2SUmesh Kalappa 6*9757f4f2SUmesh Kalappa; Function Attrs: noinline nounwind optnone uwtable 7*9757f4f2SUmesh Kalappadefine i32 @main() #0 { 8*9757f4f2SUmesh Kalappa; CHECK-LABEL: main: 9*9757f4f2SUmesh Kalappa; CHECK-NOT: evstdd 10*9757f4f2SUmesh Kalappaentry: 11*9757f4f2SUmesh Kalappa %retval = alloca i32, align 4 12*9757f4f2SUmesh Kalappa store i32 0, ptr %retval, align 4 13*9757f4f2SUmesh Kalappa %0 = load i32, ptr @g, align 4 14*9757f4f2SUmesh Kalappa ret i32 %0 15*9757f4f2SUmesh Kalappa} 16*9757f4f2SUmesh Kalappa 17*9757f4f2SUmesh Kalappaattributes #0 = { noinline nounwind optnone uwtable "frame-pointer"="all" "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="e500" "target-features"="+spe,-altivec,-bpermd,-crbits,-crypto,-direct-move,-extdiv,-htm,-isa-v206-instructions,-isa-v207-instructions,-isa-v30-instructions,-power8-vector,-power9-vector,-privileged,-quadword-atomics,-rop-protect,-vsx" } 18*9757f4f2SUmesh Kalappa 19