xref: /llvm-project/llvm/test/CodeGen/PowerPC/optimize-vector.ll (revision c7c3d71414ac250f377c067efd4848c353cec4cc)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
2; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
3; RUN:   -mcpu=pwr7 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | \
4; RUN:   FileCheck %s
5
6define dso_local <16 x i8> @x2(<16 x i8> noundef %x) {
7; CHECK-LABEL: x2:
8; CHECK:       # %bb.0: # %entry
9; CHECK-NEXT:    vspltisb v3, 1
10; CHECK-NEXT:    vslb v2, v2, v3
11; CHECK-NEXT:    blr
12entry:
13  %add = shl <16 x i8> %x, <i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1>
14  ret <16 x i8> %add
15}
16
17define dso_local <8 x i16> @x2h(<8 x i16> noundef %x) {
18; CHECK-LABEL: x2h:
19; CHECK:       # %bb.0: # %entry
20; CHECK-NEXT:    vspltish v3, 1
21; CHECK-NEXT:    vslh v2, v2, v3
22; CHECK-NEXT:    blr
23entry:
24  %add = shl <8 x i16> %x, <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1>
25  ret <8 x i16> %add
26}
27
28define dso_local <4 x i32> @x2w(<4 x i32> noundef %x) {
29; CHECK-LABEL: x2w:
30; CHECK:       # %bb.0: # %entry
31; CHECK-NEXT:    vspltisw v3, 1
32; CHECK-NEXT:    vslw v2, v2, v3
33; CHECK-NEXT:    blr
34entry:
35  %add = shl <4 x i32> %x, <i32 1, i32 1, i32 1, i32 1>
36  ret <4 x i32> %add
37}
38