xref: /llvm-project/llvm/test/CodeGen/PowerPC/mul-const-i64.ll (revision 1445b77e8c6da8e43ba12f86b010852b97aea4fb) 
1*1445b77eSZi Xuan Wu; RUN: llc -verify-machineinstrs -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr -mcpu=generic < %s -mtriple=ppc64-- | FileCheck %s -check-prefix=GENERIC-CHECK
2*1445b77eSZi Xuan Wu; RUN: llc -verify-machineinstrs -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr -mcpu=pwr8 < %s -mtriple=ppc64-- | FileCheck %s -check-prefixes=PWR8-CHECK,CHECK
3*1445b77eSZi Xuan Wu; RUN: llc -verify-machineinstrs -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr -mcpu=pwr9 < %s -mtriple=ppc64le-- | FileCheck %s -check-prefixes=PWR9-CHECK,CHECK
4*1445b77eSZi Xuan Wu
5*1445b77eSZi Xuan Wu
6*1445b77eSZi Xuan Wudefine i64 @foo(i64 %a) {
7*1445b77eSZi Xuan Wuentry:
8*1445b77eSZi Xuan Wu  %mul = mul nsw i64 %a, 6
9*1445b77eSZi Xuan Wu  ret i64 %mul
10*1445b77eSZi Xuan Wu}
11*1445b77eSZi Xuan Wu
12*1445b77eSZi Xuan Wu; GENERIC-CHECK-LABEL: @foo
13*1445b77eSZi Xuan Wu; GENERIC-CHECK: mulli r3, r3, 6
14*1445b77eSZi Xuan Wu; GENERIC-CHECK: blr
15*1445b77eSZi Xuan Wu
16*1445b77eSZi Xuan Wudefine i64 @test1(i64 %a) {
17*1445b77eSZi Xuan Wu        %tmp.1 = mul nsw i64 %a, 16         ; <i64> [#uses=1]
18*1445b77eSZi Xuan Wu        ret i64 %tmp.1
19*1445b77eSZi Xuan Wu}
20*1445b77eSZi Xuan Wu; CHECK-LABEL: test1:
21*1445b77eSZi Xuan Wu; CHECK-NOT: mul
22*1445b77eSZi Xuan Wu; CHECK: sldi r[[REG1:[0-9]+]], r3, 4
23*1445b77eSZi Xuan Wu
24*1445b77eSZi Xuan Wu
25*1445b77eSZi Xuan Wudefine i64 @test2(i64 %a) {
26*1445b77eSZi Xuan Wu        %tmp.1 = mul nsw i64 %a, 17         ; <i64> [#uses=1]
27*1445b77eSZi Xuan Wu        ret i64 %tmp.1
28*1445b77eSZi Xuan Wu}
29*1445b77eSZi Xuan Wu; CHECK-LABEL: test2:
30*1445b77eSZi Xuan Wu; CHECK-NOT: mul
31*1445b77eSZi Xuan Wu; CHECK: sldi r[[REG1:[0-9]+]], r3, 4
32*1445b77eSZi Xuan Wu; CHECK-NEXT: add r[[REG2:[0-9]+]], r3, r[[REG1]]
33*1445b77eSZi Xuan Wu
34*1445b77eSZi Xuan Wudefine i64 @test3(i64 %a) {
35*1445b77eSZi Xuan Wu        %tmp.1 = mul nsw i64 %a, 15         ; <i64> [#uses=1]
36*1445b77eSZi Xuan Wu        ret i64 %tmp.1
37*1445b77eSZi Xuan Wu}
38*1445b77eSZi Xuan Wu; CHECK-LABEL: test3:
39*1445b77eSZi Xuan Wu; CHECK-NOT: mul
40*1445b77eSZi Xuan Wu; CHECK: sldi r[[REG1:[0-9]+]], r3, 4
41*1445b77eSZi Xuan Wu; CHECK-NEXT: sub r[[REG2:[0-9]+]], r[[REG1]], r3
42*1445b77eSZi Xuan Wu
43*1445b77eSZi Xuan Wu; negtive constant
44*1445b77eSZi Xuan Wu
45*1445b77eSZi Xuan Wudefine i64 @test4(i64 %a) {
46*1445b77eSZi Xuan Wu        %tmp.1 = mul nsw i64 %a, -16         ; <i64> [#uses=1]
47*1445b77eSZi Xuan Wu        ret i64 %tmp.1
48*1445b77eSZi Xuan Wu}
49*1445b77eSZi Xuan Wu; CHECK-LABEL: test4:
50*1445b77eSZi Xuan Wu; CHECK-NOT: mul
51*1445b77eSZi Xuan Wu; CHECK: sldi r[[REG1:[0-9]+]], r3, 4
52*1445b77eSZi Xuan Wu; CHECK-NEXT: neg r[[REG2:[0-9]+]], r[[REG1]]
53*1445b77eSZi Xuan Wu
54*1445b77eSZi Xuan Wudefine i64 @test5(i64 %a) {
55*1445b77eSZi Xuan Wu        %tmp.1 = mul nsw i64 %a, -17         ; <i64> [#uses=1]
56*1445b77eSZi Xuan Wu        ret i64 %tmp.1
57*1445b77eSZi Xuan Wu}
58*1445b77eSZi Xuan Wu; CHECK-LABEL: test5:
59*1445b77eSZi Xuan Wu; PWR9-CHECK: mulli r[[REG1:[0-9]+]], r3, -17
60*1445b77eSZi Xuan Wu; PWR8-CHECK-NOT: mul
61*1445b77eSZi Xuan Wu; PWR8-CHECK: sldi r[[REG1:[0-9]+]], r3, 4
62*1445b77eSZi Xuan Wu; PWR8-CHECK-NEXT: add r[[REG2:[0-9]+]], r3, r[[REG1]]
63*1445b77eSZi Xuan Wu; PWR8-CHECK-NEXT: neg r{{[0-9]+}}, r[[REG2]]
64*1445b77eSZi Xuan Wu
65*1445b77eSZi Xuan Wudefine i64 @test6(i64 %a) {
66*1445b77eSZi Xuan Wu        %tmp.1 = mul nsw i64 %a, -15         ; <i64> [#uses=1]
67*1445b77eSZi Xuan Wu        ret i64 %tmp.1
68*1445b77eSZi Xuan Wu}
69*1445b77eSZi Xuan Wu; CHECK-LABEL: test6:
70*1445b77eSZi Xuan Wu; CHECK-NOT: mul
71*1445b77eSZi Xuan Wu; CHECK: sldi r[[REG1:[0-9]+]], r3, 4
72*1445b77eSZi Xuan Wu; CHECK-NEXT: sub r[[REG2:[0-9]+]], r3, r[[REG1]]
73*1445b77eSZi Xuan Wu; CHECK-NOT: neg
74*1445b77eSZi Xuan Wu
75*1445b77eSZi Xuan Wu; boundary case
76*1445b77eSZi Xuan Wu
77*1445b77eSZi Xuan Wudefine i64 @test7(i64 %a) {
78*1445b77eSZi Xuan Wu        %tmp.1 = mul nsw i64 %a, -9223372036854775808 ; <i64> [#uses=1]
79*1445b77eSZi Xuan Wu        ret i64 %tmp.1
80*1445b77eSZi Xuan Wu}
81*1445b77eSZi Xuan Wu; CHECK-LABEL: test7:
82*1445b77eSZi Xuan Wu; CHECK-NOT: mul
83*1445b77eSZi Xuan Wu; CHECK: sldi r[[REG1:[0-9]+]], r3, 63
84*1445b77eSZi Xuan Wu
85*1445b77eSZi Xuan Wudefine i64 @test8(i64 %a) {
86*1445b77eSZi Xuan Wu        %tmp.1 = mul nsw i64 %a, 9223372036854775807 ; <i64> [#uses=1]
87*1445b77eSZi Xuan Wu        ret i64 %tmp.1
88*1445b77eSZi Xuan Wu}
89*1445b77eSZi Xuan Wu; CHECK-LABEL: test8:
90*1445b77eSZi Xuan Wu; CHECK-NOT: mul
91*1445b77eSZi Xuan Wu; CHECK: sldi r[[REG1:[0-9]+]], r3, 63
92*1445b77eSZi Xuan Wu; CHECK-NEXT: sub r[[REG2:[0-9]+]], r[[REG1]], r3
93