xref: /llvm-project/llvm/test/CodeGen/PowerPC/llvm.frexp.ll (revision 003b58f65bdd5d9c7d0c1b355566c9ef430c0e7d)
1*003b58f6SMatt Arsenault; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
2*003b58f6SMatt Arsenault; RUN: llc -mcpu=pwr9 -mtriple=powerpc64le-unknown-unknown \
3*003b58f6SMatt Arsenault; RUN:   -ppc-vsr-nums-as-vr -ppc-asm-full-reg-names < %s | FileCheck %s
4*003b58f6SMatt Arsenault
5*003b58f6SMatt Arsenaultdefine { half, i32 } @test_frexp_f16_i32(half %a) {
6*003b58f6SMatt Arsenault; CHECK-LABEL: test_frexp_f16_i32:
7*003b58f6SMatt Arsenault; CHECK:       # %bb.0:
8*003b58f6SMatt Arsenault; CHECK-NEXT:    mflr r0
9*003b58f6SMatt Arsenault; CHECK-NEXT:    stdu r1, -48(r1)
10*003b58f6SMatt Arsenault; CHECK-NEXT:    std r0, 64(r1)
11*003b58f6SMatt Arsenault; CHECK-NEXT:    .cfi_def_cfa_offset 48
12*003b58f6SMatt Arsenault; CHECK-NEXT:    .cfi_offset lr, 16
13*003b58f6SMatt Arsenault; CHECK-NEXT:    xscvdphp f0, f1
14*003b58f6SMatt Arsenault; CHECK-NEXT:    addi r4, r1, 44
15*003b58f6SMatt Arsenault; CHECK-NEXT:    mffprwz r3, f0
16*003b58f6SMatt Arsenault; CHECK-NEXT:    clrlwi r3, r3, 16
17*003b58f6SMatt Arsenault; CHECK-NEXT:    mtfprwz f0, r3
18*003b58f6SMatt Arsenault; CHECK-NEXT:    xscvhpdp f1, f0
19*003b58f6SMatt Arsenault; CHECK-NEXT:    bl frexpf
20*003b58f6SMatt Arsenault; CHECK-NEXT:    nop
21*003b58f6SMatt Arsenault; CHECK-NEXT:    lwz r3, 44(r1)
22*003b58f6SMatt Arsenault; CHECK-NEXT:    addi r1, r1, 48
23*003b58f6SMatt Arsenault; CHECK-NEXT:    ld r0, 16(r1)
24*003b58f6SMatt Arsenault; CHECK-NEXT:    mtlr r0
25*003b58f6SMatt Arsenault; CHECK-NEXT:    blr
26*003b58f6SMatt Arsenault  %result = call { half, i32 } @llvm.frexp.f16.i32(half %a)
27*003b58f6SMatt Arsenault  ret { half, i32 } %result
28*003b58f6SMatt Arsenault}
29*003b58f6SMatt Arsenault
30*003b58f6SMatt Arsenaultdefine half @test_frexp_f16_i32_only_use_fract(half %a) {
31*003b58f6SMatt Arsenault; CHECK-LABEL: test_frexp_f16_i32_only_use_fract:
32*003b58f6SMatt Arsenault; CHECK:       # %bb.0:
33*003b58f6SMatt Arsenault; CHECK-NEXT:    mflr r0
34*003b58f6SMatt Arsenault; CHECK-NEXT:    stdu r1, -48(r1)
35*003b58f6SMatt Arsenault; CHECK-NEXT:    std r0, 64(r1)
36*003b58f6SMatt Arsenault; CHECK-NEXT:    .cfi_def_cfa_offset 48
37*003b58f6SMatt Arsenault; CHECK-NEXT:    .cfi_offset lr, 16
38*003b58f6SMatt Arsenault; CHECK-NEXT:    xscvdphp f0, f1
39*003b58f6SMatt Arsenault; CHECK-NEXT:    addi r4, r1, 44
40*003b58f6SMatt Arsenault; CHECK-NEXT:    mffprwz r3, f0
41*003b58f6SMatt Arsenault; CHECK-NEXT:    clrlwi r3, r3, 16
42*003b58f6SMatt Arsenault; CHECK-NEXT:    mtfprwz f0, r3
43*003b58f6SMatt Arsenault; CHECK-NEXT:    xscvhpdp f1, f0
44*003b58f6SMatt Arsenault; CHECK-NEXT:    bl frexpf
45*003b58f6SMatt Arsenault; CHECK-NEXT:    nop
46*003b58f6SMatt Arsenault; CHECK-NEXT:    addi r1, r1, 48
47*003b58f6SMatt Arsenault; CHECK-NEXT:    ld r0, 16(r1)
48*003b58f6SMatt Arsenault; CHECK-NEXT:    mtlr r0
49*003b58f6SMatt Arsenault; CHECK-NEXT:    blr
50*003b58f6SMatt Arsenault  %result = call { half, i32 } @llvm.frexp.f16.i32(half %a)
51*003b58f6SMatt Arsenault  %result.0 = extractvalue { half, i32 } %result, 0
52*003b58f6SMatt Arsenault  ret half %result.0
53*003b58f6SMatt Arsenault}
54*003b58f6SMatt Arsenault
55*003b58f6SMatt Arsenaultdefine i32 @test_frexp_f16_i32_only_use_exp(half %a) {
56*003b58f6SMatt Arsenault; CHECK-LABEL: test_frexp_f16_i32_only_use_exp:
57*003b58f6SMatt Arsenault; CHECK:       # %bb.0:
58*003b58f6SMatt Arsenault; CHECK-NEXT:    mflr r0
59*003b58f6SMatt Arsenault; CHECK-NEXT:    stdu r1, -48(r1)
60*003b58f6SMatt Arsenault; CHECK-NEXT:    std r0, 64(r1)
61*003b58f6SMatt Arsenault; CHECK-NEXT:    .cfi_def_cfa_offset 48
62*003b58f6SMatt Arsenault; CHECK-NEXT:    .cfi_offset lr, 16
63*003b58f6SMatt Arsenault; CHECK-NEXT:    xscvdphp f0, f1
64*003b58f6SMatt Arsenault; CHECK-NEXT:    addi r4, r1, 44
65*003b58f6SMatt Arsenault; CHECK-NEXT:    mffprwz r3, f0
66*003b58f6SMatt Arsenault; CHECK-NEXT:    clrlwi r3, r3, 16
67*003b58f6SMatt Arsenault; CHECK-NEXT:    mtfprwz f0, r3
68*003b58f6SMatt Arsenault; CHECK-NEXT:    xscvhpdp f1, f0
69*003b58f6SMatt Arsenault; CHECK-NEXT:    bl frexpf
70*003b58f6SMatt Arsenault; CHECK-NEXT:    nop
71*003b58f6SMatt Arsenault; CHECK-NEXT:    lwz r3, 44(r1)
72*003b58f6SMatt Arsenault; CHECK-NEXT:    addi r1, r1, 48
73*003b58f6SMatt Arsenault; CHECK-NEXT:    ld r0, 16(r1)
74*003b58f6SMatt Arsenault; CHECK-NEXT:    mtlr r0
75*003b58f6SMatt Arsenault; CHECK-NEXT:    blr
76*003b58f6SMatt Arsenault  %result = call { half, i32 } @llvm.frexp.f16.i32(half %a)
77*003b58f6SMatt Arsenault  %result.0 = extractvalue { half, i32 } %result, 1
78*003b58f6SMatt Arsenault  ret i32 %result.0
79*003b58f6SMatt Arsenault}
80*003b58f6SMatt Arsenault
81*003b58f6SMatt Arsenaultdefine { <2 x half>, <2 x i32> } @test_frexp_v2f16_v2i32(<2 x half> %a) {
82*003b58f6SMatt Arsenault; CHECK-LABEL: test_frexp_v2f16_v2i32:
83*003b58f6SMatt Arsenault; CHECK:       # %bb.0:
84*003b58f6SMatt Arsenault; CHECK-NEXT:    mflr r0
85*003b58f6SMatt Arsenault; CHECK-NEXT:    .cfi_def_cfa_offset 80
86*003b58f6SMatt Arsenault; CHECK-NEXT:    .cfi_offset lr, 16
87*003b58f6SMatt Arsenault; CHECK-NEXT:    .cfi_offset r29, -40
88*003b58f6SMatt Arsenault; CHECK-NEXT:    .cfi_offset r30, -32
89*003b58f6SMatt Arsenault; CHECK-NEXT:    .cfi_offset f30, -16
90*003b58f6SMatt Arsenault; CHECK-NEXT:    .cfi_offset f31, -8
91*003b58f6SMatt Arsenault; CHECK-NEXT:    std r29, -40(r1) # 8-byte Folded Spill
92*003b58f6SMatt Arsenault; CHECK-NEXT:    std r30, -32(r1) # 8-byte Folded Spill
93*003b58f6SMatt Arsenault; CHECK-NEXT:    stfd f30, -16(r1) # 8-byte Folded Spill
94*003b58f6SMatt Arsenault; CHECK-NEXT:    stfd f31, -8(r1) # 8-byte Folded Spill
95*003b58f6SMatt Arsenault; CHECK-NEXT:    stdu r1, -80(r1)
96*003b58f6SMatt Arsenault; CHECK-NEXT:    std r0, 96(r1)
97*003b58f6SMatt Arsenault; CHECK-NEXT:    xscvdphp f0, f2
98*003b58f6SMatt Arsenault; CHECK-NEXT:    addi r30, r1, 32
99*003b58f6SMatt Arsenault; CHECK-NEXT:    mr r4, r30
100*003b58f6SMatt Arsenault; CHECK-NEXT:    mffprwz r3, f0
101*003b58f6SMatt Arsenault; CHECK-NEXT:    clrlwi r3, r3, 16
102*003b58f6SMatt Arsenault; CHECK-NEXT:    mtfprwz f0, r3
103*003b58f6SMatt Arsenault; CHECK-NEXT:    xscvhpdp f31, f0
104*003b58f6SMatt Arsenault; CHECK-NEXT:    xscvdphp f0, f1
105*003b58f6SMatt Arsenault; CHECK-NEXT:    mffprwz r3, f0
106*003b58f6SMatt Arsenault; CHECK-NEXT:    clrlwi r3, r3, 16
107*003b58f6SMatt Arsenault; CHECK-NEXT:    mtfprwz f0, r3
108*003b58f6SMatt Arsenault; CHECK-NEXT:    xscvhpdp f1, f0
109*003b58f6SMatt Arsenault; CHECK-NEXT:    bl frexpf
110*003b58f6SMatt Arsenault; CHECK-NEXT:    nop
111*003b58f6SMatt Arsenault; CHECK-NEXT:    addi r29, r1, 36
112*003b58f6SMatt Arsenault; CHECK-NEXT:    fmr f30, f1
113*003b58f6SMatt Arsenault; CHECK-NEXT:    fmr f1, f31
114*003b58f6SMatt Arsenault; CHECK-NEXT:    mr r4, r29
115*003b58f6SMatt Arsenault; CHECK-NEXT:    bl frexpf
116*003b58f6SMatt Arsenault; CHECK-NEXT:    nop
117*003b58f6SMatt Arsenault; CHECK-NEXT:    fmr f2, f1
118*003b58f6SMatt Arsenault; CHECK-NEXT:    lfiwzx f0, 0, r30
119*003b58f6SMatt Arsenault; CHECK-NEXT:    lfiwzx f1, 0, r29
120*003b58f6SMatt Arsenault; CHECK-NEXT:    xxmrghw v2, vs1, vs0
121*003b58f6SMatt Arsenault; CHECK-NEXT:    fmr f1, f30
122*003b58f6SMatt Arsenault; CHECK-NEXT:    addi r1, r1, 80
123*003b58f6SMatt Arsenault; CHECK-NEXT:    ld r0, 16(r1)
124*003b58f6SMatt Arsenault; CHECK-NEXT:    lfd f31, -8(r1) # 8-byte Folded Reload
125*003b58f6SMatt Arsenault; CHECK-NEXT:    lfd f30, -16(r1) # 8-byte Folded Reload
126*003b58f6SMatt Arsenault; CHECK-NEXT:    ld r30, -32(r1) # 8-byte Folded Reload
127*003b58f6SMatt Arsenault; CHECK-NEXT:    ld r29, -40(r1) # 8-byte Folded Reload
128*003b58f6SMatt Arsenault; CHECK-NEXT:    mtlr r0
129*003b58f6SMatt Arsenault; CHECK-NEXT:    blr
130*003b58f6SMatt Arsenault  %result = call { <2 x half>, <2 x i32> } @llvm.frexp.v2f16.v2i32(<2 x half> %a)
131*003b58f6SMatt Arsenault  ret { <2 x half>, <2 x i32> } %result
132*003b58f6SMatt Arsenault}
133*003b58f6SMatt Arsenault
134*003b58f6SMatt Arsenaultdefine <2 x half> @test_frexp_v2f16_v2i32_only_use_fract(<2 x half> %a) {
135*003b58f6SMatt Arsenault; CHECK-LABEL: test_frexp_v2f16_v2i32_only_use_fract:
136*003b58f6SMatt Arsenault; CHECK:       # %bb.0:
137*003b58f6SMatt Arsenault; CHECK-NEXT:    mflr r0
138*003b58f6SMatt Arsenault; CHECK-NEXT:    .cfi_def_cfa_offset 64
139*003b58f6SMatt Arsenault; CHECK-NEXT:    .cfi_offset lr, 16
140*003b58f6SMatt Arsenault; CHECK-NEXT:    .cfi_offset f30, -16
141*003b58f6SMatt Arsenault; CHECK-NEXT:    .cfi_offset f31, -8
142*003b58f6SMatt Arsenault; CHECK-NEXT:    stfd f30, -16(r1) # 8-byte Folded Spill
143*003b58f6SMatt Arsenault; CHECK-NEXT:    stfd f31, -8(r1) # 8-byte Folded Spill
144*003b58f6SMatt Arsenault; CHECK-NEXT:    stdu r1, -64(r1)
145*003b58f6SMatt Arsenault; CHECK-NEXT:    std r0, 80(r1)
146*003b58f6SMatt Arsenault; CHECK-NEXT:    xscvdphp f0, f2
147*003b58f6SMatt Arsenault; CHECK-NEXT:    addi r4, r1, 40
148*003b58f6SMatt Arsenault; CHECK-NEXT:    mffprwz r3, f0
149*003b58f6SMatt Arsenault; CHECK-NEXT:    clrlwi r3, r3, 16
150*003b58f6SMatt Arsenault; CHECK-NEXT:    mtfprwz f0, r3
151*003b58f6SMatt Arsenault; CHECK-NEXT:    xscvhpdp f31, f0
152*003b58f6SMatt Arsenault; CHECK-NEXT:    xscvdphp f0, f1
153*003b58f6SMatt Arsenault; CHECK-NEXT:    mffprwz r3, f0
154*003b58f6SMatt Arsenault; CHECK-NEXT:    clrlwi r3, r3, 16
155*003b58f6SMatt Arsenault; CHECK-NEXT:    mtfprwz f0, r3
156*003b58f6SMatt Arsenault; CHECK-NEXT:    xscvhpdp f1, f0
157*003b58f6SMatt Arsenault; CHECK-NEXT:    bl frexpf
158*003b58f6SMatt Arsenault; CHECK-NEXT:    nop
159*003b58f6SMatt Arsenault; CHECK-NEXT:    addi r4, r1, 44
160*003b58f6SMatt Arsenault; CHECK-NEXT:    fmr f30, f1
161*003b58f6SMatt Arsenault; CHECK-NEXT:    fmr f1, f31
162*003b58f6SMatt Arsenault; CHECK-NEXT:    bl frexpf
163*003b58f6SMatt Arsenault; CHECK-NEXT:    nop
164*003b58f6SMatt Arsenault; CHECK-NEXT:    fmr f2, f1
165*003b58f6SMatt Arsenault; CHECK-NEXT:    fmr f1, f30
166*003b58f6SMatt Arsenault; CHECK-NEXT:    addi r1, r1, 64
167*003b58f6SMatt Arsenault; CHECK-NEXT:    ld r0, 16(r1)
168*003b58f6SMatt Arsenault; CHECK-NEXT:    lfd f31, -8(r1) # 8-byte Folded Reload
169*003b58f6SMatt Arsenault; CHECK-NEXT:    lfd f30, -16(r1) # 8-byte Folded Reload
170*003b58f6SMatt Arsenault; CHECK-NEXT:    mtlr r0
171*003b58f6SMatt Arsenault; CHECK-NEXT:    blr
172*003b58f6SMatt Arsenault  %result = call { <2 x half>, <2 x i32> } @llvm.frexp.v2f16.v2i32(<2 x half> %a)
173*003b58f6SMatt Arsenault  %result.0 = extractvalue { <2 x half>, <2 x i32> } %result, 0
174*003b58f6SMatt Arsenault  ret <2 x half> %result.0
175*003b58f6SMatt Arsenault}
176*003b58f6SMatt Arsenault
177*003b58f6SMatt Arsenaultdefine <2 x i32> @test_frexp_v2f16_v2i32_only_use_exp(<2 x half> %a) {
178*003b58f6SMatt Arsenault; CHECK-LABEL: test_frexp_v2f16_v2i32_only_use_exp:
179*003b58f6SMatt Arsenault; CHECK:       # %bb.0:
180*003b58f6SMatt Arsenault; CHECK-NEXT:    mflr r0
181*003b58f6SMatt Arsenault; CHECK-NEXT:    .cfi_def_cfa_offset 80
182*003b58f6SMatt Arsenault; CHECK-NEXT:    .cfi_offset lr, 16
183*003b58f6SMatt Arsenault; CHECK-NEXT:    .cfi_offset r29, -32
184*003b58f6SMatt Arsenault; CHECK-NEXT:    .cfi_offset r30, -24
185*003b58f6SMatt Arsenault; CHECK-NEXT:    .cfi_offset f31, -8
186*003b58f6SMatt Arsenault; CHECK-NEXT:    std r29, -32(r1) # 8-byte Folded Spill
187*003b58f6SMatt Arsenault; CHECK-NEXT:    std r30, -24(r1) # 8-byte Folded Spill
188*003b58f6SMatt Arsenault; CHECK-NEXT:    stfd f31, -8(r1) # 8-byte Folded Spill
189*003b58f6SMatt Arsenault; CHECK-NEXT:    stdu r1, -80(r1)
190*003b58f6SMatt Arsenault; CHECK-NEXT:    std r0, 96(r1)
191*003b58f6SMatt Arsenault; CHECK-NEXT:    xscvdphp f0, f2
192*003b58f6SMatt Arsenault; CHECK-NEXT:    addi r30, r1, 40
193*003b58f6SMatt Arsenault; CHECK-NEXT:    mr r4, r30
194*003b58f6SMatt Arsenault; CHECK-NEXT:    mffprwz r3, f0
195*003b58f6SMatt Arsenault; CHECK-NEXT:    clrlwi r3, r3, 16
196*003b58f6SMatt Arsenault; CHECK-NEXT:    mtfprwz f0, r3
197*003b58f6SMatt Arsenault; CHECK-NEXT:    xscvhpdp f31, f0
198*003b58f6SMatt Arsenault; CHECK-NEXT:    xscvdphp f0, f1
199*003b58f6SMatt Arsenault; CHECK-NEXT:    mffprwz r3, f0
200*003b58f6SMatt Arsenault; CHECK-NEXT:    clrlwi r3, r3, 16
201*003b58f6SMatt Arsenault; CHECK-NEXT:    mtfprwz f0, r3
202*003b58f6SMatt Arsenault; CHECK-NEXT:    xscvhpdp f1, f0
203*003b58f6SMatt Arsenault; CHECK-NEXT:    bl frexpf
204*003b58f6SMatt Arsenault; CHECK-NEXT:    nop
205*003b58f6SMatt Arsenault; CHECK-NEXT:    addi r29, r1, 44
206*003b58f6SMatt Arsenault; CHECK-NEXT:    fmr f1, f31
207*003b58f6SMatt Arsenault; CHECK-NEXT:    mr r4, r29
208*003b58f6SMatt Arsenault; CHECK-NEXT:    bl frexpf
209*003b58f6SMatt Arsenault; CHECK-NEXT:    nop
210*003b58f6SMatt Arsenault; CHECK-NEXT:    lfiwzx f0, 0, r30
211*003b58f6SMatt Arsenault; CHECK-NEXT:    lfiwzx f1, 0, r29
212*003b58f6SMatt Arsenault; CHECK-NEXT:    xxmrghw v2, vs1, vs0
213*003b58f6SMatt Arsenault; CHECK-NEXT:    addi r1, r1, 80
214*003b58f6SMatt Arsenault; CHECK-NEXT:    ld r0, 16(r1)
215*003b58f6SMatt Arsenault; CHECK-NEXT:    lfd f31, -8(r1) # 8-byte Folded Reload
216*003b58f6SMatt Arsenault; CHECK-NEXT:    ld r30, -24(r1) # 8-byte Folded Reload
217*003b58f6SMatt Arsenault; CHECK-NEXT:    ld r29, -32(r1) # 8-byte Folded Reload
218*003b58f6SMatt Arsenault; CHECK-NEXT:    mtlr r0
219*003b58f6SMatt Arsenault; CHECK-NEXT:    blr
220*003b58f6SMatt Arsenault  %result = call { <2 x half>, <2 x i32> } @llvm.frexp.v2f16.v2i32(<2 x half> %a)
221*003b58f6SMatt Arsenault  %result.1 = extractvalue { <2 x half>, <2 x i32> } %result, 1
222*003b58f6SMatt Arsenault  ret <2 x i32> %result.1
223*003b58f6SMatt Arsenault}
224*003b58f6SMatt Arsenault
225*003b58f6SMatt Arsenaultdefine { float, i32 } @test_frexp_f32_i32(float %a) {
226*003b58f6SMatt Arsenault; CHECK-LABEL: test_frexp_f32_i32:
227*003b58f6SMatt Arsenault; CHECK:       # %bb.0:
228*003b58f6SMatt Arsenault; CHECK-NEXT:    mflr r0
229*003b58f6SMatt Arsenault; CHECK-NEXT:    stdu r1, -48(r1)
230*003b58f6SMatt Arsenault; CHECK-NEXT:    std r0, 64(r1)
231*003b58f6SMatt Arsenault; CHECK-NEXT:    .cfi_def_cfa_offset 48
232*003b58f6SMatt Arsenault; CHECK-NEXT:    .cfi_offset lr, 16
233*003b58f6SMatt Arsenault; CHECK-NEXT:    addi r4, r1, 44
234*003b58f6SMatt Arsenault; CHECK-NEXT:    bl frexpf
235*003b58f6SMatt Arsenault; CHECK-NEXT:    nop
236*003b58f6SMatt Arsenault; CHECK-NEXT:    lwz r3, 44(r1)
237*003b58f6SMatt Arsenault; CHECK-NEXT:    addi r1, r1, 48
238*003b58f6SMatt Arsenault; CHECK-NEXT:    ld r0, 16(r1)
239*003b58f6SMatt Arsenault; CHECK-NEXT:    mtlr r0
240*003b58f6SMatt Arsenault; CHECK-NEXT:    blr
241*003b58f6SMatt Arsenault  %result = call { float, i32 } @llvm.frexp.f32.i32(float %a)
242*003b58f6SMatt Arsenault  ret { float, i32 } %result
243*003b58f6SMatt Arsenault}
244*003b58f6SMatt Arsenault
245*003b58f6SMatt Arsenaultdefine float @test_frexp_f32_i32_only_use_fract(float %a) {
246*003b58f6SMatt Arsenault; CHECK-LABEL: test_frexp_f32_i32_only_use_fract:
247*003b58f6SMatt Arsenault; CHECK:       # %bb.0:
248*003b58f6SMatt Arsenault; CHECK-NEXT:    mflr r0
249*003b58f6SMatt Arsenault; CHECK-NEXT:    stdu r1, -48(r1)
250*003b58f6SMatt Arsenault; CHECK-NEXT:    std r0, 64(r1)
251*003b58f6SMatt Arsenault; CHECK-NEXT:    .cfi_def_cfa_offset 48
252*003b58f6SMatt Arsenault; CHECK-NEXT:    .cfi_offset lr, 16
253*003b58f6SMatt Arsenault; CHECK-NEXT:    addi r4, r1, 44
254*003b58f6SMatt Arsenault; CHECK-NEXT:    bl frexpf
255*003b58f6SMatt Arsenault; CHECK-NEXT:    nop
256*003b58f6SMatt Arsenault; CHECK-NEXT:    addi r1, r1, 48
257*003b58f6SMatt Arsenault; CHECK-NEXT:    ld r0, 16(r1)
258*003b58f6SMatt Arsenault; CHECK-NEXT:    mtlr r0
259*003b58f6SMatt Arsenault; CHECK-NEXT:    blr
260*003b58f6SMatt Arsenault  %result = call { float, i32 } @llvm.frexp.f32.i32(float %a)
261*003b58f6SMatt Arsenault  %result.0 = extractvalue { float, i32 } %result, 0
262*003b58f6SMatt Arsenault  ret float %result.0
263*003b58f6SMatt Arsenault}
264*003b58f6SMatt Arsenault
265*003b58f6SMatt Arsenaultdefine i32 @test_frexp_f32_i32_only_use_exp(float %a) {
266*003b58f6SMatt Arsenault; CHECK-LABEL: test_frexp_f32_i32_only_use_exp:
267*003b58f6SMatt Arsenault; CHECK:       # %bb.0:
268*003b58f6SMatt Arsenault; CHECK-NEXT:    mflr r0
269*003b58f6SMatt Arsenault; CHECK-NEXT:    stdu r1, -48(r1)
270*003b58f6SMatt Arsenault; CHECK-NEXT:    std r0, 64(r1)
271*003b58f6SMatt Arsenault; CHECK-NEXT:    .cfi_def_cfa_offset 48
272*003b58f6SMatt Arsenault; CHECK-NEXT:    .cfi_offset lr, 16
273*003b58f6SMatt Arsenault; CHECK-NEXT:    addi r4, r1, 44
274*003b58f6SMatt Arsenault; CHECK-NEXT:    bl frexpf
275*003b58f6SMatt Arsenault; CHECK-NEXT:    nop
276*003b58f6SMatt Arsenault; CHECK-NEXT:    lwz r3, 44(r1)
277*003b58f6SMatt Arsenault; CHECK-NEXT:    addi r1, r1, 48
278*003b58f6SMatt Arsenault; CHECK-NEXT:    ld r0, 16(r1)
279*003b58f6SMatt Arsenault; CHECK-NEXT:    mtlr r0
280*003b58f6SMatt Arsenault; CHECK-NEXT:    blr
281*003b58f6SMatt Arsenault  %result = call { float, i32 } @llvm.frexp.f32.i32(float %a)
282*003b58f6SMatt Arsenault  %result.0 = extractvalue { float, i32 } %result, 1
283*003b58f6SMatt Arsenault  ret i32 %result.0
284*003b58f6SMatt Arsenault}
285*003b58f6SMatt Arsenault
286*003b58f6SMatt Arsenault; FIXME
287*003b58f6SMatt Arsenault; define { <2 x float>, <2 x i32> } @test_frexp_v2f32_v2i32(<2 x float> %a) {
288*003b58f6SMatt Arsenault;   %result = call { <2 x float>, <2 x i32> } @llvm.frexp.v2f32.v2i32(<2 x float> %a)
289*003b58f6SMatt Arsenault;   ret { <2 x float>, <2 x i32> } %result
290*003b58f6SMatt Arsenault; }
291*003b58f6SMatt Arsenault
292*003b58f6SMatt Arsenault; define <2 x float> @test_frexp_v2f32_v2i32_only_use_fract(<2 x float> %a) {
293*003b58f6SMatt Arsenault;   %result = call { <2 x float>, <2 x i32> } @llvm.frexp.v2f32.v2i32(<2 x float> %a)
294*003b58f6SMatt Arsenault;   %result.0 = extractvalue { <2 x float>, <2 x i32> } %result, 0
295*003b58f6SMatt Arsenault;   ret <2 x float> %result.0
296*003b58f6SMatt Arsenault; }
297*003b58f6SMatt Arsenault
298*003b58f6SMatt Arsenault; define <2 x i32> @test_frexp_v2f32_v2i32_only_use_exp(<2 x float> %a) {
299*003b58f6SMatt Arsenault;   %result = call { <2 x float>, <2 x i32> } @llvm.frexp.v2f32.v2i32(<2 x float> %a)
300*003b58f6SMatt Arsenault;   %result.1 = extractvalue { <2 x float>, <2 x i32> } %result, 1
301*003b58f6SMatt Arsenault;   ret <2 x i32> %result.1
302*003b58f6SMatt Arsenault; }
303*003b58f6SMatt Arsenault
304*003b58f6SMatt Arsenaultdefine { double, i32 } @test_frexp_f64_i32(double %a) {
305*003b58f6SMatt Arsenault; CHECK-LABEL: test_frexp_f64_i32:
306*003b58f6SMatt Arsenault; CHECK:       # %bb.0:
307*003b58f6SMatt Arsenault; CHECK-NEXT:    mflr r0
308*003b58f6SMatt Arsenault; CHECK-NEXT:    stdu r1, -48(r1)
309*003b58f6SMatt Arsenault; CHECK-NEXT:    std r0, 64(r1)
310*003b58f6SMatt Arsenault; CHECK-NEXT:    .cfi_def_cfa_offset 48
311*003b58f6SMatt Arsenault; CHECK-NEXT:    .cfi_offset lr, 16
312*003b58f6SMatt Arsenault; CHECK-NEXT:    addi r4, r1, 44
313*003b58f6SMatt Arsenault; CHECK-NEXT:    bl frexp
314*003b58f6SMatt Arsenault; CHECK-NEXT:    nop
315*003b58f6SMatt Arsenault; CHECK-NEXT:    lwz r3, 44(r1)
316*003b58f6SMatt Arsenault; CHECK-NEXT:    addi r1, r1, 48
317*003b58f6SMatt Arsenault; CHECK-NEXT:    ld r0, 16(r1)
318*003b58f6SMatt Arsenault; CHECK-NEXT:    mtlr r0
319*003b58f6SMatt Arsenault; CHECK-NEXT:    blr
320*003b58f6SMatt Arsenault  %result = call { double, i32 } @llvm.frexp.f64.i32(double %a)
321*003b58f6SMatt Arsenault  ret { double, i32 } %result
322*003b58f6SMatt Arsenault}
323*003b58f6SMatt Arsenault
324*003b58f6SMatt Arsenaultdefine double @test_frexp_f64_i32_only_use_fract(double %a) {
325*003b58f6SMatt Arsenault; CHECK-LABEL: test_frexp_f64_i32_only_use_fract:
326*003b58f6SMatt Arsenault; CHECK:       # %bb.0:
327*003b58f6SMatt Arsenault; CHECK-NEXT:    mflr r0
328*003b58f6SMatt Arsenault; CHECK-NEXT:    stdu r1, -48(r1)
329*003b58f6SMatt Arsenault; CHECK-NEXT:    std r0, 64(r1)
330*003b58f6SMatt Arsenault; CHECK-NEXT:    .cfi_def_cfa_offset 48
331*003b58f6SMatt Arsenault; CHECK-NEXT:    .cfi_offset lr, 16
332*003b58f6SMatt Arsenault; CHECK-NEXT:    addi r4, r1, 44
333*003b58f6SMatt Arsenault; CHECK-NEXT:    bl frexp
334*003b58f6SMatt Arsenault; CHECK-NEXT:    nop
335*003b58f6SMatt Arsenault; CHECK-NEXT:    addi r1, r1, 48
336*003b58f6SMatt Arsenault; CHECK-NEXT:    ld r0, 16(r1)
337*003b58f6SMatt Arsenault; CHECK-NEXT:    mtlr r0
338*003b58f6SMatt Arsenault; CHECK-NEXT:    blr
339*003b58f6SMatt Arsenault  %result = call { double, i32 } @llvm.frexp.f64.i32(double %a)
340*003b58f6SMatt Arsenault  %result.0 = extractvalue { double, i32 } %result, 0
341*003b58f6SMatt Arsenault  ret double %result.0
342*003b58f6SMatt Arsenault}
343*003b58f6SMatt Arsenault
344*003b58f6SMatt Arsenaultdefine i32 @test_frexp_f64_i32_only_use_exp(double %a) {
345*003b58f6SMatt Arsenault; CHECK-LABEL: test_frexp_f64_i32_only_use_exp:
346*003b58f6SMatt Arsenault; CHECK:       # %bb.0:
347*003b58f6SMatt Arsenault; CHECK-NEXT:    mflr r0
348*003b58f6SMatt Arsenault; CHECK-NEXT:    stdu r1, -48(r1)
349*003b58f6SMatt Arsenault; CHECK-NEXT:    std r0, 64(r1)
350*003b58f6SMatt Arsenault; CHECK-NEXT:    .cfi_def_cfa_offset 48
351*003b58f6SMatt Arsenault; CHECK-NEXT:    .cfi_offset lr, 16
352*003b58f6SMatt Arsenault; CHECK-NEXT:    addi r4, r1, 44
353*003b58f6SMatt Arsenault; CHECK-NEXT:    bl frexp
354*003b58f6SMatt Arsenault; CHECK-NEXT:    nop
355*003b58f6SMatt Arsenault; CHECK-NEXT:    lwz r3, 44(r1)
356*003b58f6SMatt Arsenault; CHECK-NEXT:    addi r1, r1, 48
357*003b58f6SMatt Arsenault; CHECK-NEXT:    ld r0, 16(r1)
358*003b58f6SMatt Arsenault; CHECK-NEXT:    mtlr r0
359*003b58f6SMatt Arsenault; CHECK-NEXT:    blr
360*003b58f6SMatt Arsenault  %result = call { double, i32 } @llvm.frexp.f64.i32(double %a)
361*003b58f6SMatt Arsenault  %result.0 = extractvalue { double, i32 } %result, 1
362*003b58f6SMatt Arsenault  ret i32 %result.0
363*003b58f6SMatt Arsenault}
364*003b58f6SMatt Arsenault
365*003b58f6SMatt Arsenault; FIXME: Widen vector result
366*003b58f6SMatt Arsenault; define { <2 x double>, <2 x i32> } @test_frexp_v2f64_v2i32(<2 x double> %a) {
367*003b58f6SMatt Arsenault;   %result = call { <2 x double>, <2 x i32> } @llvm.frexp.v2f64.v2i32(<2 x double> %a)
368*003b58f6SMatt Arsenault;   ret { <2 x double>, <2 x i32> } %result
369*003b58f6SMatt Arsenault; }
370*003b58f6SMatt Arsenault
371*003b58f6SMatt Arsenault; define <2 x double> @test_frexp_v2f64_v2i32_only_use_fract(<2 x double> %a) {
372*003b58f6SMatt Arsenault;   %result = call { <2 x double>, <2 x i32> } @llvm.frexp.v2f64.v2i32(<2 x double> %a)
373*003b58f6SMatt Arsenault;   %result.0 = extractvalue { <2 x double>, <2 x i32> } %result, 0
374*003b58f6SMatt Arsenault;   ret <2 x double> %result.0
375*003b58f6SMatt Arsenault; }
376*003b58f6SMatt Arsenault
377*003b58f6SMatt Arsenault; define <2 x i32> @test_frexp_v2f64_v2i32_only_use_exp(<2 x double> %a) {
378*003b58f6SMatt Arsenault;   %result = call { <2 x double>, <2 x i32> } @llvm.frexp.v2f64.v2i32(<2 x double> %a)
379*003b58f6SMatt Arsenault;   %result.1 = extractvalue { <2 x double>, <2 x i32> } %result, 1
380*003b58f6SMatt Arsenault;   ret <2 x i32> %result.1
381*003b58f6SMatt Arsenault; }
382*003b58f6SMatt Arsenault
383*003b58f6SMatt Arsenault; FIXME: f128 ExpandFloatResult
384*003b58f6SMatt Arsenault; define { ppc_fp128, i32 } @test_frexp_f128_i32(ppc_fp128 %a) {
385*003b58f6SMatt Arsenault;   %result = call { ppc_fp128, i32 } @llvm.frexp.f128.i32(ppc_fp128 %a)
386*003b58f6SMatt Arsenault;   ret { ppc_fp128, i32 } %result
387*003b58f6SMatt Arsenault; }
388*003b58f6SMatt Arsenault
389*003b58f6SMatt Arsenault; define ppc_fp128 @test_frexp_f128_i32_only_use_fract(ppc_fp128 %a) {
390*003b58f6SMatt Arsenault;   %result = call { ppc_fp128, i32 } @llvm.frexp.f128.i32(ppc_fp128 %a)
391*003b58f6SMatt Arsenault;   %result.0 = extractvalue { ppc_fp128, i32 } %result, 0
392*003b58f6SMatt Arsenault;   ret ppc_fp128 %result.0
393*003b58f6SMatt Arsenault; }
394*003b58f6SMatt Arsenault
395*003b58f6SMatt Arsenault; define i32 @test_frexp_f128_i32_only_use_exp(ppc_fp128 %a) {
396*003b58f6SMatt Arsenault;   %result = call { ppc_fp128, i32 } @llvm.frexp.f128.i32(ppc_fp128 %a)
397*003b58f6SMatt Arsenault;   %result.0 = extractvalue { ppc_fp128, i32 } %result, 1
398*003b58f6SMatt Arsenault;   ret i32 %result.0
399*003b58f6SMatt Arsenault; }
400*003b58f6SMatt Arsenault
401*003b58f6SMatt Arsenaultdeclare { float, i32 } @llvm.frexp.f32.i32(float) #0
402*003b58f6SMatt Arsenaultdeclare { <2 x float>, <2 x i32> } @llvm.frexp.v2f32.v2i32(<2 x float>) #0
403*003b58f6SMatt Arsenault
404*003b58f6SMatt Arsenaultdeclare { half, i32 } @llvm.frexp.f16.i32(half) #0
405*003b58f6SMatt Arsenaultdeclare { <2 x half>, <2 x i32> } @llvm.frexp.v2f16.v2i32(<2 x half>) #0
406*003b58f6SMatt Arsenault
407*003b58f6SMatt Arsenaultdeclare { double, i32 } @llvm.frexp.f64.i32(double) #0
408*003b58f6SMatt Arsenaultdeclare { <2 x double>, <2 x i32> } @llvm.frexp.v2f64.v2i32(<2 x double>) #0
409*003b58f6SMatt Arsenault
410*003b58f6SMatt Arsenaultdeclare { half, i16 } @llvm.frexp.f16.i16(half) #0
411*003b58f6SMatt Arsenaultdeclare { <2 x half>, <2 x i16> } @llvm.frexp.v2f16.v2i16(<2 x half>) #0
412*003b58f6SMatt Arsenault
413*003b58f6SMatt Arsenaultdeclare { ppc_fp128, i32 } @llvm.frexp.f128.i32(ppc_fp128) #0
414*003b58f6SMatt Arsenault
415*003b58f6SMatt Arsenaultattributes #0 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
416