xref: /llvm-project/llvm/test/CodeGen/PowerPC/exp10-libcall.ll (revision b14e83d1a449d70239e1d37e2a406e9a0e3892a1)
1*b14e83d1SMatt Arsenault; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
2*b14e83d1SMatt Arsenault; RUN: llc -mcpu=pwr9 -mtriple=powerpc64le-unknown-unknown \
3*b14e83d1SMatt Arsenault; RUN:   -ppc-vsr-nums-as-vr -ppc-asm-full-reg-names < %s | FileCheck %s
4*b14e83d1SMatt Arsenault
5*b14e83d1SMatt Arsenaultdefine float @call_exp10f(float %a) {
6*b14e83d1SMatt Arsenault; CHECK-LABEL: call_exp10f:
7*b14e83d1SMatt Arsenault; CHECK:       # %bb.0:
8*b14e83d1SMatt Arsenault; CHECK-NEXT:    mflr r0
9*b14e83d1SMatt Arsenault; CHECK-NEXT:    stdu r1, -32(r1)
10*b14e83d1SMatt Arsenault; CHECK-NEXT:    std r0, 48(r1)
11*b14e83d1SMatt Arsenault; CHECK-NEXT:    .cfi_def_cfa_offset 32
12*b14e83d1SMatt Arsenault; CHECK-NEXT:    .cfi_offset lr, 16
13*b14e83d1SMatt Arsenault; CHECK-NEXT:    bl exp10f
14*b14e83d1SMatt Arsenault; CHECK-NEXT:    nop
15*b14e83d1SMatt Arsenault; CHECK-NEXT:    addi r1, r1, 32
16*b14e83d1SMatt Arsenault; CHECK-NEXT:    ld r0, 16(r1)
17*b14e83d1SMatt Arsenault; CHECK-NEXT:    mtlr r0
18*b14e83d1SMatt Arsenault; CHECK-NEXT:    blr
19*b14e83d1SMatt Arsenault  %result = call float @exp10f(float %a)
20*b14e83d1SMatt Arsenault  ret float %result
21*b14e83d1SMatt Arsenault}
22*b14e83d1SMatt Arsenault
23*b14e83d1SMatt Arsenaultdefine double @call_exp10(double %a) {
24*b14e83d1SMatt Arsenault; CHECK-LABEL: call_exp10:
25*b14e83d1SMatt Arsenault; CHECK:       # %bb.0:
26*b14e83d1SMatt Arsenault; CHECK-NEXT:    mflr r0
27*b14e83d1SMatt Arsenault; CHECK-NEXT:    stdu r1, -32(r1)
28*b14e83d1SMatt Arsenault; CHECK-NEXT:    std r0, 48(r1)
29*b14e83d1SMatt Arsenault; CHECK-NEXT:    .cfi_def_cfa_offset 32
30*b14e83d1SMatt Arsenault; CHECK-NEXT:    .cfi_offset lr, 16
31*b14e83d1SMatt Arsenault; CHECK-NEXT:    bl exp10
32*b14e83d1SMatt Arsenault; CHECK-NEXT:    nop
33*b14e83d1SMatt Arsenault; CHECK-NEXT:    addi r1, r1, 32
34*b14e83d1SMatt Arsenault; CHECK-NEXT:    ld r0, 16(r1)
35*b14e83d1SMatt Arsenault; CHECK-NEXT:    mtlr r0
36*b14e83d1SMatt Arsenault; CHECK-NEXT:    blr
37*b14e83d1SMatt Arsenault  %result = call double @exp10(double %a)
38*b14e83d1SMatt Arsenault  ret double %result
39*b14e83d1SMatt Arsenault}
40*b14e83d1SMatt Arsenault
41*b14e83d1SMatt Arsenaultdefine ppc_fp128 @call_exp10l(ppc_fp128 %a) {
42*b14e83d1SMatt Arsenault; CHECK-LABEL: call_exp10l:
43*b14e83d1SMatt Arsenault; CHECK:       # %bb.0:
44*b14e83d1SMatt Arsenault; CHECK-NEXT:    mflr r0
45*b14e83d1SMatt Arsenault; CHECK-NEXT:    stdu r1, -32(r1)
46*b14e83d1SMatt Arsenault; CHECK-NEXT:    std r0, 48(r1)
47*b14e83d1SMatt Arsenault; CHECK-NEXT:    .cfi_def_cfa_offset 32
48*b14e83d1SMatt Arsenault; CHECK-NEXT:    .cfi_offset lr, 16
49*b14e83d1SMatt Arsenault; CHECK-NEXT:    bl exp10l
50*b14e83d1SMatt Arsenault; CHECK-NEXT:    nop
51*b14e83d1SMatt Arsenault; CHECK-NEXT:    addi r1, r1, 32
52*b14e83d1SMatt Arsenault; CHECK-NEXT:    ld r0, 16(r1)
53*b14e83d1SMatt Arsenault; CHECK-NEXT:    mtlr r0
54*b14e83d1SMatt Arsenault; CHECK-NEXT:    blr
55*b14e83d1SMatt Arsenault  %result = call ppc_fp128 @exp10l(ppc_fp128 %a)
56*b14e83d1SMatt Arsenault  ret ppc_fp128 %result
57*b14e83d1SMatt Arsenault}
58*b14e83d1SMatt Arsenault
59*b14e83d1SMatt Arsenaultdeclare float @exp10f(float %a) #0
60*b14e83d1SMatt Arsenaultdeclare double @exp10(double %a) #0
61*b14e83d1SMatt Arsenaultdeclare ppc_fp128 @exp10l(ppc_fp128 %a) #0
62*b14e83d1SMatt Arsenault
63*b14e83d1SMatt Arsenaultattributes #0 = { nounwind readonly }
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