1c9d36f18SSanjay Patel; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2c9d36f18SSanjay Patel; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc64le-unknown-unknown | FileCheck %s 3748b0651SSanjay Patel 4748b0651SSanjay Pateldefine i1 @and_cmp1(i32 %x, i32 %y) { 5748b0651SSanjay Patel; CHECK-LABEL: and_cmp1: 6*25528d6dSFrancis Visoiu Mistrih; CHECK: # %bb.0: 7c9d36f18SSanjay Patel; CHECK-NEXT: andc 3, 4, 3 8c9d36f18SSanjay Patel; CHECK-NEXT: cntlzw 3, 3 9c9d36f18SSanjay Patel; CHECK-NEXT: rlwinm 3, 3, 27, 31, 31 10c9d36f18SSanjay Patel; CHECK-NEXT: blr 11748b0651SSanjay Patel %and = and i32 %x, %y 12748b0651SSanjay Patel %cmp = icmp eq i32 %and, %y 13748b0651SSanjay Patel ret i1 %cmp 14748b0651SSanjay Patel} 15748b0651SSanjay Patel 16748b0651SSanjay Pateldefine i1 @and_cmp_const(i32 %x) { 17748b0651SSanjay Patel; CHECK-LABEL: and_cmp_const: 18*25528d6dSFrancis Visoiu Mistrih; CHECK: # %bb.0: 19c9d36f18SSanjay Patel; CHECK-NEXT: li 4, 43 20c9d36f18SSanjay Patel; CHECK-NEXT: andc 3, 4, 3 21c9d36f18SSanjay Patel; CHECK-NEXT: cntlzw 3, 3 22c9d36f18SSanjay Patel; CHECK-NEXT: rlwinm 3, 3, 27, 31, 31 23c9d36f18SSanjay Patel; CHECK-NEXT: blr 24748b0651SSanjay Patel %and = and i32 %x, 43 25748b0651SSanjay Patel %cmp = icmp eq i32 %and, 43 26748b0651SSanjay Patel ret i1 %cmp 27748b0651SSanjay Patel} 28748b0651SSanjay Patel 295ef4b031SHal Finkeldefine i1 @foo(i32 %i) { 305ef4b031SHal Finkel; CHECK-LABEL: foo: 31*25528d6dSFrancis Visoiu Mistrih; CHECK: # %bb.0: 32c9d36f18SSanjay Patel; CHECK-NEXT: lis 4, 4660 33c9d36f18SSanjay Patel; CHECK-NEXT: ori 4, 4, 22136 34c9d36f18SSanjay Patel; CHECK-NEXT: andc 3, 4, 3 35c9d36f18SSanjay Patel; CHECK-NEXT: cntlzw 3, 3 36c9d36f18SSanjay Patel; CHECK-NEXT: rlwinm 3, 3, 27, 31, 31 37c9d36f18SSanjay Patel; CHECK-NEXT: blr 385ef4b031SHal Finkel %and = and i32 %i, 305419896 395ef4b031SHal Finkel %cmp = icmp eq i32 %and, 305419896 405ef4b031SHal Finkel ret i1 %cmp 415ef4b031SHal Finkel} 425ef4b031SHal Finkel 43c9d36f18SSanjay Pateldefine <4 x i32> @hidden_not_v4i32(<4 x i32> %x) { 44c9d36f18SSanjay Patel; CHECK-LABEL: hidden_not_v4i32: 45*25528d6dSFrancis Visoiu Mistrih; CHECK: # %bb.0: 46ae382bb6SSanjay Patel; CHECK-NEXT: vspltisw 3, 6 47ae382bb6SSanjay Patel; CHECK-NEXT: xxlandc 34, 35, 34 48c9d36f18SSanjay Patel; CHECK-NEXT: blr 49c9d36f18SSanjay Patel %xor = xor <4 x i32> %x, <i32 15, i32 15, i32 15, i32 15> 50c9d36f18SSanjay Patel %and = and <4 x i32> %xor, <i32 6, i32 6, i32 6, i32 6> 51c9d36f18SSanjay Patel ret <4 x i32> %and 52c9d36f18SSanjay Patel} 53c9d36f18SSanjay Patel 54