xref: /llvm-project/llvm/test/CodeGen/PowerPC/aix-vector-vararg-fixed-caller.ll (revision ba627a32e125cab988f97da8e2466398f2bc75b2)
1f0904a62SSean Fertile; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2f0904a62SSean Fertile; RUN: llc -verify-machineinstrs -stop-before=ppc-vsx-copy -vec-extabi \
3f0904a62SSean Fertile; RUN:     -mcpu=pwr7  -mtriple powerpc-ibm-aix-xcoff < %s | \
4f0904a62SSean Fertile; RUN: FileCheck --check-prefix=32BIT %s
5f0904a62SSean Fertile
6f0904a62SSean Fertile; RUN: llc -verify-machineinstrs -stop-before=ppc-vsx-copy -vec-extabi \
7f0904a62SSean Fertile; RUN:     -mcpu=pwr7  -mtriple powerpc64-ibm-aix-xcoff < %s | \
8f0904a62SSean Fertile; RUN: FileCheck --check-prefix=64BIT %s
9f0904a62SSean Fertile
10f0904a62SSean Fertiledefine void @caller() {
11*ba627a32SAmy Kwan
12*ba627a32SAmy Kwan
13f0904a62SSean Fertile  ; 32BIT-LABEL: name: caller
14f0904a62SSean Fertile  ; 32BIT: bb.0.entry:
15f0904a62SSean Fertile  ; 32BIT:   ADJCALLSTACKDOWN 88, 0, implicit-def dead $r1, implicit $r1
16fae05692SMatt Arsenault  ; 32BIT:   [[LWZtoc:%[0-9]+]]:gprc = LWZtoc %const.0, $r2 :: (load (s32) from got)
17fae05692SMatt Arsenault  ; 32BIT:   [[LXVW4X:%[0-9]+]]:vsrc = LXVW4X $zero, killed [[LWZtoc]] :: (load (s128) from constant-pool)
18f0904a62SSean Fertile  ; 32BIT:   [[LI:%[0-9]+]]:gprc = LI 64
19fae05692SMatt Arsenault  ; 32BIT:   STXVW4X killed [[LXVW4X]], $r1, killed [[LI]] :: (store (s128))
20f0904a62SSean Fertile  ; 32BIT:   [[LIS:%[0-9]+]]:gprc = LIS 38314
21f0904a62SSean Fertile  ; 32BIT:   [[ORI:%[0-9]+]]:gprc = ORI killed [[LIS]], 63376
22fae05692SMatt Arsenault  ; 32BIT:   STW killed [[ORI]], 84, $r1 :: (store (s32) into unknown-address + 4, basealign 8)
23f0904a62SSean Fertile  ; 32BIT:   [[LIS1:%[0-9]+]]:gprc = LIS 16389
24f0904a62SSean Fertile  ; 32BIT:   [[ORI1:%[0-9]+]]:gprc = ORI killed [[LIS1]], 48905
25fae05692SMatt Arsenault  ; 32BIT:   STW killed [[ORI1]], 80, $r1 :: (store (s32), align 8)
26fae05692SMatt Arsenault  ; 32BIT:   [[LWZtoc1:%[0-9]+]]:gprc = LWZtoc %const.1, $r2 :: (load (s32) from got)
27fae05692SMatt Arsenault  ; 32BIT:   [[LXVW4X1:%[0-9]+]]:vsrc = LXVW4X $zero, killed [[LWZtoc1]] :: (load (s128) from constant-pool)
28*ba627a32SAmy Kwan  ; 32BIT:   [[LWZtoc2:%[0-9]+]]:gprc_and_gprc_nor0 = LWZtoc %const.2, $r2 :: (load (s32) from got)
29*ba627a32SAmy Kwan  ; 32BIT:   [[LFD:%[0-9]+]]:f8rc = LFD 0, killed [[LWZtoc2]] :: (load (s64) from constant-pool)
30f0904a62SSean Fertile  ; 32BIT:   [[LIS2:%[0-9]+]]:gprc = LIS 16393
31f0904a62SSean Fertile  ; 32BIT:   [[ORI2:%[0-9]+]]:gprc = ORI killed [[LIS2]], 8697
32f0904a62SSean Fertile  ; 32BIT:   [[LIS3:%[0-9]+]]:gprc = LIS 61467
33f0904a62SSean Fertile  ; 32BIT:   [[ORI3:%[0-9]+]]:gprc = ORI killed [[LIS3]], 34414
34*ba627a32SAmy Kwan  ; 32BIT:   [[LWZtoc3:%[0-9]+]]:gprc_and_gprc_nor0 = LWZtoc %const.3, $r2 :: (load (s32) from got)
35*ba627a32SAmy Kwan  ; 32BIT:   [[LFD1:%[0-9]+]]:f8rc = LFD 0, killed [[LWZtoc3]] :: (load (s64) from constant-pool)
36f0904a62SSean Fertile  ; 32BIT:   [[LI1:%[0-9]+]]:gprc = LI 55
37f0904a62SSean Fertile  ; 32BIT:   $r3 = COPY [[LI1]]
38f0904a62SSean Fertile  ; 32BIT:   $v2 = COPY [[LXVW4X1]]
39*ba627a32SAmy Kwan  ; 32BIT:   $f1 = COPY [[LFD]]
40f0904a62SSean Fertile  ; 32BIT:   $r9 = COPY [[ORI2]]
41f0904a62SSean Fertile  ; 32BIT:   $r10 = COPY [[ORI3]]
42*ba627a32SAmy Kwan  ; 32BIT:   $f2 = COPY [[LFD1]]
43f0904a62SSean Fertile  ; 32BIT:   BL_NOP <mcsymbol .callee[PR]>, csr_aix32_altivec, implicit-def dead $lr, implicit $rm, implicit $r3, implicit $v2, implicit $f1, implicit $r9, implicit $r10, implicit $f2, implicit $r2, implicit-def $r1, implicit-def $v2
44f0904a62SSean Fertile  ; 32BIT:   ADJCALLSTACKUP 88, 0, implicit-def dead $r1, implicit $r1
45f0904a62SSean Fertile  ; 32BIT:   [[COPY:%[0-9]+]]:vsrc = COPY $v2
46f0904a62SSean Fertile  ; 32BIT:   BLR implicit $lr, implicit $rm
47f0904a62SSean Fertile  ; 64BIT-LABEL: name: caller
48f0904a62SSean Fertile  ; 64BIT: bb.0.entry:
49f0904a62SSean Fertile  ; 64BIT:   ADJCALLSTACKDOWN 120, 0, implicit-def dead $r1, implicit $r1
50fae05692SMatt Arsenault  ; 64BIT:   [[LDtocCPT:%[0-9]+]]:g8rc = LDtocCPT %const.0, $x2 :: (load (s64) from got)
51fae05692SMatt Arsenault  ; 64BIT:   [[LXVW4X:%[0-9]+]]:vsrc = LXVW4X $zero8, killed [[LDtocCPT]] :: (load (s128) from constant-pool)
52f0904a62SSean Fertile  ; 64BIT:   [[LI8_:%[0-9]+]]:g8rc = LI8 96
53fae05692SMatt Arsenault  ; 64BIT:   STXVW4X killed [[LXVW4X]], $x1, killed [[LI8_]] :: (store (s128))
54f0904a62SSean Fertile  ; 64BIT:   [[LIS8_:%[0-9]+]]:g8rc = LIS8 16389
55f0904a62SSean Fertile  ; 64BIT:   [[ORI8_:%[0-9]+]]:g8rc = ORI8 killed [[LIS8_]], 48905
56f0904a62SSean Fertile  ; 64BIT:   [[RLDIC:%[0-9]+]]:g8rc = RLDIC killed [[ORI8_]], 32, 1
57f0904a62SSean Fertile  ; 64BIT:   [[ORIS8_:%[0-9]+]]:g8rc = ORIS8 killed [[RLDIC]], 38314
58f0904a62SSean Fertile  ; 64BIT:   [[ORI8_1:%[0-9]+]]:g8rc = ORI8 killed [[ORIS8_]], 63376
59fae05692SMatt Arsenault  ; 64BIT:   STD killed [[ORI8_1]], 112, $x1 :: (store (s64))
60fae05692SMatt Arsenault  ; 64BIT:   [[LDtocCPT1:%[0-9]+]]:g8rc = LDtocCPT %const.1, $x2 :: (load (s64) from got)
61fae05692SMatt Arsenault  ; 64BIT:   [[LXVW4X1:%[0-9]+]]:vsrc = LXVW4X $zero8, killed [[LDtocCPT1]] :: (load (s128) from constant-pool)
62fae05692SMatt Arsenault  ; 64BIT:   [[LD:%[0-9]+]]:g8rc = LD 104, $x1 :: (load (s64))
63fae05692SMatt Arsenault  ; 64BIT:   [[LD1:%[0-9]+]]:g8rc = LD 96, $x1 :: (load (s64))
64*ba627a32SAmy Kwan  ; 64BIT:   [[LDtocCPT2:%[0-9]+]]:g8rc_and_g8rc_nox0 = LDtocCPT %const.2, $x2 :: (load (s64) from got)
65*ba627a32SAmy Kwan  ; 64BIT:   [[LFD:%[0-9]+]]:f8rc = LFD 0, killed [[LDtocCPT2]] :: (load (s64) from constant-pool)
66*ba627a32SAmy Kwan  ; 64BIT:   [[LDtocCPT3:%[0-9]+]]:g8rc_and_g8rc_nox0 = LDtocCPT %const.3, $x2 :: (load (s64) from got)
67*ba627a32SAmy Kwan  ; 64BIT:   [[LFD1:%[0-9]+]]:f8rc = LFD 0, killed [[LDtocCPT3]] :: (load (s64) from constant-pool)
68f0904a62SSean Fertile  ; 64BIT:   [[LIS8_1:%[0-9]+]]:g8rc = LIS8 16393
69f0904a62SSean Fertile  ; 64BIT:   [[ORI8_2:%[0-9]+]]:g8rc = ORI8 killed [[LIS8_1]], 8697
70f0904a62SSean Fertile  ; 64BIT:   [[RLDIC1:%[0-9]+]]:g8rc = RLDIC killed [[ORI8_2]], 32, 1
71f0904a62SSean Fertile  ; 64BIT:   [[ORIS8_1:%[0-9]+]]:g8rc = ORIS8 killed [[RLDIC1]], 61467
72f0904a62SSean Fertile  ; 64BIT:   [[ORI8_3:%[0-9]+]]:g8rc = ORI8 killed [[ORIS8_1]], 34414
73f0904a62SSean Fertile  ; 64BIT:   [[LI8_1:%[0-9]+]]:g8rc = LI8 55
74f0904a62SSean Fertile  ; 64BIT:   $x3 = COPY [[LI8_1]]
75f0904a62SSean Fertile  ; 64BIT:   $v2 = COPY [[LXVW4X1]]
76*ba627a32SAmy Kwan  ; 64BIT:   $f1 = COPY [[LFD]]
77f0904a62SSean Fertile  ; 64BIT:   $x7 = COPY [[ORI8_3]]
78f0904a62SSean Fertile  ; 64BIT:   $x9 = COPY [[LD1]]
79f0904a62SSean Fertile  ; 64BIT:   $x10 = COPY [[LD]]
80*ba627a32SAmy Kwan  ; 64BIT:   $f2 = COPY [[LFD1]]
81f0904a62SSean Fertile  ; 64BIT:   BL8_NOP <mcsymbol .callee[PR]>, csr_ppc64_altivec, implicit-def dead $lr8, implicit $rm, implicit $x3, implicit $v2, implicit $f1, implicit $x7, implicit $x9, implicit $x10, implicit $f2, implicit $x2, implicit-def $r1, implicit-def $v2
82f0904a62SSean Fertile  ; 64BIT:   ADJCALLSTACKUP 120, 0, implicit-def dead $r1, implicit $r1
83f0904a62SSean Fertile  ; 64BIT:   [[COPY:%[0-9]+]]:vsrc = COPY $v2
84f0904a62SSean Fertile  ; 64BIT:   BLR8 implicit $lr8, implicit $rm
85f0904a62SSean Fertileentry:
86f0904a62SSean Fertile  %call = tail call <4 x i32> (i32, <4 x i32>, double, ...) @callee(i32 signext 55, <4 x i32> <i32 170, i32 187, i32 204, i32 221>, double 3.141590e+00, <4 x i32> <i32 10, i32 20, i32 30, i32 40>, double 2.718280e+00)
87f0904a62SSean Fertile  ret void
88f0904a62SSean Fertile}
89f0904a62SSean Fertile
90f0904a62SSean Fertiledeclare <4 x i32> @callee(i32 signext, <4 x i32>, double, ...)
91f0904a62SSean Fertile
92