xref: /llvm-project/llvm/test/CodeGen/Mips/optimizeAndPlusShift.ll (revision e13e95bc44b0f3cd4312078ecf98889888bc0511)
1*e13e95bcSyingopq; RUN: llc < %s -mtriple=mipsel-unknown-linux-gnu | FileCheck %s --check-prefixes=MIPS32
2*e13e95bcSyingopq; RUN: llc < %s -mtriple=mips64el-unknown-linux-gnuabi64 | FileCheck %s --check-prefixes=MIPS64
3*e13e95bcSyingopq; RUN: llc < %s -mtriple=mips64el-unknown-linux-gnuabi64 | FileCheck %s --check-prefixes=MIPS64
4*e13e95bcSyingopq
5*e13e95bcSyingopqdefine i32 @shl_32(i32 %a, i32 %b) {
6*e13e95bcSyingopq; MIPS32-LABLE:   shl_32:
7*e13e95bcSyingopq; MIPS32:	  # %bb.0:
8*e13e95bcSyingopq; MIPS32-NEXT:    jr	$ra
9*e13e95bcSyingopq; MIPS32-NEXT:    sllv	$2, $4, $5
10*e13e95bcSyingopq; MIPS64-LABLE:   shl_32:
11*e13e95bcSyingopq; MIPS64:	  # %bb.0:
12*e13e95bcSyingopq; MIPS64-NEXT:    sll   $1, $5, 0
13*e13e95bcSyingopq; MIPS64-NEXT:    sll   $2, $4, 0
14*e13e95bcSyingopq; MIPS64-NEXT:    jr	$ra
15*e13e95bcSyingopq; MIPS64-NEXT:    sllv	$2, $2, $1
16*e13e95bcSyingopq  %_1 = and i32 %b, 31
17*e13e95bcSyingopq  %_0 = shl i32 %a, %_1
18*e13e95bcSyingopq  ret i32 %_0
19*e13e95bcSyingopq}
20*e13e95bcSyingopq
21*e13e95bcSyingopqdefine i32 @lshr_32(i32 %a, i32 %b) {
22*e13e95bcSyingopq; MIPS32-LABLE:   lshr_32:
23*e13e95bcSyingopq; MIPS32:	  # %bb.0:
24*e13e95bcSyingopq; MIPS32-NEXT:    jr	$ra
25*e13e95bcSyingopq; MIPS32-NEXT:    srlv	$2, $4, $5
26*e13e95bcSyingopq; MIPS64-LABLE:   lshr_32:
27*e13e95bcSyingopq; MIPS64:	  # %bb.0:
28*e13e95bcSyingopq; MIPS64-NEXT:    sll   $1, $5, 0
29*e13e95bcSyingopq; MIPS64-NEXT:    sll   $2, $4, 0
30*e13e95bcSyingopq; MIPS64-NEXT:    jr	$ra
31*e13e95bcSyingopq; MIPS64-NEXT:    srlv	$2, $2, $1
32*e13e95bcSyingopq  %_1 = and i32 %b, 31
33*e13e95bcSyingopq  %_0 = lshr i32 %a, %_1
34*e13e95bcSyingopq  ret i32 %_0
35*e13e95bcSyingopq}
36*e13e95bcSyingopq
37*e13e95bcSyingopqdefine i32 @ashr_32(i32 %a, i32 %b) {
38*e13e95bcSyingopq; MIPS32-LABLE:   ashr_32:
39*e13e95bcSyingopq; MIPS32:	  # %bb.0:
40*e13e95bcSyingopq; MIPS32-NEXT:    jr	$ra
41*e13e95bcSyingopq; MIPS32-NEXT:    srav	$2, $4, $5
42*e13e95bcSyingopq; MIPS64-LABLE:   ashr_32:
43*e13e95bcSyingopq; MIPS64:	  # %bb.0:
44*e13e95bcSyingopq; MIPS64-NEXT:    sll   $1, $5, 0
45*e13e95bcSyingopq; MIPS64-NEXT:    sll   $2, $4, 0
46*e13e95bcSyingopq; MIPS64-NEXT:    jr	$ra
47*e13e95bcSyingopq; MIPS64-NEXT:    srav	$2, $2, $1
48*e13e95bcSyingopq  %_1 = and i32 %b, 31
49*e13e95bcSyingopq  %_0 = ashr i32 %a, %_1
50*e13e95bcSyingopq  ret i32 %_0
51*e13e95bcSyingopq}
52*e13e95bcSyingopq
53*e13e95bcSyingopqdefine i64 @shl_64(i64 %a, i64 %b) {
54*e13e95bcSyingopq; MIPS64-LABLE:   shl_64:
55*e13e95bcSyingopq; MIPS64:	  # %bb.0:
56*e13e95bcSyingopq; MIPS64-NEXT:    sll   $1, $5, 0
57*e13e95bcSyingopq; MIPS64-NEXT:    jr	$ra
58*e13e95bcSyingopq; MIPS64-NEXT:    dsllv	$2, $4, $1
59*e13e95bcSyingopq  %_1 = and i64 %b, 63
60*e13e95bcSyingopq  %_0 = shl i64 %a, %_1
61*e13e95bcSyingopq  ret i64 %_0
62*e13e95bcSyingopq}
63*e13e95bcSyingopq
64*e13e95bcSyingopqdefine i64 @lshr_64(i64 %a, i64 %b) {
65*e13e95bcSyingopq; MIPS64-LABLE:   lshr_64:
66*e13e95bcSyingopq; MIPS64:	  # %bb.0:
67*e13e95bcSyingopq; MIPS64-NEXT:    sll   $1, $5, 0
68*e13e95bcSyingopq; MIPS64-NEXT:    jr	$ra
69*e13e95bcSyingopq; MIPS64-NEXT:    dsrlv	$2, $4, $1
70*e13e95bcSyingopq  %_1 = and i64 %b, 63
71*e13e95bcSyingopq  %_0 = lshr i64 %a, %_1
72*e13e95bcSyingopq  ret i64 %_0
73*e13e95bcSyingopq}
74*e13e95bcSyingopq
75*e13e95bcSyingopqdefine i64 @ashr_64(i64 %a, i64 %b) {
76*e13e95bcSyingopq; MIPS64-LABLE:   ashr_64:
77*e13e95bcSyingopq; MIPS64:	  # %bb.0:
78*e13e95bcSyingopq; MIPS64-NEXT:    sll   $1, $5, 0
79*e13e95bcSyingopq; MIPS64-NEXT:    jr	$ra
80*e13e95bcSyingopq; MIPS64-NEXT:    dsrav	$2, $4, $1
81*e13e95bcSyingopq  %_1 = and i64 %b, 63
82*e13e95bcSyingopq  %_0 = ashr i64 %a, %_1
83*e13e95bcSyingopq  ret i64 %_0
84*e13e95bcSyingopq}
85