1; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s 2 3define <8 x i8> @vld1dupi8(i8* %A) nounwind { 4;CHECK: vld1dupi8: 5;Check the (default) alignment value. 6;CHECK: vld1.8 {d16[]}, [r0] 7 %tmp1 = load i8* %A, align 8 8 %tmp2 = insertelement <8 x i8> undef, i8 %tmp1, i32 0 9 %tmp3 = shufflevector <8 x i8> %tmp2, <8 x i8> undef, <8 x i32> zeroinitializer 10 ret <8 x i8> %tmp3 11} 12 13define <4 x i16> @vld1dupi16(i16* %A) nounwind { 14;CHECK: vld1dupi16: 15;Check the alignment value. Max for this instruction is 16 bits: 16;CHECK: vld1.16 {d16[]}, [r0, :16] 17 %tmp1 = load i16* %A, align 8 18 %tmp2 = insertelement <4 x i16> undef, i16 %tmp1, i32 0 19 %tmp3 = shufflevector <4 x i16> %tmp2, <4 x i16> undef, <4 x i32> zeroinitializer 20 ret <4 x i16> %tmp3 21} 22 23define <2 x i32> @vld1dupi32(i32* %A) nounwind { 24;CHECK: vld1dupi32: 25;Check the alignment value. Max for this instruction is 32 bits: 26;CHECK: vld1.32 {d16[]}, [r0, :32] 27 %tmp1 = load i32* %A, align 8 28 %tmp2 = insertelement <2 x i32> undef, i32 %tmp1, i32 0 29 %tmp3 = shufflevector <2 x i32> %tmp2, <2 x i32> undef, <2 x i32> zeroinitializer 30 ret <2 x i32> %tmp3 31} 32 33define <16 x i8> @vld1dupQi8(i8* %A) nounwind { 34;CHECK: vld1dupQi8: 35;Check the (default) alignment value. 36;CHECK: vld1.8 {d16[], d17[]}, [r0] 37 %tmp1 = load i8* %A, align 8 38 %tmp2 = insertelement <16 x i8> undef, i8 %tmp1, i32 0 39 %tmp3 = shufflevector <16 x i8> %tmp2, <16 x i8> undef, <16 x i32> zeroinitializer 40 ret <16 x i8> %tmp3 41} 42 43%struct.__neon_int8x8x2_t = type { <8 x i8>, <8 x i8> } 44%struct.__neon_int2x32x2_t = type { <2 x i32>, <2 x i32> } 45 46define <8 x i8> @vld2dupi8(i8* %A) nounwind { 47;CHECK: vld2dupi8: 48;Check the (default) alignment value. 49;CHECK: vld2.8 {d16[], d17[]}, [r0] 50 %tmp0 = tail call %struct.__neon_int8x8x2_t @llvm.arm.neon.vld2lane.v8i8(i8* %A, <8 x i8> undef, <8 x i8> undef, i32 0, i32 1) 51 %tmp1 = extractvalue %struct.__neon_int8x8x2_t %tmp0, 0 52 %tmp2 = shufflevector <8 x i8> %tmp1, <8 x i8> undef, <8 x i32> zeroinitializer 53 %tmp3 = extractvalue %struct.__neon_int8x8x2_t %tmp0, 1 54 %tmp4 = shufflevector <8 x i8> %tmp3, <8 x i8> undef, <8 x i32> zeroinitializer 55 %tmp5 = add <8 x i8> %tmp2, %tmp4 56 ret <8 x i8> %tmp5 57} 58 59define <2 x i32> @vld2dupi32(i32* %A) nounwind { 60;CHECK: vld2dupi32: 61;Check the alignment value. Max for this instruction is 64 bits: 62;CHECK: vld2.32 {d16[], d17[]}, [r0, :64] 63 %tmp0 = tail call %struct.__neon_int2x32x2_t @llvm.arm.neon.vld2lane.v2i32(i32* %A, <2 x i32> undef, <2 x i32> undef, i32 0, i32 16) 64 %tmp1 = extractvalue %struct.__neon_int2x32x2_t %tmp0, 0 65 %tmp2 = shufflevector <2 x i32> %tmp1, <2 x i32> undef, <2 x i32> zeroinitializer 66 %tmp3 = extractvalue %struct.__neon_int2x32x2_t %tmp0, 1 67 %tmp4 = shufflevector <2 x i32> %tmp3, <2 x i32> undef, <2 x i32> zeroinitializer 68 %tmp5 = add <2 x i32> %tmp2, %tmp4 69 ret <2 x i32> %tmp5 70} 71 72declare %struct.__neon_int8x8x2_t @llvm.arm.neon.vld2lane.v8i8(i8*, <8 x i8>, <8 x i8>, i32, i32) nounwind readonly 73declare %struct.__neon_int2x32x2_t @llvm.arm.neon.vld2lane.v2i32(i32*, <2 x i32>, <2 x i32>, i32, i32) nounwind readonly 74