xref: /llvm-project/llvm/test/CodeGen/ARM/special-reg.ll (revision 85fd06d389c592bcc9aabaa9b47ec621a8128cee)
1*85fd06d3SLuke Cheeseman; RUN: llc < %s -mtriple=arm-none-eabi -mcpu=cortex-a8 2>&1 | FileCheck %s --check-prefix=ARM --check-prefix=ACORE
2*85fd06d3SLuke Cheeseman; RUN: llc < %s -mtriple=thumb-none-eabi -mcpu=cortex-m4 2>&1 | FileCheck %s --check-prefix=ARM --check-prefix=MCORE
3*85fd06d3SLuke Cheeseman
4*85fd06d3SLuke Cheesemandefine i32 @read_i32_encoded_register() nounwind {
5*85fd06d3SLuke Cheesemanentry:
6*85fd06d3SLuke Cheeseman; ARM-LABEL: read_i32_encoded_register:
7*85fd06d3SLuke Cheeseman; ARM: mrc p1, #2, r0, c3, c4, #5
8*85fd06d3SLuke Cheeseman  %reg = call i32 @llvm.read_register.i32(metadata !0)
9*85fd06d3SLuke Cheeseman  ret i32 %reg
10*85fd06d3SLuke Cheeseman}
11*85fd06d3SLuke Cheeseman
12*85fd06d3SLuke Cheesemandefine i64 @read_i64_encoded_register() nounwind {
13*85fd06d3SLuke Cheesemanentry:
14*85fd06d3SLuke Cheeseman; ARM-LABEL: read_i64_encoded_register:
15*85fd06d3SLuke Cheeseman; ARM: mrrc p1, #2, r0, r1, c3
16*85fd06d3SLuke Cheeseman  %reg = call i64 @llvm.read_register.i64(metadata !1)
17*85fd06d3SLuke Cheeseman  ret i64 %reg
18*85fd06d3SLuke Cheeseman}
19*85fd06d3SLuke Cheeseman
20*85fd06d3SLuke Cheesemandefine i32 @read_apsr() nounwind {
21*85fd06d3SLuke Cheesemanentry:
22*85fd06d3SLuke Cheeseman; ARM-LABEL: read_apsr:
23*85fd06d3SLuke Cheeseman; ARM: mrs r0, apsr
24*85fd06d3SLuke Cheeseman  %reg = call i32 @llvm.read_register.i32(metadata !2)
25*85fd06d3SLuke Cheeseman  ret i32 %reg
26*85fd06d3SLuke Cheeseman}
27*85fd06d3SLuke Cheeseman
28*85fd06d3SLuke Cheesemandefine i32 @read_fpscr() nounwind {
29*85fd06d3SLuke Cheesemanentry:
30*85fd06d3SLuke Cheeseman; ARM-LABEL: read_fpscr:
31*85fd06d3SLuke Cheeseman; ARM: vmrs r0, fpscr
32*85fd06d3SLuke Cheeseman  %reg = call i32 @llvm.read_register.i32(metadata !3)
33*85fd06d3SLuke Cheeseman  ret i32 %reg
34*85fd06d3SLuke Cheeseman}
35*85fd06d3SLuke Cheeseman
36*85fd06d3SLuke Cheesemandefine void @write_i32_encoded_register(i32 %x) nounwind {
37*85fd06d3SLuke Cheesemanentry:
38*85fd06d3SLuke Cheeseman; ARM-LABEL: write_i32_encoded_register:
39*85fd06d3SLuke Cheeseman; ARM: mcr p1, #2, r0, c3, c4, #5
40*85fd06d3SLuke Cheeseman  call void @llvm.write_register.i32(metadata !0, i32 %x)
41*85fd06d3SLuke Cheeseman  ret void
42*85fd06d3SLuke Cheeseman}
43*85fd06d3SLuke Cheeseman
44*85fd06d3SLuke Cheesemandefine void @write_i64_encoded_register(i64 %x) nounwind {
45*85fd06d3SLuke Cheesemanentry:
46*85fd06d3SLuke Cheeseman; ARM-LABEL: write_i64_encoded_register:
47*85fd06d3SLuke Cheeseman; ARM: mcrr p1, #2, r0, r1, c3
48*85fd06d3SLuke Cheeseman  call void @llvm.write_register.i64(metadata !1, i64 %x)
49*85fd06d3SLuke Cheeseman  ret void
50*85fd06d3SLuke Cheeseman}
51*85fd06d3SLuke Cheeseman
52*85fd06d3SLuke Cheesemandefine void @write_apsr(i32 %x) nounwind {
53*85fd06d3SLuke Cheesemanentry:
54*85fd06d3SLuke Cheeseman; ARM-LABEL: write_apsr:
55*85fd06d3SLuke Cheeseman; ACORE: msr APSR_nzcvq, r0
56*85fd06d3SLuke Cheeseman; MCORE: msr apsr_nzcvq, r0
57*85fd06d3SLuke Cheeseman  call void @llvm.write_register.i32(metadata !4, i32 %x)
58*85fd06d3SLuke Cheeseman  ret void
59*85fd06d3SLuke Cheeseman}
60*85fd06d3SLuke Cheeseman
61*85fd06d3SLuke Cheesemandefine void @write_fpscr(i32 %x) nounwind {
62*85fd06d3SLuke Cheesemanentry:
63*85fd06d3SLuke Cheeseman; ARM-LABEL: write_fpscr:
64*85fd06d3SLuke Cheeseman; ARM: vmsr fpscr, r0
65*85fd06d3SLuke Cheeseman  call void @llvm.write_register.i32(metadata !3, i32 %x)
66*85fd06d3SLuke Cheeseman  ret void
67*85fd06d3SLuke Cheeseman}
68*85fd06d3SLuke Cheeseman
69*85fd06d3SLuke Cheesemandeclare i32 @llvm.read_register.i32(metadata) nounwind
70*85fd06d3SLuke Cheesemandeclare i64 @llvm.read_register.i64(metadata) nounwind
71*85fd06d3SLuke Cheesemandeclare void @llvm.write_register.i32(metadata, i32) nounwind
72*85fd06d3SLuke Cheesemandeclare void @llvm.write_register.i64(metadata, i64) nounwind
73*85fd06d3SLuke Cheeseman
74*85fd06d3SLuke Cheeseman!0 = !{!"cp1:2:c3:c4:5"}
75*85fd06d3SLuke Cheeseman!1 = !{!"cp1:2:c3"}
76*85fd06d3SLuke Cheeseman!2 = !{!"apsr"}
77*85fd06d3SLuke Cheeseman!3 = !{!"fpscr"}
78*85fd06d3SLuke Cheeseman!4 = !{!"apsr_nzcvq"}
79