1; RUN: llc < %s -march=arm | FileCheck %s --check-prefix=ARM 2; RUN: llc < %s -march=arm -mcpu=arm1156t2-s -mattr=+thumb2 | \ 3; RUN: FileCheck %s --check-prefix=ARMT2 4; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | \ 5; RUN: FileCheck %s --check-prefix=THUMB2 6 7define i32 @t1(i32 %c) nounwind readnone { 8entry: 9; ARM-LABEL: t1: 10; ARM: mov [[R1:r[0-9]+]], #101 11; ARM: orr [[R1b:r[0-9]+]], [[R1]], #256 12; ARM: movgt {{r[0-1]}}, #123 13 14; ARMT2-LABEL: t1: 15; ARMT2: movw [[R:r[0-1]]], #357 16; ARMT2: movwgt [[R]], #123 17 18; THUMB2-LABEL: t1: 19; THUMB2: movw [[R:r[0-1]]], #357 20; THUMB2: movgt [[R]], #123 21 22 %0 = icmp sgt i32 %c, 1 23 %1 = select i1 %0, i32 123, i32 357 24 ret i32 %1 25} 26 27define i32 @t2(i32 %c) nounwind readnone { 28entry: 29; ARM-LABEL: t2: 30; ARM: mov [[R:r[0-9]+]], #101 31; ARM: orr [[R]], [[R]], #256 32; ARM: movle [[R]], #123 33 34; ARMT2-LABEL: t2: 35; ARMT2: mov [[R:r[0-1]]], #123 36; ARMT2: movwgt [[R]], #357 37 38; THUMB2-LABEL: t2: 39; THUMB2: mov{{(s|\.w)}} [[R:r[0-1]]], #123 40; THUMB2: movwgt [[R]], #357 41 42 %0 = icmp sgt i32 %c, 1 43 %1 = select i1 %0, i32 357, i32 123 44 ret i32 %1 45} 46 47define i32 @t3(i32 %a) nounwind readnone { 48entry: 49; ARM-LABEL: t3: 50; ARM: mov [[R:r[0-1]]], #0 51; ARM: moveq [[R]], #1 52 53; ARMT2-LABEL: t3: 54; ARMT2: mov [[R:r[0-1]]], #0 55; ARMT2: movweq [[R]], #1 56 57; THUMB2-LABEL: t3: 58; THUMB2: mov{{(s|\.w)}} [[R:r[0-1]]], #0 59; THUMB2: moveq [[R]], #1 60 %0 = icmp eq i32 %a, 160 61 %1 = zext i1 %0 to i32 62 ret i32 %1 63} 64 65define i32 @t4(i32 %a, i32 %b, i32 %x) nounwind { 66entry: 67; ARM-LABEL: t4: 68; ARM: ldr 69; ARM: mov{{lt|ge}} 70 71; ARMT2-LABEL: t4: 72; ARMT2: movwlt [[R0:r[0-9]+]], #65365 73; ARMT2: movtlt [[R0]], #65365 74 75; THUMB2-LABEL: t4: 76; THUMB2: mvnlt [[R0:r[0-9]+]], #11141290 77 %0 = icmp slt i32 %a, %b 78 %1 = select i1 %0, i32 4283826005, i32 %x 79 ret i32 %1 80} 81 82; rdar://9758317 83define i32 @t5(i32 %a) nounwind { 84entry: 85; ARM-LABEL: t5: 86; ARM-NOT: mov 87; ARM: cmp r0, #1 88; ARM-NOT: mov 89; ARM: movne r0, #0 90 91; THUMB2-LABEL: t5: 92; THUMB2-NOT: mov 93; THUMB2: cmp r0, #1 94; THUMB2: it ne 95; THUMB2: movne r0, #0 96 %cmp = icmp eq i32 %a, 1 97 %conv = zext i1 %cmp to i32 98 ret i32 %conv 99} 100 101define i32 @t6(i32 %a) nounwind { 102entry: 103; ARM-LABEL: t6: 104; ARM-NOT: mov 105; ARM: cmp r0, #0 106; ARM: movne r0, #1 107 108; THUMB2-LABEL: t6: 109; THUMB2-NOT: mov 110; THUMB2: cmp r0, #0 111; THUMB2: it ne 112; THUMB2: movne r0, #1 113 %tobool = icmp ne i32 %a, 0 114 %lnot.ext = zext i1 %tobool to i32 115 ret i32 %lnot.ext 116} 117