xref: /llvm-project/llvm/test/CodeGen/ARM/prefetch.ll (revision 8740ee36379d7dd74c17ae9566f7181d53b166be) 
1; RUN: llc < %s -march=thumb -mattr=-thumb2 | not grep pld
2; RUN: llc < %s -march=thumb -mattr=+v7a,+mp | FileCheck %s -check-prefix=THUMB2
3; RUN: llc < %s -march=arm   -mattr=+v7a,+mp | FileCheck %s -check-prefix=ARM
4; rdar://8601536
5
6define void @t1(i8* %ptr) nounwind  {
7entry:
8; ARM: t1:
9; ARM: pli [r0]
10; ARM: pldw [r0]
11; ARM: pld [r0]
12
13; THUMB2: t1:
14; THUMB2: pli [r0]
15; THUMB2: pldw [r0]
16; THUMB2: pld [r0]
17  tail call void @llvm.prefetch( i8* %ptr, i32 0, i32 1 )
18  tail call void @llvm.prefetch( i8* %ptr, i32 0, i32 2 )
19  tail call void @llvm.prefetch( i8* %ptr, i32 0, i32 3 )
20  ret void
21}
22
23define void @t2(i8* %ptr) nounwind  {
24entry:
25; ARM: t2:
26; ARM: pld [r0, #1023]
27
28; THUMB2: t2:
29; THUMB2: pld [r0, #1023]
30  %tmp = getelementptr i8* %ptr, i32 1023
31  tail call void @llvm.prefetch( i8* %tmp, i32 0, i32 3 )
32  ret void
33}
34
35define void @t3(i32 %base, i32 %offset) nounwind  {
36entry:
37; ARM: t3:
38; ARM: pld [r0, r1, lsr #2]
39
40; THUMB2: t3:
41; THUMB2: lsrs r1, r1, #2
42; THUMB2: pld [r0, r1]
43  %tmp1 = lshr i32 %offset, 2
44  %tmp2 = add i32 %base, %tmp1
45  %tmp3 = inttoptr i32 %tmp2 to i8*
46  tail call void @llvm.prefetch( i8* %tmp3, i32 0, i32 3 )
47  ret void
48}
49
50define void @t4(i32 %base, i32 %offset) nounwind  {
51entry:
52; ARM: t4:
53; ARM: pld [r0, r1, lsl #2]
54
55; THUMB2: t4:
56; THUMB2: pld [r0, r1, lsl #2]
57  %tmp1 = shl i32 %offset, 2
58  %tmp2 = add i32 %base, %tmp1
59  %tmp3 = inttoptr i32 %tmp2 to i8*
60  tail call void @llvm.prefetch( i8* %tmp3, i32 0, i32 3 )
61  ret void
62}
63
64declare void @llvm.prefetch(i8*, i32, i32) nounwind
65