xref: /llvm-project/llvm/test/CodeGen/ARM/prefetch.ll (revision 21acf9fb38d2fcf60ab3b935c83e8f08eb177432) 
1; RUN: llc < %s -march=thumb -mattr=-thumb2 | not grep pld
2; RUN: llc < %s -march=thumb -mattr=+v7a     | FileCheck %s -check-prefix=THUMB2
3; RUN: llc < %s -march=arm   -mattr=+v7a,+mp | FileCheck %s -check-prefix=ARM-MP
4; rdar://8601536
5
6define void @t1(i8* %ptr) nounwind  {
7entry:
8; ARM-MP: t1:
9; ARM-MP: pldw [r0]
10; ARM-MP: pld [r0]
11
12; THUMB2: t1:
13; THUMB2-NOT: pldw [r0]
14; THUMB2: pld [r0]
15  tail call void @llvm.prefetch( i8* %ptr, i32 1, i32 3 )
16  tail call void @llvm.prefetch( i8* %ptr, i32 0, i32 3 )
17  ret void
18}
19
20define void @t2(i8* %ptr) nounwind  {
21entry:
22; ARM-MP: t2:
23; ARM-MP: pld [r0, #1023]
24
25; THUMB2: t2:
26; THUMB2: pld [r0, #1023]
27  %tmp = getelementptr i8* %ptr, i32 1023
28  tail call void @llvm.prefetch( i8* %tmp, i32 0, i32 3 )
29  ret void
30}
31
32define void @t3(i32 %base, i32 %offset) nounwind  {
33entry:
34; ARM-MP: t3:
35; ARM-MP: pld [r0, r1, lsr #2]
36
37; THUMB2: t3:
38; THUMB2: lsrs r1, r1, #2
39; THUMB2: pld [r0, r1]
40  %tmp1 = lshr i32 %offset, 2
41  %tmp2 = add i32 %base, %tmp1
42  %tmp3 = inttoptr i32 %tmp2 to i8*
43  tail call void @llvm.prefetch( i8* %tmp3, i32 0, i32 3 )
44  ret void
45}
46
47define void @t4(i32 %base, i32 %offset) nounwind  {
48entry:
49; ARM-MP: t4:
50; ARM-MP: pld [r0, r1, lsl #2]
51
52; THUMB2: t4:
53; THUMB2: pld [r0, r1, lsl #2]
54  %tmp1 = shl i32 %offset, 2
55  %tmp2 = add i32 %base, %tmp1
56  %tmp3 = inttoptr i32 %tmp2 to i8*
57  tail call void @llvm.prefetch( i8* %tmp3, i32 0, i32 3 )
58  ret void
59}
60
61declare void @llvm.prefetch(i8*, i32, i32) nounwind
62