xref: /llvm-project/llvm/test/CodeGen/ARM/none-macho-v4t.ll (revision 300d8ffdf2b07c77a6ffb30fe9b347f430d09df5)
1d4d294ddSTim Northover; RUN: llc -mtriple=thumb-none-macho -mcpu=arm7tdmi %s -o - | FileCheck %s
2d4d294ddSTim Northover; RUN: llc -mtriple=thumb-none-macho -mcpu=arm7tdmi %s -filetype=obj -o /dev/null
3d4d294ddSTim Northover
4d4d294ddSTim Northoverdeclare void @callee()
5d4d294ddSTim Northover
6d4d294ddSTim Northoverdefine void @test_call() {
7d4d294ddSTim Northover  ; BX can only take a register before v5t came along, so we must materialise
8d4d294ddSTim Northover  ; the address properly.
9d4d294ddSTim Northover; CHECK-LABEL: test_call:
10d4d294ddSTim Northover; CHECK: ldr r[[CALLEE_STUB:[0-9]+]], [[LITPOOL:LCPI[0-9]+_[0-9]+]]
11d4d294ddSTim Northover; CHECK: [[PC_LABEL:LPC[0-9]+_[0-9]+]]:
12d4d294ddSTim Northover; CHECK-NEXT: add r[[CALLEE_STUB]], pc
13d4d294ddSTim Northover; CHECK: ldr [[CALLEE:r[0-9]+]], [r[[CALLEE_STUB]]]
14*300d8ffdSJonathan Roelofs; CHECK-NOT: mov lr, pc
15*300d8ffdSJonathan Roelofs; CHECK: bl [[INDIRECT_PAD:Ltmp[0-9]+]]
16d4d294ddSTim Northover
17d4d294ddSTim Northover; CHECK: [[LITPOOL]]:
18d4d294ddSTim Northover; CHECK-NEXT: .long L_callee$non_lazy_ptr-([[PC_LABEL]]+4)
19*300d8ffdSJonathan Roelofs
20*300d8ffdSJonathan Roelofs; CHECK: [[INDIRECT_PAD]]:
21*300d8ffdSJonathan Roelofs; CHECK: bx [[CALLEE]]
22*300d8ffdSJonathan Roelofs
23d4d294ddSTim Northover  call void @callee()
24d4d294ddSTim Northover  ret void
25d4d294ddSTim Northover}
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