1; RUN: llc -o - %s | FileCheck %s 2; Make sure we do not try to compute liveness for FPSCR which in this case 3; is read before being written to (this is fine because becase FPSCR is 4; reserved). 5target triple = "thumbv7s-apple-ios" 6 7%struct.wibble = type { double } 8 9@global = common global i32 0, align 4 10@global.1 = common global i32 0, align 4 11 12; CHECK-LABEL: eggs: 13; CHECK: sub sp, #8 14; VMRS instruction comes before any other instruction writing FPSCR: 15; CHECK-NOT: vcmp 16; CHECK: vmrs {{r[0-9]}}, fpscr 17; CHECK: vcmp 18; ... 19; CHECK: add sp, #8 20; CHECK: bx lr 21define i32 @eggs(ptr nocapture readnone %arg) { 22bb: 23 %tmp = alloca %struct.wibble, align 4 24 %tmp2 = tail call i32 @llvm.get.rounding() 25 %tmp3 = ptrtoint ptr %tmp to i32 26 %tmp4 = sitofp i32 %tmp3 to double 27 %tmp5 = fmul double %tmp4, 0x0123456789ABCDEF 28 %tmp6 = fptosi double %tmp5 to i32 29 %tmp7 = fcmp une double %tmp5, 0.000000e+00 30 %tmp8 = sitofp i32 %tmp6 to double 31 %tmp9 = fcmp une double %tmp5, %tmp8 32 %tmp10 = and i1 %tmp7, %tmp9 33 %tmp11 = sext i1 %tmp10 to i32 34 %tmp12 = add nsw i32 %tmp11, %tmp6 35 store i32 %tmp12, ptr @global, align 4 36 %tmp13 = icmp ne i32 %tmp12, 0 37 %tmp14 = icmp ne i32 %tmp2, 0 38 %tmp15 = and i1 %tmp14, %tmp13 39 br i1 %tmp15, label %bb16, label %bb18 40 41bb16: ; preds = %bb 42 %tmp17 = load i32, ptr @global.1, align 4 43 br label %bb18 44 45bb18: ; preds = %bb16, %bb 46 ret i32 undef 47} 48 49declare i32 @llvm.get.rounding() 50declare i32 @zot(...) 51