xref: /llvm-project/llvm/test/CodeGen/ARM/negate-i1.ll (revision 25528d6de70e98683722e28655d8568d5f09b5c7)
18f5bdb9dSSanjay Patel; RUN: llc < %s -mtriple=arm-apple-darwin | FileCheck %s
28f5bdb9dSSanjay Patel
38f5bdb9dSSanjay Patel; PR30660 - https://llvm.org/bugs/show_bug.cgi?id=30660
48f5bdb9dSSanjay Patel
58f5bdb9dSSanjay Pateldefine i32 @select_i32_neg1_or_0(i1 %a) {
68f5bdb9dSSanjay Patel; CHECK-LABEL: select_i32_neg1_or_0:
7*25528d6dSFrancis Visoiu Mistrih; CHECK-NEXT:  @ %bb.0:
83a3aaf67SSanjay Patel; CHECK-NEXT:    and r0, r0, #1
93a3aaf67SSanjay Patel; CHECK-NEXT:    rsb r0, r0, #0
108f5bdb9dSSanjay Patel; CHECK-NEXT:    mov pc, lr
118f5bdb9dSSanjay Patel;
128f5bdb9dSSanjay Patel  %b = sext i1 %a to i32
138f5bdb9dSSanjay Patel  ret i32 %b
148f5bdb9dSSanjay Patel}
158f5bdb9dSSanjay Patel
168f5bdb9dSSanjay Pateldefine i32 @select_i32_neg1_or_0_zeroext(i1 zeroext %a) {
178f5bdb9dSSanjay Patel; CHECK-LABEL: select_i32_neg1_or_0_zeroext:
18*25528d6dSFrancis Visoiu Mistrih; CHECK-NEXT:  @ %bb.0:
193a3aaf67SSanjay Patel; CHECK-NEXT:    rsb r0, r0, #0
208f5bdb9dSSanjay Patel; CHECK-NEXT:    mov pc, lr
218f5bdb9dSSanjay Patel;
228f5bdb9dSSanjay Patel  %b = sext i1 %a to i32
238f5bdb9dSSanjay Patel  ret i32 %b
248f5bdb9dSSanjay Patel}
258f5bdb9dSSanjay Patel
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