xref: /llvm-project/llvm/test/CodeGen/ARM/mul_const.ll (revision c8054d90fbe7ff386577c27dd51d597924036cde)
1; RUN: llc < %s -march=arm | FileCheck %s
2
3define i32 @t1(i32 %v) nounwind readnone {
4entry:
5; CHECK: t1:
6; CHECK: add r0, r0, r0, lsl #3
7	%0 = mul i32 %v, 9
8	ret i32 %0
9}
10
11define i32 @t2(i32 %v) nounwind readnone {
12entry:
13; CHECK: t2:
14; CHECK: rsb r0, r0, r0, lsl #3
15	%0 = mul i32 %v, 7
16	ret i32 %0
17}
18