xref: /llvm-project/llvm/test/CodeGen/ARM/minsize-imms.ll (revision 55c625f2228584aa79ddadf878737095734211fb)
1*55c625f2STim Northover; RUN: llc -mtriple=thumbv7m-macho -o - -show-mc-encoding %s | FileCheck %s
2*55c625f2STim Northover; RUN: llc -mtriple=thumbv6m-macho -o - -show-mc-encoding %s | FileCheck %s --check-prefix=CHECK-V6M
3*55c625f2STim Northover; RUN: llc -mtriple=armv6-macho -o - -show-mc-encoding %s | FileCheck %s --check-prefix=CHECK-ARM
4*55c625f2STim Northoverdefine i32 @test_mov() minsize {
5*55c625f2STim Northover; CHECK-LABEL: test_mov:
6*55c625f2STim Northover; CHECK: movs r0, #255 @ encoding: [0xff,0x20]
7*55c625f2STim Northover
8*55c625f2STim Northover  ret i32 255
9*55c625f2STim Northover}
10*55c625f2STim Northover
11*55c625f2STim Northoverdefine i32 @test_mov_mvn() minsize {
12*55c625f2STim Northover; CHECK-LABEL: test_mov_mvn:
13*55c625f2STim Northover; CHECK: mvn r0, #203 @ encoding: [0x6f,0xf0,0xcb,0x00]
14*55c625f2STim Northover
15*55c625f2STim Northover; CHECK-V6M-LABEL: test_mov_mvn:
16*55c625f2STim Northover; CHECK-V6M: movs [[TMP:r[0-7]]], #203 @ encoding: [0xcb,0x20]
17*55c625f2STim Northover; CHECK-V6M: mvns r0, [[TMP]] @ encoding: [0xc0,0x43]
18*55c625f2STim Northover
19*55c625f2STim Northover; CHECK-ARM-LABEL: test_mov_mvn:
20*55c625f2STim Northover; CHECK-ARM: mvn r0, #203 @ encoding: [0xcb,0x00,0xe0,0xe3]
21*55c625f2STim Northover  ret i32 4294967092
22*55c625f2STim Northover}
23*55c625f2STim Northover
24*55c625f2STim Northoverdefine i32 @test_mov_lsl() minsize {
25*55c625f2STim Northover; CHECK-LABEL: test_mov_lsl:
26*55c625f2STim Northover; CHECK: mov.w r0, #589824 @ encoding: [0x4f,0xf4,0x10,0x20]
27*55c625f2STim Northover
28*55c625f2STim Northover; CHECK-V6M-LABEL: test_mov_lsl:
29*55c625f2STim Northover; CHECK-V6M: movs [[TMP:r[0-7]]], #9 @ encoding: [0x09,0x20]
30*55c625f2STim Northover; CHECK-V6M: lsls r0, [[TMP]], #16 @ encoding: [0x00,0x04]
31*55c625f2STim Northover
32*55c625f2STim Northover; CHECK-ARM-LABEL: test_mov_lsl:
33*55c625f2STim Northover; CHECK-ARM: mov r0, #589824 @ encoding: [0x09,0x08,0xa0,0xe3]
34*55c625f2STim Northover  ret i32 589824
35*55c625f2STim Northover}
36*55c625f2STim Northover
37*55c625f2STim Northoverdefine i32 @test_movw() minsize {
38*55c625f2STim Northover; CHECK-LABEL: test_movw:
39*55c625f2STim Northover; CHECK: movw r0, #65535
40*55c625f2STim Northover
41*55c625f2STim Northover; CHECK-V6M-LABEL: test_movw:
42*55c625f2STim Northover; CHECK-V6M: ldr r0, [[CONSTPOOL:LCPI[0-9]+_[0-9]+]] @ encoding: [A,0x48]
43*55c625f2STim Northover; CHECK-V6M: [[CONSTPOOL]]:
44*55c625f2STim Northover; CHECK-V6M-NEXT: .long 65535
45*55c625f2STim Northover
46*55c625f2STim Northover; CHECK-ARM-LABEL: test_movw:
47*55c625f2STim Northover; CHECK-ARM: mov r0, #255 @ encoding: [0xff,0x00,0xa0,0xe3]
48*55c625f2STim Northover; CHECK-ARM: orr r0, r0, #65280 @ encoding: [0xff,0x0c,0x80,0xe3]
49*55c625f2STim Northover ret i32 65535
50*55c625f2STim Northover}
51*55c625f2STim Northover
52*55c625f2STim Northoverdefine i32 @test_regress1() {
53*55c625f2STim Northover; CHECK-ARM-LABEL: test_regress1:
54*55c625f2STim Northover; CHECK-ARM: mov r0, #248 @ encoding: [0xf8,0x00,0xa0,0xe3]
55*55c625f2STim Northover; CHECK-ARM: orr r0, r0, #16252928 @ encoding: [0x3e,0x07,0x80,0xe3]
56*55c625f2STim Northover  ret i32 16253176
57*55c625f2STim Northover}
58