xref: /llvm-project/llvm/test/CodeGen/ARM/minnum-maxnum-intrinsics.ll (revision a7de5c82bbbcd534d3a11e719eea513e3435752b) 
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=armv7 -mattr=+neon %s -o - | FileCheck %s --check-prefix=ARMV7
3; RUN: llc -mtriple=armv8.2-a -mattr=+fp-armv8 %s -o - | FileCheck %s --check-prefix=ARMV8
4; RUN: llc -mtriple=armv8.1m-none-none-eabi -mattr=+mve.fp,+fp64 %s -o - | FileCheck %s --check-prefix=ARMV8M
5
6declare float @llvm.minnum.f32(float, float)
7declare float @llvm.maxnum.f32(float, float)
8declare double @llvm.minnum.f64(double, double)
9declare double @llvm.maxnum.f64(double, double)
10declare <4 x float> @llvm.minnum.v4f32(<4 x float>, <4 x float>)
11declare <4 x float> @llvm.maxnum.v4f32(<4 x float>, <4 x float>)
12declare <2 x double> @llvm.minnum.v2f64(<2 x double>, <2 x double>)
13declare <2 x double> @llvm.maxnum.v2f64(<2 x double>, <2 x double>)
14
15define float @fminnum32_intrinsic(float %x, float %y) {
16; ARMV7-LABEL: fminnum32_intrinsic:
17; ARMV7:       @ %bb.0:
18; ARMV7-NEXT:    vmov s0, r0
19; ARMV7-NEXT:    vmov s2, r1
20; ARMV7-NEXT:    vcmp.f32 s0, s2
21; ARMV7-NEXT:    vmrs APSR_nzcv, fpscr
22; ARMV7-NEXT:    vmovlt.f32 s2, s0
23; ARMV7-NEXT:    vmov r0, s2
24; ARMV7-NEXT:    bx lr
25;
26; ARMV8-LABEL: fminnum32_intrinsic:
27; ARMV8:       @ %bb.0:
28; ARMV8-NEXT:    vmov s0, r1
29; ARMV8-NEXT:    vmov s2, r0
30; ARMV8-NEXT:    vminnm.f32 s0, s2, s0
31; ARMV8-NEXT:    vmov r0, s0
32; ARMV8-NEXT:    mov pc, lr
33;
34; ARMV8M-LABEL: fminnum32_intrinsic:
35; ARMV8M:       @ %bb.0:
36; ARMV8M-NEXT:    vmov s0, r1
37; ARMV8M-NEXT:    vmov s2, r0
38; ARMV8M-NEXT:    vminnm.f32 s0, s2, s0
39; ARMV8M-NEXT:    vmov r0, s0
40; ARMV8M-NEXT:    bx lr
41  %a = call nnan float @llvm.minnum.f32(float %x, float %y)
42  ret float %a
43}
44
45define float @fminnum32_nsz_intrinsic(float %x, float %y) {
46; ARMV7-LABEL: fminnum32_nsz_intrinsic:
47; ARMV7:       @ %bb.0:
48; ARMV7-NEXT:    vmov s0, r0
49; ARMV7-NEXT:    vmov s2, r1
50; ARMV7-NEXT:    vcmp.f32 s0, s2
51; ARMV7-NEXT:    vmrs APSR_nzcv, fpscr
52; ARMV7-NEXT:    vmovlt.f32 s2, s0
53; ARMV7-NEXT:    vmov r0, s2
54; ARMV7-NEXT:    bx lr
55;
56; ARMV8-LABEL: fminnum32_nsz_intrinsic:
57; ARMV8:       @ %bb.0:
58; ARMV8-NEXT:    vmov s0, r1
59; ARMV8-NEXT:    vmov s2, r0
60; ARMV8-NEXT:    vminnm.f32 s0, s2, s0
61; ARMV8-NEXT:    vmov r0, s0
62; ARMV8-NEXT:    mov pc, lr
63;
64; ARMV8M-LABEL: fminnum32_nsz_intrinsic:
65; ARMV8M:       @ %bb.0:
66; ARMV8M-NEXT:    vmov s0, r1
67; ARMV8M-NEXT:    vmov s2, r0
68; ARMV8M-NEXT:    vminnm.f32 s0, s2, s0
69; ARMV8M-NEXT:    vmov r0, s0
70; ARMV8M-NEXT:    bx lr
71  %a = call nnan nsz float @llvm.minnum.f32(float %x, float %y)
72  ret float %a
73}
74
75define float @fminnum32_non_zero_intrinsic(float %x) {
76; ARMV7-LABEL: fminnum32_non_zero_intrinsic:
77; ARMV7:       @ %bb.0:
78; ARMV7-NEXT:    vmov.f32 s0, #-1.000000e+00
79; ARMV7-NEXT:    vmov s2, r0
80; ARMV7-NEXT:    vcmp.f32 s2, s0
81; ARMV7-NEXT:    vmrs APSR_nzcv, fpscr
82; ARMV7-NEXT:    vmovlt.f32 s0, s2
83; ARMV7-NEXT:    vmov r0, s0
84; ARMV7-NEXT:    bx lr
85;
86; ARMV8-LABEL: fminnum32_non_zero_intrinsic:
87; ARMV8:       @ %bb.0:
88; ARMV8-NEXT:    vmov.f32 s0, #-1.000000e+00
89; ARMV8-NEXT:    vmov s2, r0
90; ARMV8-NEXT:    vminnm.f32 s0, s2, s0
91; ARMV8-NEXT:    vmov r0, s0
92; ARMV8-NEXT:    mov pc, lr
93;
94; ARMV8M-LABEL: fminnum32_non_zero_intrinsic:
95; ARMV8M:       @ %bb.0:
96; ARMV8M-NEXT:    vmov.f32 s0, #-1.000000e+00
97; ARMV8M-NEXT:    vmov s2, r0
98; ARMV8M-NEXT:    vminnm.f32 s0, s2, s0
99; ARMV8M-NEXT:    vmov r0, s0
100; ARMV8M-NEXT:    bx lr
101  %a = call nnan float @llvm.minnum.f32(float %x, float -1.0)
102  ret float %a
103}
104
105define float @fmaxnum32_intrinsic(float %x, float %y) {
106; ARMV7-LABEL: fmaxnum32_intrinsic:
107; ARMV7:       @ %bb.0:
108; ARMV7-NEXT:    vmov s0, r0
109; ARMV7-NEXT:    vmov s2, r1
110; ARMV7-NEXT:    vcmp.f32 s0, s2
111; ARMV7-NEXT:    vmrs APSR_nzcv, fpscr
112; ARMV7-NEXT:    vmovgt.f32 s2, s0
113; ARMV7-NEXT:    vmov r0, s2
114; ARMV7-NEXT:    bx lr
115;
116; ARMV8-LABEL: fmaxnum32_intrinsic:
117; ARMV8:       @ %bb.0:
118; ARMV8-NEXT:    vmov s0, r1
119; ARMV8-NEXT:    vmov s2, r0
120; ARMV8-NEXT:    vmaxnm.f32 s0, s2, s0
121; ARMV8-NEXT:    vmov r0, s0
122; ARMV8-NEXT:    mov pc, lr
123;
124; ARMV8M-LABEL: fmaxnum32_intrinsic:
125; ARMV8M:       @ %bb.0:
126; ARMV8M-NEXT:    vmov s0, r1
127; ARMV8M-NEXT:    vmov s2, r0
128; ARMV8M-NEXT:    vmaxnm.f32 s0, s2, s0
129; ARMV8M-NEXT:    vmov r0, s0
130; ARMV8M-NEXT:    bx lr
131  %a = call nnan float @llvm.maxnum.f32(float %x, float %y)
132  ret float %a
133}
134
135define float @fmaxnum32_nsz_intrinsic(float %x, float %y) {
136; ARMV7-LABEL: fmaxnum32_nsz_intrinsic:
137; ARMV7:       @ %bb.0:
138; ARMV7-NEXT:    vmov s0, r0
139; ARMV7-NEXT:    vmov s2, r1
140; ARMV7-NEXT:    vcmp.f32 s0, s2
141; ARMV7-NEXT:    vmrs APSR_nzcv, fpscr
142; ARMV7-NEXT:    vmovgt.f32 s2, s0
143; ARMV7-NEXT:    vmov r0, s2
144; ARMV7-NEXT:    bx lr
145;
146; ARMV8-LABEL: fmaxnum32_nsz_intrinsic:
147; ARMV8:       @ %bb.0:
148; ARMV8-NEXT:    vmov s0, r1
149; ARMV8-NEXT:    vmov s2, r0
150; ARMV8-NEXT:    vmaxnm.f32 s0, s2, s0
151; ARMV8-NEXT:    vmov r0, s0
152; ARMV8-NEXT:    mov pc, lr
153;
154; ARMV8M-LABEL: fmaxnum32_nsz_intrinsic:
155; ARMV8M:       @ %bb.0:
156; ARMV8M-NEXT:    vmov s0, r1
157; ARMV8M-NEXT:    vmov s2, r0
158; ARMV8M-NEXT:    vmaxnm.f32 s0, s2, s0
159; ARMV8M-NEXT:    vmov r0, s0
160; ARMV8M-NEXT:    bx lr
161  %a = call nnan nsz float @llvm.maxnum.f32(float %x, float %y)
162  ret float %a
163}
164
165define float @fmaxnum32_zero_intrinsic(float %x) {
166; ARMV7-LABEL: fmaxnum32_zero_intrinsic:
167; ARMV7:       @ %bb.0:
168; ARMV7-NEXT:    vmov s2, r0
169; ARMV7-NEXT:    vldr s0, .LCPI5_0
170; ARMV7-NEXT:    vcmp.f32 s2, #0
171; ARMV7-NEXT:    vmrs APSR_nzcv, fpscr
172; ARMV7-NEXT:    vmovgt.f32 s0, s2
173; ARMV7-NEXT:    vmov r0, s0
174; ARMV7-NEXT:    bx lr
175; ARMV7-NEXT:    .p2align 2
176; ARMV7-NEXT:  @ %bb.1:
177; ARMV7-NEXT:  .LCPI5_0:
178; ARMV7-NEXT:    .long 0x00000000 @ float 0
179;
180; ARMV8-LABEL: fmaxnum32_zero_intrinsic:
181; ARMV8:       @ %bb.0:
182; ARMV8-NEXT:    vldr s0, .LCPI5_0
183; ARMV8-NEXT:    vmov s2, r0
184; ARMV8-NEXT:    vmaxnm.f32 s0, s2, s0
185; ARMV8-NEXT:    vmov r0, s0
186; ARMV8-NEXT:    mov pc, lr
187; ARMV8-NEXT:    .p2align 2
188; ARMV8-NEXT:  @ %bb.1:
189; ARMV8-NEXT:  .LCPI5_0:
190; ARMV8-NEXT:    .long 0x00000000 @ float 0
191;
192; ARMV8M-LABEL: fmaxnum32_zero_intrinsic:
193; ARMV8M:       @ %bb.0:
194; ARMV8M-NEXT:    vldr s0, .LCPI5_0
195; ARMV8M-NEXT:    vmov s2, r0
196; ARMV8M-NEXT:    vmaxnm.f32 s0, s2, s0
197; ARMV8M-NEXT:    vmov r0, s0
198; ARMV8M-NEXT:    bx lr
199; ARMV8M-NEXT:    .p2align 2
200; ARMV8M-NEXT:  @ %bb.1:
201; ARMV8M-NEXT:  .LCPI5_0:
202; ARMV8M-NEXT:    .long 0x00000000 @ float 0
203  %a = call nnan float @llvm.maxnum.f32(float %x, float 0.0)
204  ret float %a
205}
206
207define float @fmaxnum32_non_zero_intrinsic(float %x) {
208; ARMV7-LABEL: fmaxnum32_non_zero_intrinsic:
209; ARMV7:       @ %bb.0:
210; ARMV7-NEXT:    vmov.f32 s0, #1.000000e+00
211; ARMV7-NEXT:    vmov s2, r0
212; ARMV7-NEXT:    vcmp.f32 s2, s0
213; ARMV7-NEXT:    vmrs APSR_nzcv, fpscr
214; ARMV7-NEXT:    vmovgt.f32 s0, s2
215; ARMV7-NEXT:    vmov r0, s0
216; ARMV7-NEXT:    bx lr
217;
218; ARMV8-LABEL: fmaxnum32_non_zero_intrinsic:
219; ARMV8:       @ %bb.0:
220; ARMV8-NEXT:    vmov.f32 s0, #1.000000e+00
221; ARMV8-NEXT:    vmov s2, r0
222; ARMV8-NEXT:    vmaxnm.f32 s0, s2, s0
223; ARMV8-NEXT:    vmov r0, s0
224; ARMV8-NEXT:    mov pc, lr
225;
226; ARMV8M-LABEL: fmaxnum32_non_zero_intrinsic:
227; ARMV8M:       @ %bb.0:
228; ARMV8M-NEXT:    vmov.f32 s0, #1.000000e+00
229; ARMV8M-NEXT:    vmov s2, r0
230; ARMV8M-NEXT:    vmaxnm.f32 s0, s2, s0
231; ARMV8M-NEXT:    vmov r0, s0
232; ARMV8M-NEXT:    bx lr
233  %a = call nnan float @llvm.maxnum.f32(float %x, float 1.0)
234  ret float %a
235}
236
237define double @fminnum64_intrinsic(double %x, double %y) {
238; ARMV7-LABEL: fminnum64_intrinsic:
239; ARMV7:       @ %bb.0:
240; ARMV7-NEXT:    vmov d16, r2, r3
241; ARMV7-NEXT:    vmov d17, r0, r1
242; ARMV7-NEXT:    vcmp.f64 d17, d16
243; ARMV7-NEXT:    vmrs APSR_nzcv, fpscr
244; ARMV7-NEXT:    vmovlt.f64 d16, d17
245; ARMV7-NEXT:    vmov r0, r1, d16
246; ARMV7-NEXT:    bx lr
247;
248; ARMV8-LABEL: fminnum64_intrinsic:
249; ARMV8:       @ %bb.0:
250; ARMV8-NEXT:    vmov d16, r2, r3
251; ARMV8-NEXT:    vmov d17, r0, r1
252; ARMV8-NEXT:    vminnm.f64 d16, d17, d16
253; ARMV8-NEXT:    vmov r0, r1, d16
254; ARMV8-NEXT:    mov pc, lr
255;
256; ARMV8M-LABEL: fminnum64_intrinsic:
257; ARMV8M:       @ %bb.0:
258; ARMV8M-NEXT:    vmov d0, r2, r3
259; ARMV8M-NEXT:    vmov d1, r0, r1
260; ARMV8M-NEXT:    vminnm.f64 d0, d1, d0
261; ARMV8M-NEXT:    vmov r0, r1, d0
262; ARMV8M-NEXT:    bx lr
263  %a = call nnan double @llvm.minnum.f64(double %x, double %y)
264  ret double %a
265}
266
267define double @fminnum64_nsz_intrinsic(double %x, double %y) {
268; ARMV7-LABEL: fminnum64_nsz_intrinsic:
269; ARMV7:       @ %bb.0:
270; ARMV7-NEXT:    vmov d16, r2, r3
271; ARMV7-NEXT:    vmov d17, r0, r1
272; ARMV7-NEXT:    vcmp.f64 d17, d16
273; ARMV7-NEXT:    vmrs APSR_nzcv, fpscr
274; ARMV7-NEXT:    vmovlt.f64 d16, d17
275; ARMV7-NEXT:    vmov r0, r1, d16
276; ARMV7-NEXT:    bx lr
277;
278; ARMV8-LABEL: fminnum64_nsz_intrinsic:
279; ARMV8:       @ %bb.0:
280; ARMV8-NEXT:    vmov d16, r2, r3
281; ARMV8-NEXT:    vmov d17, r0, r1
282; ARMV8-NEXT:    vminnm.f64 d16, d17, d16
283; ARMV8-NEXT:    vmov r0, r1, d16
284; ARMV8-NEXT:    mov pc, lr
285;
286; ARMV8M-LABEL: fminnum64_nsz_intrinsic:
287; ARMV8M:       @ %bb.0:
288; ARMV8M-NEXT:    vmov d0, r2, r3
289; ARMV8M-NEXT:    vmov d1, r0, r1
290; ARMV8M-NEXT:    vminnm.f64 d0, d1, d0
291; ARMV8M-NEXT:    vmov r0, r1, d0
292; ARMV8M-NEXT:    bx lr
293  %a = call nnan nsz double @llvm.minnum.f64(double %x, double %y)
294  ret double %a
295}
296
297define double @fminnum64_zero_intrinsic(double %x) {
298; ARMV7-LABEL: fminnum64_zero_intrinsic:
299; ARMV7:       @ %bb.0:
300; ARMV7-NEXT:    vldr d16, .LCPI9_0
301; ARMV7-NEXT:    vmov d17, r0, r1
302; ARMV7-NEXT:    vcmp.f64 d17, d16
303; ARMV7-NEXT:    vmrs APSR_nzcv, fpscr
304; ARMV7-NEXT:    vmovlt.f64 d16, d17
305; ARMV7-NEXT:    vmov r0, r1, d16
306; ARMV7-NEXT:    bx lr
307; ARMV7-NEXT:    .p2align 3
308; ARMV7-NEXT:  @ %bb.1:
309; ARMV7-NEXT:  .LCPI9_0:
310; ARMV7-NEXT:    .long 0 @ double -0
311; ARMV7-NEXT:    .long 2147483648
312;
313; ARMV8-LABEL: fminnum64_zero_intrinsic:
314; ARMV8:       @ %bb.0:
315; ARMV8-NEXT:    vldr d16, .LCPI9_0
316; ARMV8-NEXT:    vmov d17, r0, r1
317; ARMV8-NEXT:    vminnm.f64 d16, d17, d16
318; ARMV8-NEXT:    vmov r0, r1, d16
319; ARMV8-NEXT:    mov pc, lr
320; ARMV8-NEXT:    .p2align 3
321; ARMV8-NEXT:  @ %bb.1:
322; ARMV8-NEXT:  .LCPI9_0:
323; ARMV8-NEXT:    .long 0 @ double -0
324; ARMV8-NEXT:    .long 2147483648
325;
326; ARMV8M-LABEL: fminnum64_zero_intrinsic:
327; ARMV8M:       @ %bb.0:
328; ARMV8M-NEXT:    vldr d0, .LCPI9_0
329; ARMV8M-NEXT:    vmov d1, r0, r1
330; ARMV8M-NEXT:    vminnm.f64 d0, d1, d0
331; ARMV8M-NEXT:    vmov r0, r1, d0
332; ARMV8M-NEXT:    bx lr
333; ARMV8M-NEXT:    .p2align 3
334; ARMV8M-NEXT:  @ %bb.1:
335; ARMV8M-NEXT:  .LCPI9_0:
336; ARMV8M-NEXT:    .long 0 @ double -0
337; ARMV8M-NEXT:    .long 2147483648
338  %a = call nnan double @llvm.minnum.f64(double %x, double -0.0)
339  ret double %a
340}
341
342define double @fminnum64_non_zero_intrinsic(double %x) {
343; ARMV7-LABEL: fminnum64_non_zero_intrinsic:
344; ARMV7:       @ %bb.0:
345; ARMV7-NEXT:    vmov.f64 d16, #-1.000000e+00
346; ARMV7-NEXT:    vmov d17, r0, r1
347; ARMV7-NEXT:    vcmp.f64 d17, d16
348; ARMV7-NEXT:    vmrs APSR_nzcv, fpscr
349; ARMV7-NEXT:    vmovlt.f64 d16, d17
350; ARMV7-NEXT:    vmov r0, r1, d16
351; ARMV7-NEXT:    bx lr
352;
353; ARMV8-LABEL: fminnum64_non_zero_intrinsic:
354; ARMV8:       @ %bb.0:
355; ARMV8-NEXT:    vmov.f64 d16, #-1.000000e+00
356; ARMV8-NEXT:    vmov d17, r0, r1
357; ARMV8-NEXT:    vminnm.f64 d16, d17, d16
358; ARMV8-NEXT:    vmov r0, r1, d16
359; ARMV8-NEXT:    mov pc, lr
360;
361; ARMV8M-LABEL: fminnum64_non_zero_intrinsic:
362; ARMV8M:       @ %bb.0:
363; ARMV8M-NEXT:    vmov.f64 d0, #-1.000000e+00
364; ARMV8M-NEXT:    vmov d1, r0, r1
365; ARMV8M-NEXT:    vminnm.f64 d0, d1, d0
366; ARMV8M-NEXT:    vmov r0, r1, d0
367; ARMV8M-NEXT:    bx lr
368  %a = call nnan double @llvm.minnum.f64(double %x, double -1.0)
369  ret double %a
370}
371
372define double@fmaxnum64_intrinsic(double %x, double %y) {
373; ARMV7-LABEL: fmaxnum64_intrinsic:
374; ARMV7:       @ %bb.0:
375; ARMV7-NEXT:    vmov d16, r2, r3
376; ARMV7-NEXT:    vmov d17, r0, r1
377; ARMV7-NEXT:    vcmp.f64 d17, d16
378; ARMV7-NEXT:    vmrs APSR_nzcv, fpscr
379; ARMV7-NEXT:    vmovgt.f64 d16, d17
380; ARMV7-NEXT:    vmov r0, r1, d16
381; ARMV7-NEXT:    bx lr
382;
383; ARMV8-LABEL: fmaxnum64_intrinsic:
384; ARMV8:       @ %bb.0:
385; ARMV8-NEXT:    vmov d16, r2, r3
386; ARMV8-NEXT:    vmov d17, r0, r1
387; ARMV8-NEXT:    vmaxnm.f64 d16, d17, d16
388; ARMV8-NEXT:    vmov r0, r1, d16
389; ARMV8-NEXT:    mov pc, lr
390;
391; ARMV8M-LABEL: fmaxnum64_intrinsic:
392; ARMV8M:       @ %bb.0:
393; ARMV8M-NEXT:    vmov d0, r2, r3
394; ARMV8M-NEXT:    vmov d1, r0, r1
395; ARMV8M-NEXT:    vmaxnm.f64 d0, d1, d0
396; ARMV8M-NEXT:    vmov r0, r1, d0
397; ARMV8M-NEXT:    bx lr
398  %a = call nnan double @llvm.maxnum.f64(double %x, double %y)
399  ret double %a
400}
401
402define double@fmaxnum64_nsz_intrinsic(double %x, double %y) {
403; ARMV7-LABEL: fmaxnum64_nsz_intrinsic:
404; ARMV7:       @ %bb.0:
405; ARMV7-NEXT:    vmov d16, r2, r3
406; ARMV7-NEXT:    vmov d17, r0, r1
407; ARMV7-NEXT:    vcmp.f64 d17, d16
408; ARMV7-NEXT:    vmrs APSR_nzcv, fpscr
409; ARMV7-NEXT:    vmovgt.f64 d16, d17
410; ARMV7-NEXT:    vmov r0, r1, d16
411; ARMV7-NEXT:    bx lr
412;
413; ARMV8-LABEL: fmaxnum64_nsz_intrinsic:
414; ARMV8:       @ %bb.0:
415; ARMV8-NEXT:    vmov d16, r2, r3
416; ARMV8-NEXT:    vmov d17, r0, r1
417; ARMV8-NEXT:    vmaxnm.f64 d16, d17, d16
418; ARMV8-NEXT:    vmov r0, r1, d16
419; ARMV8-NEXT:    mov pc, lr
420;
421; ARMV8M-LABEL: fmaxnum64_nsz_intrinsic:
422; ARMV8M:       @ %bb.0:
423; ARMV8M-NEXT:    vmov d0, r2, r3
424; ARMV8M-NEXT:    vmov d1, r0, r1
425; ARMV8M-NEXT:    vmaxnm.f64 d0, d1, d0
426; ARMV8M-NEXT:    vmov r0, r1, d0
427; ARMV8M-NEXT:    bx lr
428  %a = call nnan nsz double @llvm.maxnum.f64(double %x, double %y)
429  ret double %a
430}
431
432define double @fmaxnum64_zero_intrinsic(double %x) {
433; ARMV7-LABEL: fmaxnum64_zero_intrinsic:
434; ARMV7:       @ %bb.0:
435; ARMV7-NEXT:    vmov d17, r0, r1
436; ARMV7-NEXT:    vcmp.f64 d17, #0
437; ARMV7-NEXT:    vmrs APSR_nzcv, fpscr
438; ARMV7-NEXT:    vmov.i32 d16, #0x0
439; ARMV7-NEXT:    vmovgt.f64 d16, d17
440; ARMV7-NEXT:    vmov r0, r1, d16
441; ARMV7-NEXT:    bx lr
442;
443; ARMV8-LABEL: fmaxnum64_zero_intrinsic:
444; ARMV8:       @ %bb.0:
445; ARMV8-NEXT:    vldr d16, .LCPI13_0
446; ARMV8-NEXT:    vmov d17, r0, r1
447; ARMV8-NEXT:    vmaxnm.f64 d16, d17, d16
448; ARMV8-NEXT:    vmov r0, r1, d16
449; ARMV8-NEXT:    mov pc, lr
450; ARMV8-NEXT:    .p2align 3
451; ARMV8-NEXT:  @ %bb.1:
452; ARMV8-NEXT:  .LCPI13_0:
453; ARMV8-NEXT:    .long 0 @ double 0
454; ARMV8-NEXT:    .long 0
455;
456; ARMV8M-LABEL: fmaxnum64_zero_intrinsic:
457; ARMV8M:       @ %bb.0:
458; ARMV8M-NEXT:    vldr d0, .LCPI13_0
459; ARMV8M-NEXT:    vmov d1, r0, r1
460; ARMV8M-NEXT:    vmaxnm.f64 d0, d1, d0
461; ARMV8M-NEXT:    vmov r0, r1, d0
462; ARMV8M-NEXT:    bx lr
463; ARMV8M-NEXT:    .p2align 3
464; ARMV8M-NEXT:  @ %bb.1:
465; ARMV8M-NEXT:  .LCPI13_0:
466; ARMV8M-NEXT:    .long 0 @ double 0
467; ARMV8M-NEXT:    .long 0
468  %a = call nnan double @llvm.maxnum.f64(double %x, double 0.0)
469  ret double %a
470}
471
472define double @fmaxnum64_non_zero_intrinsic(double %x) {
473; ARMV7-LABEL: fmaxnum64_non_zero_intrinsic:
474; ARMV7:       @ %bb.0:
475; ARMV7-NEXT:    vmov.f64 d16, #1.000000e+00
476; ARMV7-NEXT:    vmov d17, r0, r1
477; ARMV7-NEXT:    vcmp.f64 d17, d16
478; ARMV7-NEXT:    vmrs APSR_nzcv, fpscr
479; ARMV7-NEXT:    vmovgt.f64 d16, d17
480; ARMV7-NEXT:    vmov r0, r1, d16
481; ARMV7-NEXT:    bx lr
482;
483; ARMV8-LABEL: fmaxnum64_non_zero_intrinsic:
484; ARMV8:       @ %bb.0:
485; ARMV8-NEXT:    vmov.f64 d16, #1.000000e+00
486; ARMV8-NEXT:    vmov d17, r0, r1
487; ARMV8-NEXT:    vmaxnm.f64 d16, d17, d16
488; ARMV8-NEXT:    vmov r0, r1, d16
489; ARMV8-NEXT:    mov pc, lr
490;
491; ARMV8M-LABEL: fmaxnum64_non_zero_intrinsic:
492; ARMV8M:       @ %bb.0:
493; ARMV8M-NEXT:    vmov.f64 d0, #1.000000e+00
494; ARMV8M-NEXT:    vmov d1, r0, r1
495; ARMV8M-NEXT:    vmaxnm.f64 d0, d1, d0
496; ARMV8M-NEXT:    vmov r0, r1, d0
497; ARMV8M-NEXT:    bx lr
498  %a = call nnan double @llvm.maxnum.f64(double %x, double 1.0)
499  ret double %a
500}
501
502define <4 x float> @fminnumv432_intrinsic(<4 x float> %x, <4 x float> %y) {
503; ARMV7-LABEL: fminnumv432_intrinsic:
504; ARMV7:       @ %bb.0:
505; ARMV7-NEXT:    vmov d17, r2, r3
506; ARMV7-NEXT:    vmov d16, r0, r1
507; ARMV7-NEXT:    mov r0, sp
508; ARMV7-NEXT:    vld1.64 {d18, d19}, [r0]
509; ARMV7-NEXT:    vmin.f32 q8, q8, q9
510; ARMV7-NEXT:    vmov r0, r1, d16
511; ARMV7-NEXT:    vmov r2, r3, d17
512; ARMV7-NEXT:    bx lr
513;
514; ARMV8-LABEL: fminnumv432_intrinsic:
515; ARMV8:       @ %bb.0:
516; ARMV8-NEXT:    vldr s0, [sp, #4]
517; ARMV8-NEXT:    vmov s12, r1
518; ARMV8-NEXT:    vldr s2, [sp, #8]
519; ARMV8-NEXT:    vmov s10, r2
520; ARMV8-NEXT:    vminnm.f32 s0, s12, s0
521; ARMV8-NEXT:    vldr s4, [sp, #12]
522; ARMV8-NEXT:    vldr s6, [sp]
523; ARMV8-NEXT:    vmov s14, r0
524; ARMV8-NEXT:    vmov r1, s0
525; ARMV8-NEXT:    vminnm.f32 s0, s10, s2
526; ARMV8-NEXT:    vmov s8, r3
527; ARMV8-NEXT:    vminnm.f32 s6, s14, s6
528; ARMV8-NEXT:    vmov r2, s0
529; ARMV8-NEXT:    vminnm.f32 s0, s8, s4
530; ARMV8-NEXT:    vmov r0, s6
531; ARMV8-NEXT:    vmov r3, s0
532; ARMV8-NEXT:    mov pc, lr
533;
534; ARMV8M-LABEL: fminnumv432_intrinsic:
535; ARMV8M:       @ %bb.0:
536; ARMV8M-NEXT:    vmov d0, r0, r1
537; ARMV8M-NEXT:    mov r0, sp
538; ARMV8M-NEXT:    vldrw.u32 q1, [r0]
539; ARMV8M-NEXT:    vmov d1, r2, r3
540; ARMV8M-NEXT:    vminnm.f32 q0, q0, q1
541; ARMV8M-NEXT:    vmov r0, r1, d0
542; ARMV8M-NEXT:    vmov r2, r3, d1
543; ARMV8M-NEXT:    bx lr
544  %a = call nnan <4 x float> @llvm.minnum.v4f32(<4 x float> %x, <4 x float> %y)
545  ret <4 x float> %a
546}
547
548define <4 x float> @fminnumv432_nsz_intrinsic(<4 x float> %x, <4 x float> %y) {
549; ARMV7-LABEL: fminnumv432_nsz_intrinsic:
550; ARMV7:       @ %bb.0:
551; ARMV7-NEXT:    vmov d17, r2, r3
552; ARMV7-NEXT:    vmov d16, r0, r1
553; ARMV7-NEXT:    mov r0, sp
554; ARMV7-NEXT:    vld1.64 {d18, d19}, [r0]
555; ARMV7-NEXT:    vmin.f32 q8, q8, q9
556; ARMV7-NEXT:    vmov r0, r1, d16
557; ARMV7-NEXT:    vmov r2, r3, d17
558; ARMV7-NEXT:    bx lr
559;
560; ARMV8-LABEL: fminnumv432_nsz_intrinsic:
561; ARMV8:       @ %bb.0:
562; ARMV8-NEXT:    vldr s0, [sp, #4]
563; ARMV8-NEXT:    vmov s12, r1
564; ARMV8-NEXT:    vldr s2, [sp, #8]
565; ARMV8-NEXT:    vmov s10, r2
566; ARMV8-NEXT:    vminnm.f32 s0, s12, s0
567; ARMV8-NEXT:    vldr s4, [sp, #12]
568; ARMV8-NEXT:    vldr s6, [sp]
569; ARMV8-NEXT:    vmov s14, r0
570; ARMV8-NEXT:    vmov r1, s0
571; ARMV8-NEXT:    vminnm.f32 s0, s10, s2
572; ARMV8-NEXT:    vmov s8, r3
573; ARMV8-NEXT:    vminnm.f32 s6, s14, s6
574; ARMV8-NEXT:    vmov r2, s0
575; ARMV8-NEXT:    vminnm.f32 s0, s8, s4
576; ARMV8-NEXT:    vmov r0, s6
577; ARMV8-NEXT:    vmov r3, s0
578; ARMV8-NEXT:    mov pc, lr
579;
580; ARMV8M-LABEL: fminnumv432_nsz_intrinsic:
581; ARMV8M:       @ %bb.0:
582; ARMV8M-NEXT:    vmov d0, r0, r1
583; ARMV8M-NEXT:    mov r0, sp
584; ARMV8M-NEXT:    vldrw.u32 q1, [r0]
585; ARMV8M-NEXT:    vmov d1, r2, r3
586; ARMV8M-NEXT:    vminnm.f32 q0, q0, q1
587; ARMV8M-NEXT:    vmov r0, r1, d0
588; ARMV8M-NEXT:    vmov r2, r3, d1
589; ARMV8M-NEXT:    bx lr
590  %a = call nnan nsz <4 x float> @llvm.minnum.v4f32(<4 x float> %x, <4 x float> %y)
591  ret <4 x float> %a
592}
593
594define <4 x float> @fminnumv432_non_zero_intrinsic(<4 x float> %x) {
595; ARMV7-LABEL: fminnumv432_non_zero_intrinsic:
596; ARMV7:       @ %bb.0:
597; ARMV7-NEXT:    vmov d19, r2, r3
598; ARMV7-NEXT:    vmov.f32 q8, #-1.000000e+00
599; ARMV7-NEXT:    vmov d18, r0, r1
600; ARMV7-NEXT:    vmin.f32 q8, q9, q8
601; ARMV7-NEXT:    vmov r0, r1, d16
602; ARMV7-NEXT:    vmov r2, r3, d17
603; ARMV7-NEXT:    bx lr
604;
605; ARMV8-LABEL: fminnumv432_non_zero_intrinsic:
606; ARMV8:       @ %bb.0:
607; ARMV8-NEXT:    vmov.f32 s0, #-1.000000e+00
608; ARMV8-NEXT:    vmov s4, r2
609; ARMV8-NEXT:    vmov s6, r1
610; ARMV8-NEXT:    vminnm.f32 s4, s4, s0
611; ARMV8-NEXT:    vmov s8, r0
612; ARMV8-NEXT:    vminnm.f32 s6, s6, s0
613; ARMV8-NEXT:    vmov s2, r3
614; ARMV8-NEXT:    vminnm.f32 s8, s8, s0
615; ARMV8-NEXT:    vminnm.f32 s0, s2, s0
616; ARMV8-NEXT:    vmov r0, s8
617; ARMV8-NEXT:    vmov r1, s6
618; ARMV8-NEXT:    vmov r2, s4
619; ARMV8-NEXT:    vmov r3, s0
620; ARMV8-NEXT:    mov pc, lr
621;
622; ARMV8M-LABEL: fminnumv432_non_zero_intrinsic:
623; ARMV8M:       @ %bb.0:
624; ARMV8M-NEXT:    vmov d1, r2, r3
625; ARMV8M-NEXT:    vmov.f32 q1, #-1.000000e+00
626; ARMV8M-NEXT:    vmov d0, r0, r1
627; ARMV8M-NEXT:    vminnm.f32 q0, q0, q1
628; ARMV8M-NEXT:    vmov r0, r1, d0
629; ARMV8M-NEXT:    vmov r2, r3, d1
630; ARMV8M-NEXT:    bx lr
631  %a = call nnan <4 x float> @llvm.minnum.v4f32(<4 x float> %x, <4 x float><float -1.0, float -1.0, float -1.0, float -1.0>)
632  ret <4 x float> %a
633}
634
635define <4 x float> @fminnumv432_one_zero_intrinsic(<4 x float> %x) {
636; ARMV7-LABEL: fminnumv432_one_zero_intrinsic:
637; ARMV7:       @ %bb.0:
638; ARMV7-NEXT:    vmov d17, r2, r3
639; ARMV7-NEXT:    vmov d16, r0, r1
640; ARMV7-NEXT:    adr r0, .LCPI18_0
641; ARMV7-NEXT:    vld1.64 {d18, d19}, [r0:128]
642; ARMV7-NEXT:    vmin.f32 q8, q8, q9
643; ARMV7-NEXT:    vmov r0, r1, d16
644; ARMV7-NEXT:    vmov r2, r3, d17
645; ARMV7-NEXT:    bx lr
646; ARMV7-NEXT:    .p2align 4
647; ARMV7-NEXT:  @ %bb.1:
648; ARMV7-NEXT:  .LCPI18_0:
649; ARMV7-NEXT:    .long 0xbf800000 @ float -1
650; ARMV7-NEXT:    .long 0x00000000 @ float 0
651; ARMV7-NEXT:    .long 0xbf800000 @ float -1
652; ARMV7-NEXT:    .long 0xbf800000 @ float -1
653;
654; ARMV8-LABEL: fminnumv432_one_zero_intrinsic:
655; ARMV8:       @ %bb.0:
656; ARMV8-NEXT:    vldr s0, .LCPI18_0
657; ARMV8-NEXT:    vmov s8, r1
658; ARMV8-NEXT:    vmov.f32 s2, #-1.000000e+00
659; ARMV8-NEXT:    vminnm.f32 s0, s8, s0
660; ARMV8-NEXT:    vmov s6, r2
661; ARMV8-NEXT:    vmov s10, r0
662; ARMV8-NEXT:    vmov r1, s0
663; ARMV8-NEXT:    vminnm.f32 s0, s6, s2
664; ARMV8-NEXT:    vmov s4, r3
665; ARMV8-NEXT:    vminnm.f32 s10, s10, s2
666; ARMV8-NEXT:    vmov r2, s0
667; ARMV8-NEXT:    vminnm.f32 s0, s4, s2
668; ARMV8-NEXT:    vmov r0, s10
669; ARMV8-NEXT:    vmov r3, s0
670; ARMV8-NEXT:    mov pc, lr
671; ARMV8-NEXT:    .p2align 2
672; ARMV8-NEXT:  @ %bb.1:
673; ARMV8-NEXT:  .LCPI18_0:
674; ARMV8-NEXT:    .long 0x00000000 @ float 0
675;
676; ARMV8M-LABEL: fminnumv432_one_zero_intrinsic:
677; ARMV8M:       @ %bb.0:
678; ARMV8M-NEXT:    vmov d0, r0, r1
679; ARMV8M-NEXT:    adr r0, .LCPI18_0
680; ARMV8M-NEXT:    vldrw.u32 q1, [r0]
681; ARMV8M-NEXT:    vmov d1, r2, r3
682; ARMV8M-NEXT:    vminnm.f32 q0, q0, q1
683; ARMV8M-NEXT:    vmov r0, r1, d0
684; ARMV8M-NEXT:    vmov r2, r3, d1
685; ARMV8M-NEXT:    bx lr
686; ARMV8M-NEXT:    .p2align 4
687; ARMV8M-NEXT:  @ %bb.1:
688; ARMV8M-NEXT:  .LCPI18_0:
689; ARMV8M-NEXT:    .long 0xbf800000 @ float -1
690; ARMV8M-NEXT:    .long 0x00000000 @ float 0
691; ARMV8M-NEXT:    .long 0xbf800000 @ float -1
692; ARMV8M-NEXT:    .long 0xbf800000 @ float -1
693  %a = call nnan <4 x float> @llvm.minnum.v4f32(<4 x float> %x, <4 x float><float -1.0, float 0.0, float -1.0, float -1.0>)
694  ret <4 x float> %a
695}
696
697define <4 x float> @fmaxnumv432_intrinsic(<4 x float> %x, <4 x float> %y) {
698; ARMV7-LABEL: fmaxnumv432_intrinsic:
699; ARMV7:       @ %bb.0:
700; ARMV7-NEXT:    vmov d17, r2, r3
701; ARMV7-NEXT:    vmov d16, r0, r1
702; ARMV7-NEXT:    mov r0, sp
703; ARMV7-NEXT:    vld1.64 {d18, d19}, [r0]
704; ARMV7-NEXT:    vmax.f32 q8, q8, q9
705; ARMV7-NEXT:    vmov r0, r1, d16
706; ARMV7-NEXT:    vmov r2, r3, d17
707; ARMV7-NEXT:    bx lr
708;
709; ARMV8-LABEL: fmaxnumv432_intrinsic:
710; ARMV8:       @ %bb.0:
711; ARMV8-NEXT:    vldr s0, [sp, #4]
712; ARMV8-NEXT:    vmov s12, r1
713; ARMV8-NEXT:    vldr s2, [sp, #8]
714; ARMV8-NEXT:    vmov s10, r2
715; ARMV8-NEXT:    vmaxnm.f32 s0, s12, s0
716; ARMV8-NEXT:    vldr s4, [sp, #12]
717; ARMV8-NEXT:    vldr s6, [sp]
718; ARMV8-NEXT:    vmov s14, r0
719; ARMV8-NEXT:    vmov r1, s0
720; ARMV8-NEXT:    vmaxnm.f32 s0, s10, s2
721; ARMV8-NEXT:    vmov s8, r3
722; ARMV8-NEXT:    vmaxnm.f32 s6, s14, s6
723; ARMV8-NEXT:    vmov r2, s0
724; ARMV8-NEXT:    vmaxnm.f32 s0, s8, s4
725; ARMV8-NEXT:    vmov r0, s6
726; ARMV8-NEXT:    vmov r3, s0
727; ARMV8-NEXT:    mov pc, lr
728;
729; ARMV8M-LABEL: fmaxnumv432_intrinsic:
730; ARMV8M:       @ %bb.0:
731; ARMV8M-NEXT:    vmov d0, r0, r1
732; ARMV8M-NEXT:    mov r0, sp
733; ARMV8M-NEXT:    vldrw.u32 q1, [r0]
734; ARMV8M-NEXT:    vmov d1, r2, r3
735; ARMV8M-NEXT:    vmaxnm.f32 q0, q0, q1
736; ARMV8M-NEXT:    vmov r0, r1, d0
737; ARMV8M-NEXT:    vmov r2, r3, d1
738; ARMV8M-NEXT:    bx lr
739  %a = call nnan <4 x float> @llvm.maxnum.v4f32(<4 x float> %x, <4 x float> %y)
740  ret <4 x float> %a
741}
742
743define <4 x float> @fmaxnumv432_nsz_intrinsic(<4 x float> %x, <4 x float> %y) {
744; ARMV7-LABEL: fmaxnumv432_nsz_intrinsic:
745; ARMV7:       @ %bb.0:
746; ARMV7-NEXT:    vmov d17, r2, r3
747; ARMV7-NEXT:    vmov d16, r0, r1
748; ARMV7-NEXT:    mov r0, sp
749; ARMV7-NEXT:    vld1.64 {d18, d19}, [r0]
750; ARMV7-NEXT:    vmax.f32 q8, q8, q9
751; ARMV7-NEXT:    vmov r0, r1, d16
752; ARMV7-NEXT:    vmov r2, r3, d17
753; ARMV7-NEXT:    bx lr
754;
755; ARMV8-LABEL: fmaxnumv432_nsz_intrinsic:
756; ARMV8:       @ %bb.0:
757; ARMV8-NEXT:    vldr s0, [sp, #4]
758; ARMV8-NEXT:    vmov s12, r1
759; ARMV8-NEXT:    vldr s2, [sp, #8]
760; ARMV8-NEXT:    vmov s10, r2
761; ARMV8-NEXT:    vmaxnm.f32 s0, s12, s0
762; ARMV8-NEXT:    vldr s4, [sp, #12]
763; ARMV8-NEXT:    vldr s6, [sp]
764; ARMV8-NEXT:    vmov s14, r0
765; ARMV8-NEXT:    vmov r1, s0
766; ARMV8-NEXT:    vmaxnm.f32 s0, s10, s2
767; ARMV8-NEXT:    vmov s8, r3
768; ARMV8-NEXT:    vmaxnm.f32 s6, s14, s6
769; ARMV8-NEXT:    vmov r2, s0
770; ARMV8-NEXT:    vmaxnm.f32 s0, s8, s4
771; ARMV8-NEXT:    vmov r0, s6
772; ARMV8-NEXT:    vmov r3, s0
773; ARMV8-NEXT:    mov pc, lr
774;
775; ARMV8M-LABEL: fmaxnumv432_nsz_intrinsic:
776; ARMV8M:       @ %bb.0:
777; ARMV8M-NEXT:    vmov d0, r0, r1
778; ARMV8M-NEXT:    mov r0, sp
779; ARMV8M-NEXT:    vldrw.u32 q1, [r0]
780; ARMV8M-NEXT:    vmov d1, r2, r3
781; ARMV8M-NEXT:    vmaxnm.f32 q0, q0, q1
782; ARMV8M-NEXT:    vmov r0, r1, d0
783; ARMV8M-NEXT:    vmov r2, r3, d1
784; ARMV8M-NEXT:    bx lr
785  %a = call nnan nsz <4 x float> @llvm.maxnum.v4f32(<4 x float> %x, <4 x float> %y)
786  ret <4 x float> %a
787}
788
789define <4 x float> @fmaxnumv432_zero_intrinsic(<4 x float> %x) {
790; ARMV7-LABEL: fmaxnumv432_zero_intrinsic:
791; ARMV7:       @ %bb.0:
792; ARMV7-NEXT:    vmov d19, r2, r3
793; ARMV7-NEXT:    vmov.i32 q8, #0x0
794; ARMV7-NEXT:    vmov d18, r0, r1
795; ARMV7-NEXT:    vmax.f32 q8, q9, q8
796; ARMV7-NEXT:    vmov r0, r1, d16
797; ARMV7-NEXT:    vmov r2, r3, d17
798; ARMV7-NEXT:    bx lr
799;
800; ARMV8-LABEL: fmaxnumv432_zero_intrinsic:
801; ARMV8:       @ %bb.0:
802; ARMV8-NEXT:    vldr s0, .LCPI21_0
803; ARMV8-NEXT:    vmov s4, r2
804; ARMV8-NEXT:    vmov s6, r1
805; ARMV8-NEXT:    vmov s8, r0
806; ARMV8-NEXT:    vmaxnm.f32 s6, s6, s0
807; ARMV8-NEXT:    vmov s2, r3
808; ARMV8-NEXT:    vmaxnm.f32 s8, s8, s0
809; ARMV8-NEXT:    vmaxnm.f32 s4, s4, s0
810; ARMV8-NEXT:    vmaxnm.f32 s0, s2, s0
811; ARMV8-NEXT:    vmov r0, s8
812; ARMV8-NEXT:    vmov r1, s6
813; ARMV8-NEXT:    vmov r2, s4
814; ARMV8-NEXT:    vmov r3, s0
815; ARMV8-NEXT:    mov pc, lr
816; ARMV8-NEXT:    .p2align 2
817; ARMV8-NEXT:  @ %bb.1:
818; ARMV8-NEXT:  .LCPI21_0:
819; ARMV8-NEXT:    .long 0x00000000 @ float 0
820;
821; ARMV8M-LABEL: fmaxnumv432_zero_intrinsic:
822; ARMV8M:       @ %bb.0:
823; ARMV8M-NEXT:    vmov d1, r2, r3
824; ARMV8M-NEXT:    vmov.i32 q1, #0x0
825; ARMV8M-NEXT:    vmov d0, r0, r1
826; ARMV8M-NEXT:    vmaxnm.f32 q0, q0, q1
827; ARMV8M-NEXT:    vmov r0, r1, d0
828; ARMV8M-NEXT:    vmov r2, r3, d1
829; ARMV8M-NEXT:    bx lr
830  %a = call nnan <4 x float> @llvm.maxnum.v4f32(<4 x float> %x, <4 x float><float 0.0, float 0.0, float 0.0, float 0.0>)
831  ret <4 x float> %a
832}
833
834define <4 x float> @fmaxnumv432_minus_zero_intrinsic(<4 x float> %x) {
835; ARMV7-LABEL: fmaxnumv432_minus_zero_intrinsic:
836; ARMV7:       @ %bb.0:
837; ARMV7-NEXT:    vmov d19, r2, r3
838; ARMV7-NEXT:    vmov.i32 q8, #0x80000000
839; ARMV7-NEXT:    vmov d18, r0, r1
840; ARMV7-NEXT:    vmax.f32 q8, q9, q8
841; ARMV7-NEXT:    vmov r0, r1, d16
842; ARMV7-NEXT:    vmov r2, r3, d17
843; ARMV7-NEXT:    bx lr
844;
845; ARMV8-LABEL: fmaxnumv432_minus_zero_intrinsic:
846; ARMV8:       @ %bb.0:
847; ARMV8-NEXT:    vldr s0, .LCPI22_0
848; ARMV8-NEXT:    vmov s4, r2
849; ARMV8-NEXT:    vmov s6, r1
850; ARMV8-NEXT:    vmov s8, r0
851; ARMV8-NEXT:    vmaxnm.f32 s6, s6, s0
852; ARMV8-NEXT:    vmov s2, r3
853; ARMV8-NEXT:    vmaxnm.f32 s8, s8, s0
854; ARMV8-NEXT:    vmaxnm.f32 s4, s4, s0
855; ARMV8-NEXT:    vmaxnm.f32 s0, s2, s0
856; ARMV8-NEXT:    vmov r0, s8
857; ARMV8-NEXT:    vmov r1, s6
858; ARMV8-NEXT:    vmov r2, s4
859; ARMV8-NEXT:    vmov r3, s0
860; ARMV8-NEXT:    mov pc, lr
861; ARMV8-NEXT:    .p2align 2
862; ARMV8-NEXT:  @ %bb.1:
863; ARMV8-NEXT:  .LCPI22_0:
864; ARMV8-NEXT:    .long 0x80000000 @ float -0
865;
866; ARMV8M-LABEL: fmaxnumv432_minus_zero_intrinsic:
867; ARMV8M:       @ %bb.0:
868; ARMV8M-NEXT:    vmov d1, r2, r3
869; ARMV8M-NEXT:    vmov.i32 q1, #0x80000000
870; ARMV8M-NEXT:    vmov d0, r0, r1
871; ARMV8M-NEXT:    vmaxnm.f32 q0, q0, q1
872; ARMV8M-NEXT:    vmov r0, r1, d0
873; ARMV8M-NEXT:    vmov r2, r3, d1
874; ARMV8M-NEXT:    bx lr
875  %a = call nnan <4 x float> @llvm.maxnum.v4f32(<4 x float> %x, <4 x float><float -0.0, float -0.0, float -0.0, float -0.0>)
876  ret <4 x float> %a
877}
878
879define <4 x float> @fmaxnumv432_non_zero_intrinsic(<4 x float> %x) {
880; ARMV7-LABEL: fmaxnumv432_non_zero_intrinsic:
881; ARMV7:       @ %bb.0:
882; ARMV7-NEXT:    vmov d19, r2, r3
883; ARMV7-NEXT:    vmov.f32 q8, #1.000000e+00
884; ARMV7-NEXT:    vmov d18, r0, r1
885; ARMV7-NEXT:    vmax.f32 q8, q9, q8
886; ARMV7-NEXT:    vmov r0, r1, d16
887; ARMV7-NEXT:    vmov r2, r3, d17
888; ARMV7-NEXT:    bx lr
889;
890; ARMV8-LABEL: fmaxnumv432_non_zero_intrinsic:
891; ARMV8:       @ %bb.0:
892; ARMV8-NEXT:    vmov.f32 s0, #1.000000e+00
893; ARMV8-NEXT:    vmov s4, r2
894; ARMV8-NEXT:    vmov s6, r1
895; ARMV8-NEXT:    vmaxnm.f32 s4, s4, s0
896; ARMV8-NEXT:    vmov s8, r0
897; ARMV8-NEXT:    vmaxnm.f32 s6, s6, s0
898; ARMV8-NEXT:    vmov s2, r3
899; ARMV8-NEXT:    vmaxnm.f32 s8, s8, s0
900; ARMV8-NEXT:    vmaxnm.f32 s0, s2, s0
901; ARMV8-NEXT:    vmov r0, s8
902; ARMV8-NEXT:    vmov r1, s6
903; ARMV8-NEXT:    vmov r2, s4
904; ARMV8-NEXT:    vmov r3, s0
905; ARMV8-NEXT:    mov pc, lr
906;
907; ARMV8M-LABEL: fmaxnumv432_non_zero_intrinsic:
908; ARMV8M:       @ %bb.0:
909; ARMV8M-NEXT:    vmov d1, r2, r3
910; ARMV8M-NEXT:    vmov.f32 q1, #1.000000e+00
911; ARMV8M-NEXT:    vmov d0, r0, r1
912; ARMV8M-NEXT:    vmaxnm.f32 q0, q0, q1
913; ARMV8M-NEXT:    vmov r0, r1, d0
914; ARMV8M-NEXT:    vmov r2, r3, d1
915; ARMV8M-NEXT:    bx lr
916  %a = call nnan <4 x float> @llvm.maxnum.v4f32(<4 x float> %x, <4 x float><float 1.0, float 1.0, float 1.0, float 1.0>)
917  ret <4 x float> %a
918}
919
920define <2 x double> @fminnumv264_intrinsic(<2 x double> %x, <2 x double> %y) {
921; ARMV7-LABEL: fminnumv264_intrinsic:
922; ARMV7:       @ %bb.0:
923; ARMV7-NEXT:    mov r12, sp
924; ARMV7-NEXT:    vld1.64 {d16, d17}, [r12]
925; ARMV7-NEXT:    vmov d18, r0, r1
926; ARMV7-NEXT:    vcmp.f64 d18, d16
927; ARMV7-NEXT:    vmrs APSR_nzcv, fpscr
928; ARMV7-NEXT:    vmov d19, r2, r3
929; ARMV7-NEXT:    vcmp.f64 d19, d17
930; ARMV7-NEXT:    vmovlt.f64 d16, d18
931; ARMV7-NEXT:    vmrs APSR_nzcv, fpscr
932; ARMV7-NEXT:    vmov r0, r1, d16
933; ARMV7-NEXT:    vmovlt.f64 d17, d19
934; ARMV7-NEXT:    vmov r2, r3, d17
935; ARMV7-NEXT:    bx lr
936;
937; ARMV8-LABEL: fminnumv264_intrinsic:
938; ARMV8:       @ %bb.0:
939; ARMV8-NEXT:    vldr d16, [sp, #8]
940; ARMV8-NEXT:    vmov d18, r2, r3
941; ARMV8-NEXT:    vldr d17, [sp]
942; ARMV8-NEXT:    vmov d19, r0, r1
943; ARMV8-NEXT:    vminnm.f64 d16, d18, d16
944; ARMV8-NEXT:    vminnm.f64 d17, d19, d17
945; ARMV8-NEXT:    vmov r2, r3, d16
946; ARMV8-NEXT:    vmov r0, r1, d17
947; ARMV8-NEXT:    mov pc, lr
948;
949; ARMV8M-LABEL: fminnumv264_intrinsic:
950; ARMV8M:       @ %bb.0:
951; ARMV8M-NEXT:    mov r12, sp
952; ARMV8M-NEXT:    vmov d0, r0, r1
953; ARMV8M-NEXT:    vldrw.u32 q1, [r12]
954; ARMV8M-NEXT:    vmov d1, r2, r3
955; ARMV8M-NEXT:    vcmp.f64 d2, d0
956; ARMV8M-NEXT:    vmrs APSR_nzcv, fpscr
957; ARMV8M-NEXT:    vcmp.f64 d3, d1
958; ARMV8M-NEXT:    vselgt.f64 d0, d0, d2
959; ARMV8M-NEXT:    vmrs APSR_nzcv, fpscr
960; ARMV8M-NEXT:    vmov r0, r1, d0
961; ARMV8M-NEXT:    vselgt.f64 d1, d1, d3
962; ARMV8M-NEXT:    vmov r2, r3, d1
963; ARMV8M-NEXT:    bx lr
964  %a = call nnan <2 x double> @llvm.minnum.v2f64(<2 x double> %x, <2 x double> %y)
965  ret <2 x double> %a
966}
967
968define <2 x double> @fminnumv264_nsz_intrinsic(<2 x double> %x, <2 x double> %y) {
969; ARMV7-LABEL: fminnumv264_nsz_intrinsic:
970; ARMV7:       @ %bb.0:
971; ARMV7-NEXT:    mov r12, sp
972; ARMV7-NEXT:    vld1.64 {d16, d17}, [r12]
973; ARMV7-NEXT:    vmov d18, r0, r1
974; ARMV7-NEXT:    vcmp.f64 d18, d16
975; ARMV7-NEXT:    vmrs APSR_nzcv, fpscr
976; ARMV7-NEXT:    vmov d19, r2, r3
977; ARMV7-NEXT:    vcmp.f64 d19, d17
978; ARMV7-NEXT:    vmovlt.f64 d16, d18
979; ARMV7-NEXT:    vmrs APSR_nzcv, fpscr
980; ARMV7-NEXT:    vmov r0, r1, d16
981; ARMV7-NEXT:    vmovlt.f64 d17, d19
982; ARMV7-NEXT:    vmov r2, r3, d17
983; ARMV7-NEXT:    bx lr
984;
985; ARMV8-LABEL: fminnumv264_nsz_intrinsic:
986; ARMV8:       @ %bb.0:
987; ARMV8-NEXT:    vldr d16, [sp, #8]
988; ARMV8-NEXT:    vmov d18, r2, r3
989; ARMV8-NEXT:    vldr d17, [sp]
990; ARMV8-NEXT:    vmov d19, r0, r1
991; ARMV8-NEXT:    vminnm.f64 d16, d18, d16
992; ARMV8-NEXT:    vminnm.f64 d17, d19, d17
993; ARMV8-NEXT:    vmov r2, r3, d16
994; ARMV8-NEXT:    vmov r0, r1, d17
995; ARMV8-NEXT:    mov pc, lr
996;
997; ARMV8M-LABEL: fminnumv264_nsz_intrinsic:
998; ARMV8M:       @ %bb.0:
999; ARMV8M-NEXT:    mov r12, sp
1000; ARMV8M-NEXT:    vmov d0, r0, r1
1001; ARMV8M-NEXT:    vldrw.u32 q1, [r12]
1002; ARMV8M-NEXT:    vmov d1, r2, r3
1003; ARMV8M-NEXT:    vcmp.f64 d2, d0
1004; ARMV8M-NEXT:    vmrs APSR_nzcv, fpscr
1005; ARMV8M-NEXT:    vcmp.f64 d3, d1
1006; ARMV8M-NEXT:    vselgt.f64 d0, d0, d2
1007; ARMV8M-NEXT:    vmrs APSR_nzcv, fpscr
1008; ARMV8M-NEXT:    vmov r0, r1, d0
1009; ARMV8M-NEXT:    vselgt.f64 d1, d1, d3
1010; ARMV8M-NEXT:    vmov r2, r3, d1
1011; ARMV8M-NEXT:    bx lr
1012  %a = call nnan nsz <2 x double> @llvm.minnum.v2f64(<2 x double> %x, <2 x double> %y)
1013  ret <2 x double> %a
1014}
1015
1016define <2 x double> @fminnumv264_non_zero_intrinsic(<2 x double> %x) {
1017; ARMV7-LABEL: fminnumv264_non_zero_intrinsic:
1018; ARMV7:       @ %bb.0:
1019; ARMV7-NEXT:    vmov.f64 d16, #1.000000e+00
1020; ARMV7-NEXT:    vmov d17, r0, r1
1021; ARMV7-NEXT:    vcmp.f64 d17, d16
1022; ARMV7-NEXT:    vmrs APSR_nzcv, fpscr
1023; ARMV7-NEXT:    vmov d18, r2, r3
1024; ARMV7-NEXT:    vcmp.f64 d18, d16
1025; ARMV7-NEXT:    vmov.f64 d19, d16
1026; ARMV7-NEXT:    vmovlt.f64 d19, d17
1027; ARMV7-NEXT:    vmrs APSR_nzcv, fpscr
1028; ARMV7-NEXT:    vmov r0, r1, d19
1029; ARMV7-NEXT:    vmovlt.f64 d16, d18
1030; ARMV7-NEXT:    vmov r2, r3, d16
1031; ARMV7-NEXT:    bx lr
1032;
1033; ARMV8-LABEL: fminnumv264_non_zero_intrinsic:
1034; ARMV8:       @ %bb.0:
1035; ARMV8-NEXT:    vmov.f64 d16, #1.000000e+00
1036; ARMV8-NEXT:    vmov d18, r0, r1
1037; ARMV8-NEXT:    vmov d17, r2, r3
1038; ARMV8-NEXT:    vminnm.f64 d18, d18, d16
1039; ARMV8-NEXT:    vminnm.f64 d16, d17, d16
1040; ARMV8-NEXT:    vmov r0, r1, d18
1041; ARMV8-NEXT:    vmov r2, r3, d16
1042; ARMV8-NEXT:    mov pc, lr
1043;
1044; ARMV8M-LABEL: fminnumv264_non_zero_intrinsic:
1045; ARMV8M:       @ %bb.0:
1046; ARMV8M-NEXT:    vmov d1, r0, r1
1047; ARMV8M-NEXT:    vmov.f64 d0, #1.000000e+00
1048; ARMV8M-NEXT:    vcmp.f64 d0, d1
1049; ARMV8M-NEXT:    vmrs APSR_nzcv, fpscr
1050; ARMV8M-NEXT:    vmov d2, r2, r3
1051; ARMV8M-NEXT:    vcmp.f64 d0, d2
1052; ARMV8M-NEXT:    vselgt.f64 d1, d1, d0
1053; ARMV8M-NEXT:    vmrs APSR_nzcv, fpscr
1054; ARMV8M-NEXT:    vmov r0, r1, d1
1055; ARMV8M-NEXT:    vselgt.f64 d0, d2, d0
1056; ARMV8M-NEXT:    vmov r2, r3, d0
1057; ARMV8M-NEXT:    bx lr
1058  %a = call nnan <2 x double> @llvm.minnum.v2f64(<2 x double> %x, <2 x double><double 1.0, double 1.0>)
1059  ret <2 x double> %a
1060}
1061
1062define <2 x double> @fminnumv264_one_zero_intrinsic(<2 x double> %x) {
1063; ARMV7-LABEL: fminnumv264_one_zero_intrinsic:
1064; ARMV7:       @ %bb.0:
1065; ARMV7-NEXT:    vmov d18, r2, r3
1066; ARMV7-NEXT:    vcmp.f64 d18, #0
1067; ARMV7-NEXT:    vmrs APSR_nzcv, fpscr
1068; ARMV7-NEXT:    vmov d19, r0, r1
1069; ARMV7-NEXT:    vmov.f64 d16, #-1.000000e+00
1070; ARMV7-NEXT:    vcmp.f64 d19, d16
1071; ARMV7-NEXT:    vmov.i32 d17, #0x0
1072; ARMV7-NEXT:    vmovlt.f64 d17, d18
1073; ARMV7-NEXT:    vmrs APSR_nzcv, fpscr
1074; ARMV7-NEXT:    vmov r2, r3, d17
1075; ARMV7-NEXT:    vmovlt.f64 d16, d19
1076; ARMV7-NEXT:    vmov r0, r1, d16
1077; ARMV7-NEXT:    bx lr
1078;
1079; ARMV8-LABEL: fminnumv264_one_zero_intrinsic:
1080; ARMV8:       @ %bb.0:
1081; ARMV8-NEXT:    vmov.f64 d16, #-1.000000e+00
1082; ARMV8-NEXT:    vldr d17, .LCPI27_0
1083; ARMV8-NEXT:    vmov d18, r0, r1
1084; ARMV8-NEXT:    vmov d19, r2, r3
1085; ARMV8-NEXT:    vminnm.f64 d16, d18, d16
1086; ARMV8-NEXT:    vminnm.f64 d17, d19, d17
1087; ARMV8-NEXT:    vmov r0, r1, d16
1088; ARMV8-NEXT:    vmov r2, r3, d17
1089; ARMV8-NEXT:    mov pc, lr
1090; ARMV8-NEXT:    .p2align 3
1091; ARMV8-NEXT:  @ %bb.1:
1092; ARMV8-NEXT:  .LCPI27_0:
1093; ARMV8-NEXT:    .long 0 @ double 0
1094; ARMV8-NEXT:    .long 0
1095;
1096; ARMV8M-LABEL: fminnumv264_one_zero_intrinsic:
1097; ARMV8M:       @ %bb.0:
1098; ARMV8M-NEXT:    vmov d3, r2, r3
1099; ARMV8M-NEXT:    vldr d1, .LCPI27_0
1100; ARMV8M-NEXT:    vcmp.f64 d3, #0
1101; ARMV8M-NEXT:    vmrs APSR_nzcv, fpscr
1102; ARMV8M-NEXT:    vmov d2, r0, r1
1103; ARMV8M-NEXT:    vmov.f64 d0, #-1.000000e+00
1104; ARMV8M-NEXT:    vcmp.f64 d0, d2
1105; ARMV8M-NEXT:    vmovlt.f64 d1, d3
1106; ARMV8M-NEXT:    vmrs APSR_nzcv, fpscr
1107; ARMV8M-NEXT:    vmov r2, r3, d1
1108; ARMV8M-NEXT:    vselgt.f64 d0, d2, d0
1109; ARMV8M-NEXT:    vmov r0, r1, d0
1110; ARMV8M-NEXT:    bx lr
1111; ARMV8M-NEXT:    .p2align 3
1112; ARMV8M-NEXT:  @ %bb.1:
1113; ARMV8M-NEXT:  .LCPI27_0:
1114; ARMV8M-NEXT:    .long 0 @ double 0
1115; ARMV8M-NEXT:    .long 0
1116  %a = call nnan <2 x double> @llvm.minnum.v2f64(<2 x double> %x, <2 x double><double -1.0, double 0.0>)
1117  ret <2 x double> %a
1118}
1119
1120define <2 x double> @fmaxnumv264_intrinsic(<2 x double> %x, <2 x double> %y) {
1121; ARMV7-LABEL: fmaxnumv264_intrinsic:
1122; ARMV7:       @ %bb.0:
1123; ARMV7-NEXT:    mov r12, sp
1124; ARMV7-NEXT:    vld1.64 {d16, d17}, [r12]
1125; ARMV7-NEXT:    vmov d18, r0, r1
1126; ARMV7-NEXT:    vcmp.f64 d18, d16
1127; ARMV7-NEXT:    vmrs APSR_nzcv, fpscr
1128; ARMV7-NEXT:    vmov d19, r2, r3
1129; ARMV7-NEXT:    vcmp.f64 d19, d17
1130; ARMV7-NEXT:    vmovgt.f64 d16, d18
1131; ARMV7-NEXT:    vmrs APSR_nzcv, fpscr
1132; ARMV7-NEXT:    vmov r0, r1, d16
1133; ARMV7-NEXT:    vmovgt.f64 d17, d19
1134; ARMV7-NEXT:    vmov r2, r3, d17
1135; ARMV7-NEXT:    bx lr
1136;
1137; ARMV8-LABEL: fmaxnumv264_intrinsic:
1138; ARMV8:       @ %bb.0:
1139; ARMV8-NEXT:    vldr d16, [sp, #8]
1140; ARMV8-NEXT:    vmov d18, r2, r3
1141; ARMV8-NEXT:    vldr d17, [sp]
1142; ARMV8-NEXT:    vmov d19, r0, r1
1143; ARMV8-NEXT:    vmaxnm.f64 d16, d18, d16
1144; ARMV8-NEXT:    vmaxnm.f64 d17, d19, d17
1145; ARMV8-NEXT:    vmov r2, r3, d16
1146; ARMV8-NEXT:    vmov r0, r1, d17
1147; ARMV8-NEXT:    mov pc, lr
1148;
1149; ARMV8M-LABEL: fmaxnumv264_intrinsic:
1150; ARMV8M:       @ %bb.0:
1151; ARMV8M-NEXT:    mov r12, sp
1152; ARMV8M-NEXT:    vmov d1, r0, r1
1153; ARMV8M-NEXT:    vldrw.u32 q1, [r12]
1154; ARMV8M-NEXT:    vmov d0, r2, r3
1155; ARMV8M-NEXT:    vcmp.f64 d1, d2
1156; ARMV8M-NEXT:    vmrs APSR_nzcv, fpscr
1157; ARMV8M-NEXT:    vcmp.f64 d0, d3
1158; ARMV8M-NEXT:    vselgt.f64 d1, d1, d2
1159; ARMV8M-NEXT:    vmrs APSR_nzcv, fpscr
1160; ARMV8M-NEXT:    vmov r0, r1, d1
1161; ARMV8M-NEXT:    vselgt.f64 d0, d0, d3
1162; ARMV8M-NEXT:    vmov r2, r3, d0
1163; ARMV8M-NEXT:    bx lr
1164  %a = call nnan <2 x double> @llvm.maxnum.v2f64(<2 x double> %x, <2 x double> %y)
1165  ret <2 x double> %a
1166}
1167
1168define <2 x double> @fmaxnumv264_nsz_intrinsic(<2 x double> %x, <2 x double> %y) {
1169; ARMV7-LABEL: fmaxnumv264_nsz_intrinsic:
1170; ARMV7:       @ %bb.0:
1171; ARMV7-NEXT:    mov r12, sp
1172; ARMV7-NEXT:    vld1.64 {d16, d17}, [r12]
1173; ARMV7-NEXT:    vmov d18, r0, r1
1174; ARMV7-NEXT:    vcmp.f64 d18, d16
1175; ARMV7-NEXT:    vmrs APSR_nzcv, fpscr
1176; ARMV7-NEXT:    vmov d19, r2, r3
1177; ARMV7-NEXT:    vcmp.f64 d19, d17
1178; ARMV7-NEXT:    vmovgt.f64 d16, d18
1179; ARMV7-NEXT:    vmrs APSR_nzcv, fpscr
1180; ARMV7-NEXT:    vmov r0, r1, d16
1181; ARMV7-NEXT:    vmovgt.f64 d17, d19
1182; ARMV7-NEXT:    vmov r2, r3, d17
1183; ARMV7-NEXT:    bx lr
1184;
1185; ARMV8-LABEL: fmaxnumv264_nsz_intrinsic:
1186; ARMV8:       @ %bb.0:
1187; ARMV8-NEXT:    vldr d16, [sp, #8]
1188; ARMV8-NEXT:    vmov d18, r2, r3
1189; ARMV8-NEXT:    vldr d17, [sp]
1190; ARMV8-NEXT:    vmov d19, r0, r1
1191; ARMV8-NEXT:    vmaxnm.f64 d16, d18, d16
1192; ARMV8-NEXT:    vmaxnm.f64 d17, d19, d17
1193; ARMV8-NEXT:    vmov r2, r3, d16
1194; ARMV8-NEXT:    vmov r0, r1, d17
1195; ARMV8-NEXT:    mov pc, lr
1196;
1197; ARMV8M-LABEL: fmaxnumv264_nsz_intrinsic:
1198; ARMV8M:       @ %bb.0:
1199; ARMV8M-NEXT:    mov r12, sp
1200; ARMV8M-NEXT:    vmov d1, r0, r1
1201; ARMV8M-NEXT:    vldrw.u32 q1, [r12]
1202; ARMV8M-NEXT:    vmov d0, r2, r3
1203; ARMV8M-NEXT:    vcmp.f64 d1, d2
1204; ARMV8M-NEXT:    vmrs APSR_nzcv, fpscr
1205; ARMV8M-NEXT:    vcmp.f64 d0, d3
1206; ARMV8M-NEXT:    vselgt.f64 d1, d1, d2
1207; ARMV8M-NEXT:    vmrs APSR_nzcv, fpscr
1208; ARMV8M-NEXT:    vmov r0, r1, d1
1209; ARMV8M-NEXT:    vselgt.f64 d0, d0, d3
1210; ARMV8M-NEXT:    vmov r2, r3, d0
1211; ARMV8M-NEXT:    bx lr
1212  %a = call nnan nsz <2 x double> @llvm.maxnum.v2f64(<2 x double> %x, <2 x double> %y)
1213  ret <2 x double> %a
1214}
1215
1216define <2 x double> @fmaxnumv264_zero_intrinsic(<2 x double> %x) {
1217; ARMV7-LABEL: fmaxnumv264_zero_intrinsic:
1218; ARMV7:       @ %bb.0:
1219; ARMV7-NEXT:    vldr d17, .LCPI30_0
1220; ARMV7-NEXT:    vmov d18, r2, r3
1221; ARMV7-NEXT:    vmov d19, r0, r1
1222; ARMV7-NEXT:    vcmp.f64 d18, d17
1223; ARMV7-NEXT:    vmrs APSR_nzcv, fpscr
1224; ARMV7-NEXT:    vmov.i32 d16, #0x0
1225; ARMV7-NEXT:    vcmp.f64 d19, #0
1226; ARMV7-NEXT:    vmovgt.f64 d17, d18
1227; ARMV7-NEXT:    vmrs APSR_nzcv, fpscr
1228; ARMV7-NEXT:    vmov r2, r3, d17
1229; ARMV7-NEXT:    vmovgt.f64 d16, d19
1230; ARMV7-NEXT:    vmov r0, r1, d16
1231; ARMV7-NEXT:    bx lr
1232; ARMV7-NEXT:    .p2align 3
1233; ARMV7-NEXT:  @ %bb.1:
1234; ARMV7-NEXT:  .LCPI30_0:
1235; ARMV7-NEXT:    .long 0 @ double -0
1236; ARMV7-NEXT:    .long 2147483648
1237;
1238; ARMV8-LABEL: fmaxnumv264_zero_intrinsic:
1239; ARMV8:       @ %bb.0:
1240; ARMV8-NEXT:    vldr d16, .LCPI30_0
1241; ARMV8-NEXT:    vmov d18, r2, r3
1242; ARMV8-NEXT:    vldr d17, .LCPI30_1
1243; ARMV8-NEXT:    vmov d19, r0, r1
1244; ARMV8-NEXT:    vmaxnm.f64 d16, d18, d16
1245; ARMV8-NEXT:    vmaxnm.f64 d17, d19, d17
1246; ARMV8-NEXT:    vmov r2, r3, d16
1247; ARMV8-NEXT:    vmov r0, r1, d17
1248; ARMV8-NEXT:    mov pc, lr
1249; ARMV8-NEXT:    .p2align 3
1250; ARMV8-NEXT:  @ %bb.1:
1251; ARMV8-NEXT:  .LCPI30_0:
1252; ARMV8-NEXT:    .long 0 @ double -0
1253; ARMV8-NEXT:    .long 2147483648
1254; ARMV8-NEXT:  .LCPI30_1:
1255; ARMV8-NEXT:    .long 0 @ double 0
1256; ARMV8-NEXT:    .long 0
1257;
1258; ARMV8M-LABEL: fmaxnumv264_zero_intrinsic:
1259; ARMV8M:       @ %bb.0:
1260; ARMV8M-NEXT:    vmov d2, r0, r1
1261; ARMV8M-NEXT:    vldr d0, .LCPI30_0
1262; ARMV8M-NEXT:    vcmp.f64 d2, #0
1263; ARMV8M-NEXT:    vmrs APSR_nzcv, fpscr
1264; ARMV8M-NEXT:    vmov d3, r2, r3
1265; ARMV8M-NEXT:    vcmp.f64 d3, d0
1266; ARMV8M-NEXT:    vldr d1, .LCPI30_1
1267; ARMV8M-NEXT:    vselgt.f64 d1, d2, d1
1268; ARMV8M-NEXT:    vmrs APSR_nzcv, fpscr
1269; ARMV8M-NEXT:    vmov r0, r1, d1
1270; ARMV8M-NEXT:    vselgt.f64 d0, d3, d0
1271; ARMV8M-NEXT:    vmov r2, r3, d0
1272; ARMV8M-NEXT:    bx lr
1273; ARMV8M-NEXT:    .p2align 3
1274; ARMV8M-NEXT:  @ %bb.1:
1275; ARMV8M-NEXT:  .LCPI30_0:
1276; ARMV8M-NEXT:    .long 0 @ double -0
1277; ARMV8M-NEXT:    .long 2147483648
1278; ARMV8M-NEXT:  .LCPI30_1:
1279; ARMV8M-NEXT:    .long 0 @ double 0
1280; ARMV8M-NEXT:    .long 0
1281  %a = call nnan <2 x double> @llvm.maxnum.v2f64(<2 x double> %x, <2 x double><double 0.0, double -0.0>)
1282  ret <2 x double> %a
1283}
1284
1285define <2 x double> @fmaxnumv264_minus_zero_intrinsic(<2 x double> %x) {
1286; ARMV7-LABEL: fmaxnumv264_minus_zero_intrinsic:
1287; ARMV7:       @ %bb.0:
1288; ARMV7-NEXT:    vldr d16, .LCPI31_0
1289; ARMV7-NEXT:    vmov d17, r0, r1
1290; ARMV7-NEXT:    vmov d18, r2, r3
1291; ARMV7-NEXT:    vcmp.f64 d17, d16
1292; ARMV7-NEXT:    vmrs APSR_nzcv, fpscr
1293; ARMV7-NEXT:    vcmp.f64 d18, d16
1294; ARMV7-NEXT:    vmov.f64 d19, d16
1295; ARMV7-NEXT:    vmovgt.f64 d19, d17
1296; ARMV7-NEXT:    vmrs APSR_nzcv, fpscr
1297; ARMV7-NEXT:    vmov r0, r1, d19
1298; ARMV7-NEXT:    vmovgt.f64 d16, d18
1299; ARMV7-NEXT:    vmov r2, r3, d16
1300; ARMV7-NEXT:    bx lr
1301; ARMV7-NEXT:    .p2align 3
1302; ARMV7-NEXT:  @ %bb.1:
1303; ARMV7-NEXT:  .LCPI31_0:
1304; ARMV7-NEXT:    .long 0 @ double -0
1305; ARMV7-NEXT:    .long 2147483648
1306;
1307; ARMV8-LABEL: fmaxnumv264_minus_zero_intrinsic:
1308; ARMV8:       @ %bb.0:
1309; ARMV8-NEXT:    vldr d16, .LCPI31_0
1310; ARMV8-NEXT:    vmov d18, r0, r1
1311; ARMV8-NEXT:    vmov d17, r2, r3
1312; ARMV8-NEXT:    vmaxnm.f64 d18, d18, d16
1313; ARMV8-NEXT:    vmaxnm.f64 d16, d17, d16
1314; ARMV8-NEXT:    vmov r0, r1, d18
1315; ARMV8-NEXT:    vmov r2, r3, d16
1316; ARMV8-NEXT:    mov pc, lr
1317; ARMV8-NEXT:    .p2align 3
1318; ARMV8-NEXT:  @ %bb.1:
1319; ARMV8-NEXT:  .LCPI31_0:
1320; ARMV8-NEXT:    .long 0 @ double -0
1321; ARMV8-NEXT:    .long 2147483648
1322;
1323; ARMV8M-LABEL: fmaxnumv264_minus_zero_intrinsic:
1324; ARMV8M:       @ %bb.0:
1325; ARMV8M-NEXT:    vldr d0, .LCPI31_0
1326; ARMV8M-NEXT:    vmov d1, r0, r1
1327; ARMV8M-NEXT:    vmov d2, r2, r3
1328; ARMV8M-NEXT:    vcmp.f64 d1, d0
1329; ARMV8M-NEXT:    vmrs APSR_nzcv, fpscr
1330; ARMV8M-NEXT:    vcmp.f64 d2, d0
1331; ARMV8M-NEXT:    vselgt.f64 d1, d1, d0
1332; ARMV8M-NEXT:    vmrs APSR_nzcv, fpscr
1333; ARMV8M-NEXT:    vmov r0, r1, d1
1334; ARMV8M-NEXT:    vselgt.f64 d0, d2, d0
1335; ARMV8M-NEXT:    vmov r2, r3, d0
1336; ARMV8M-NEXT:    bx lr
1337; ARMV8M-NEXT:    .p2align 3
1338; ARMV8M-NEXT:  @ %bb.1:
1339; ARMV8M-NEXT:  .LCPI31_0:
1340; ARMV8M-NEXT:    .long 0 @ double -0
1341; ARMV8M-NEXT:    .long 2147483648
1342  %a = call nnan <2 x double> @llvm.maxnum.v2f64(<2 x double> %x, <2 x double><double -0.0, double -0.0>)
1343  ret <2 x double> %a
1344}
1345
1346define <2 x double> @fmaxnumv264_non_zero_intrinsic(<2 x double> %x) {
1347; ARMV7-LABEL: fmaxnumv264_non_zero_intrinsic:
1348; ARMV7:       @ %bb.0:
1349; ARMV7-NEXT:    vmov.f64 d16, #1.000000e+00
1350; ARMV7-NEXT:    vmov d17, r0, r1
1351; ARMV7-NEXT:    vcmp.f64 d17, d16
1352; ARMV7-NEXT:    vmrs APSR_nzcv, fpscr
1353; ARMV7-NEXT:    vmov d18, r2, r3
1354; ARMV7-NEXT:    vcmp.f64 d18, d16
1355; ARMV7-NEXT:    vmov.f64 d19, d16
1356; ARMV7-NEXT:    vmovgt.f64 d19, d17
1357; ARMV7-NEXT:    vmrs APSR_nzcv, fpscr
1358; ARMV7-NEXT:    vmov r0, r1, d19
1359; ARMV7-NEXT:    vmovgt.f64 d16, d18
1360; ARMV7-NEXT:    vmov r2, r3, d16
1361; ARMV7-NEXT:    bx lr
1362;
1363; ARMV8-LABEL: fmaxnumv264_non_zero_intrinsic:
1364; ARMV8:       @ %bb.0:
1365; ARMV8-NEXT:    vmov.f64 d16, #1.000000e+00
1366; ARMV8-NEXT:    vmov d18, r0, r1
1367; ARMV8-NEXT:    vmov d17, r2, r3
1368; ARMV8-NEXT:    vmaxnm.f64 d18, d18, d16
1369; ARMV8-NEXT:    vmaxnm.f64 d16, d17, d16
1370; ARMV8-NEXT:    vmov r0, r1, d18
1371; ARMV8-NEXT:    vmov r2, r3, d16
1372; ARMV8-NEXT:    mov pc, lr
1373;
1374; ARMV8M-LABEL: fmaxnumv264_non_zero_intrinsic:
1375; ARMV8M:       @ %bb.0:
1376; ARMV8M-NEXT:    vmov.f64 d0, #1.000000e+00
1377; ARMV8M-NEXT:    vmov d1, r0, r1
1378; ARMV8M-NEXT:    vcmp.f64 d1, d0
1379; ARMV8M-NEXT:    vmrs APSR_nzcv, fpscr
1380; ARMV8M-NEXT:    vmov d2, r2, r3
1381; ARMV8M-NEXT:    vcmp.f64 d2, d0
1382; ARMV8M-NEXT:    vselgt.f64 d1, d1, d0
1383; ARMV8M-NEXT:    vmrs APSR_nzcv, fpscr
1384; ARMV8M-NEXT:    vmov r0, r1, d1
1385; ARMV8M-NEXT:    vselgt.f64 d0, d2, d0
1386; ARMV8M-NEXT:    vmov r2, r3, d0
1387; ARMV8M-NEXT:    bx lr
1388  %a = call nnan <2 x double> @llvm.maxnum.v2f64(<2 x double> %x, <2 x double><double 1.0, double 1.0>)
1389  ret <2 x double> %a
1390}
1391