1; RUN: llc < %s -mtriple=thumbv7-apple-ios -mcpu=cortex-a8 -pre-RA-sched=source -disable-post-ra | FileCheck %s 2; RUN: llc < %s -mtriple=thumbv6m-apple-ios -mcpu=cortex-m0 -pre-RA-sched=source -disable-post-ra -mattr=+strict-align | FileCheck %s -check-prefix=CHECK-T1 3%struct.x = type { i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8 } 4 5@src = external global %struct.x 6@dst = external global %struct.x 7 8@.str1 = private unnamed_addr constant [31 x i8] c"DHRYSTONE PROGRAM, SOME STRING\00", align 1 9@.str2 = private unnamed_addr constant [36 x i8] c"DHRYSTONE PROGRAM, SOME STRING BLAH\00", align 1 10@.str3 = private unnamed_addr constant [24 x i8] c"DHRYSTONE PROGRAM, SOME\00", align 1 11@.str4 = private unnamed_addr constant [18 x i8] c"DHRYSTONE PROGR \00", align 1 12@.str5 = private unnamed_addr constant [7 x i8] c"DHRYST\00", align 1 13@.str6 = private unnamed_addr constant [14 x i8] c"/tmp/rmXXXXXX\00", align 1 14@spool.splbuf = internal global [512 x i8] zeroinitializer, align 16 15 16define i32 @t0() { 17entry: 18; CHECK-LABEL: t0: 19; CHECK: vldr [[REG1:d[0-9]+]], 20; CHECK: vstr [[REG1]], 21; CHECK-T1-LABEL: t0: 22; CHECK-T1: ldrb [[TREG1:r[0-9]]], 23; CHECK-T1: strb [[TREG1]], 24; CHECK-T1: ldrh [[TREG2:r[0-9]]], 25; CHECK-T1: strh [[TREG2]] 26 call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 8 getelementptr inbounds (%struct.x, %struct.x* @dst, i32 0, i32 0), i8* align 8 getelementptr inbounds (%struct.x, %struct.x* @src, i32 0, i32 0), i32 11, i1 false) 27 ret i32 0 28} 29 30define void @t1(i8* nocapture %C) nounwind { 31entry: 32; CHECK-LABEL: t1: 33; CHECK: movs [[INC:r[0-9]+]], #15 34; CHECK: vld1.8 {d{{[0-9]+}}, d{{[0-9]+}}}, [r1], [[INC]] 35; CHECK: vst1.8 {d{{[0-9]+}}, d{{[0-9]+}}}, [r0], [[INC]] 36; CHECK: vld1.8 {d{{[0-9]+}}, d{{[0-9]+}}}, [r1] 37; CHECK: vst1.8 {d{{[0-9]+}}, d{{[0-9]+}}}, [r0] 38; CHECK-T1-LABEL: t1: 39; CHECK-T1: bl _memcpy 40 tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %C, i8* getelementptr inbounds ([31 x i8], [31 x i8]* @.str1, i64 0, i64 0), i64 31, i1 false) 41 ret void 42} 43 44define void @t2(i8* nocapture %C) nounwind { 45entry: 46; CHECK-LABEL: t2: 47; CHECK: vld1.8 {d{{[0-9]+}}, d{{[0-9]+}}}, [r1]! 48; CHECK: movs [[INC:r[0-9]+]], #32 49; CHECK: add.w r3, r0, #16 50; CHECK: vst1.8 {d{{[0-9]+}}, d{{[0-9]+}}}, [r0], [[INC]] 51; CHECK: movw [[REG2:r[0-9]+]], #16716 52; CHECK: movt [[REG2:r[0-9]+]], #72 53; CHECK: str [[REG2]], [r0] 54; CHECK: vld1.64 {d{{[0-9]+}}, d{{[0-9]+}}}, [r1] 55; CHECK: vst1.8 {d{{[0-9]+}}, d{{[0-9]+}}}, [r3] 56; CHECK-T1-LABEL: t2: 57; CHECK-T1: bl _memcpy 58 tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %C, i8* getelementptr inbounds ([36 x i8], [36 x i8]* @.str2, i64 0, i64 0), i64 36, i1 false) 59 ret void 60} 61 62define void @t3(i8* nocapture %C) nounwind { 63entry: 64; CHECK-LABEL: t3: 65; CHECK: vld1.8 {d{{[0-9]+}}, d{{[0-9]+}}}, [r1]! 66; CHECK: vst1.8 {d{{[0-9]+}}, d{{[0-9]+}}}, [r0]! 67; CHECK: vldr d{{[0-9]+}}, [r1] 68; CHECK: vst1.8 {d{{[0-9]+}}}, [r0] 69; CHECK-T1-LABEL: t3: 70; CHECK-T1: bl _memcpy 71 tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %C, i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str3, i64 0, i64 0), i64 24, i1 false) 72 ret void 73} 74 75define void @t4(i8* nocapture %C) nounwind { 76entry: 77; CHECK-LABEL: t4: 78; CHECK: vld1.64 {[[REG3:d[0-9]+]], [[REG4:d[0-9]+]]}, [r1] 79; CHECK: vst1.8 {[[REG3]], [[REG4]]}, [r0]! 80; CHECK: strh [[REG5:r[0-9]+]], [r0] 81; CHECK-T1-LABEL: t4: 82; CHECK-T1: bl _memcpy 83 tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %C, i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str4, i64 0, i64 0), i64 18, i1 false) 84 ret void 85} 86 87define void @t5(i8* nocapture %C) nounwind { 88entry: 89; CHECK-LABEL: t5: 90; CHECK: movs [[REG5:r[0-9]+]], #0 91; CHECK: strb [[REG5]], [r0, #6] 92; CHECK: movw [[REG6:r[0-9]+]], #21587 93; CHECK: strh [[REG6]], [r0, #4] 94; CHECK: movw [[REG7:r[0-9]+]], #18500 95; CHECK: movt [[REG7:r[0-9]+]], #22866 96; CHECK: str [[REG7]] 97; CHECK-T1-LABEL: t5: 98; CHECK-T1: bl _memcpy 99 tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %C, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str5, i64 0, i64 0), i64 7, i1 false) 100 ret void 101} 102 103define void @t6() nounwind { 104entry: 105; CHECK-LABEL: t6: 106; CHECK: vldr [[REG9:d[0-9]+]], [r0] 107; CHECK: vstr [[REG9]], [r1] 108; CHECK: adds r1, #6 109; CHECK: adds r0, #6 110; CHECK: vld1.16 111; CHECK: vst1.16 112; CHECK-T1-LABEL: t6: 113; CHECK-T1: movs [[TREG5:r[0-9]]], 114; CHECK-T1: strh [[TREG5]], 115; CHECK-T1: ldr [[TREG6:r[0-9]]], 116; CHECK-T1: str [[TREG6]] 117 call void @llvm.memcpy.p0i8.p0i8.i64(i8* getelementptr inbounds ([512 x i8], [512 x i8]* @spool.splbuf, i64 0, i64 0), i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str6, i64 0, i64 0), i64 14, i1 false) 118 ret void 119} 120 121%struct.Foo = type { i32, i32, i32, i32 } 122 123define void @t7(%struct.Foo* nocapture %a, %struct.Foo* nocapture %b) nounwind { 124entry: 125; CHECK-LABEL: t7: 126; CHECK: vld1.32 127; CHECK: vst1.32 128; CHECK-T1-LABEL: t7: 129; CHECK-T1: ldr 130; CHECK-T1: str 131 %0 = bitcast %struct.Foo* %a to i8* 132 %1 = bitcast %struct.Foo* %b to i8* 133 tail call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 %0, i8* align 4 %1, i32 16, i1 false) 134 ret void 135} 136 137declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i1) nounwind 138declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i1) nounwind 139