xref: /llvm-project/llvm/test/CodeGen/ARM/machine-outliner-stack-use.mir (revision 923ca0b411f78a3d218ff660a5b7a8b9099bdaa4)
1*923ca0b4SYvan Roux# RUN: llc -mtriple=arm-- -run-pass=machine-outliner -verify-machineinstrs \
2*923ca0b4SYvan Roux# RUN: %s -o - | FileCheck %s
3*923ca0b4SYvan Roux
4*923ca0b4SYvan Roux--- |
5*923ca0b4SYvan Roux  define void @stack_use_no_lr_save_1() #0 { ret void }
6*923ca0b4SYvan Roux  define void @stack_use_no_lr_save_2() #0 { ret void }
7*923ca0b4SYvan Roux
8*923ca0b4SYvan Roux  attributes #0 = { minsize optsize }
9*923ca0b4SYvan Roux...
10*923ca0b4SYvan Roux---
11*923ca0b4SYvan Roux
12*923ca0b4SYvan Rouxname:           stack_use_no_lr_save_1
13*923ca0b4SYvan RouxtracksRegLiveness: true
14*923ca0b4SYvan Rouxbody:             |
15*923ca0b4SYvan Roux  bb.0:
16*923ca0b4SYvan Roux    ; CHECK-LABEL: name:           stack_use_no_lr_save_1
17*923ca0b4SYvan Roux    ; CHECK: BL @OUTLINED_FUNCTION_0
18*923ca0b4SYvan Roux    $r0 = MOVi 1, 14, $noreg, $noreg
19*923ca0b4SYvan Roux    $r0 = MOVi 1, 14, $noreg, $noreg
20*923ca0b4SYvan Roux    $r0 = LDRi12 $sp, 0, 14, $noreg
21*923ca0b4SYvan Roux    $r0 = LDRi12 $sp, 0, 14, $noreg
22*923ca0b4SYvan Roux    $r0 = LDRi12 $sp, 0, 14, $noreg
23*923ca0b4SYvan Roux    $r0 = MOVi 1, 14, $noreg, $noreg
24*923ca0b4SYvan Roux    $r0 = LDRi12 $sp, 0, 14, $noreg
25*923ca0b4SYvan Roux    $r0 = MOVi 1, 14, $noreg, $noreg
26*923ca0b4SYvan Roux  bb.1:
27*923ca0b4SYvan Roux    liveins: $r0, $r1, $r2, $r3, $r4, $r5, $r6, $r7, $r8, $r9, $r10, $r11
28*923ca0b4SYvan Roux    BX_RET 14, $noreg
29*923ca0b4SYvan Roux...
30*923ca0b4SYvan Roux---
31*923ca0b4SYvan Roux
32*923ca0b4SYvan Rouxname:           stack_use_no_lr_save_2
33*923ca0b4SYvan RouxtracksRegLiveness: true
34*923ca0b4SYvan Rouxbody:             |
35*923ca0b4SYvan Roux  bb.0:
36*923ca0b4SYvan Roux    ; CHECK-LABEL: name:           stack_use_no_lr_save_2
37*923ca0b4SYvan Roux    ; CHECK: BL @OUTLINED_FUNCTION_0
38*923ca0b4SYvan Roux    $r0 = MOVi 1, 14, $noreg, $noreg
39*923ca0b4SYvan Roux    $r0 = MOVi 1, 14, $noreg, $noreg
40*923ca0b4SYvan Roux    $r0 = LDRi12 $sp, 0, 14, $noreg
41*923ca0b4SYvan Roux    $r0 = LDRi12 $sp, 0, 14, $noreg
42*923ca0b4SYvan Roux    $r0 = LDRi12 $sp, 0, 14, $noreg
43*923ca0b4SYvan Roux    $r0 = MOVi 1, 14, $noreg, $noreg
44*923ca0b4SYvan Roux    $r0 = LDRi12 $sp, 0, 14, $noreg
45*923ca0b4SYvan Roux    $r0 = MOVi 1, 14, $noreg, $noreg
46*923ca0b4SYvan Roux  bb.1:
47*923ca0b4SYvan Roux    BX_RET 14, $noreg
48*923ca0b4SYvan Roux
49*923ca0b4SYvan Roux    ;CHECK: name:           OUTLINED_FUNCTION_0
50*923ca0b4SYvan Roux    ;CHECK: $r0 = MOVi 1, 14 /* CC::al */, $noreg, $noreg
51*923ca0b4SYvan Roux    ;CHECK-NEXT: $r0 = MOVi 1, 14 /* CC::al */, $noreg, $noreg
52*923ca0b4SYvan Roux    ;CHECK-NEXT: $r0 = LDRi12 $sp, 0, 14 /* CC::al */, $noreg
53*923ca0b4SYvan Roux    ;CHECK-NEXT: $r0 = LDRi12 $sp, 0, 14 /* CC::al */, $noreg
54*923ca0b4SYvan Roux    ;CHECK-NEXT: $r0 = LDRi12 $sp, 0, 14 /* CC::al */, $noreg
55*923ca0b4SYvan Roux    ;CHECK-NEXT: $r0 = MOVi 1, 14 /* CC::al */, $noreg, $noreg
56*923ca0b4SYvan Roux    ;CHECK-NEXT: $r0 = LDRi12 $sp, 0, 14 /* CC::al */, $noreg
57*923ca0b4SYvan Roux    ;CHECK-NEXT: $r0 = MOVi 1, 14 /* CC::al */, $noreg, $noreg
58*923ca0b4SYvan Roux    ;CHECK-NEXT: MOVPCLR 14 /* CC::al */, $noreg
59