xref: /llvm-project/llvm/test/CodeGen/ARM/machine-outliner-stack-fixup-arm.mir (revision 3b16630c26505060a876f578e4b2ba701c780e9a) 
1# RUN: llc -mtriple=armv7-- -run-pass=prologepilog -run-pass=machine-outliner \
2# RUN: -verify-machineinstrs %s -o - | FileCheck %s
3
4--- |
5  define void @CheckAddrMode_i12() { ret void }
6  define void @CheckAddrMode3() { ret void }
7  define void @CheckAddrMode5() { ret void }
8  define void @CheckAddrMode5FP16() { ret void }
9  define void @foo() { ret void }
10
11...
12---
13
14name:           CheckAddrMode_i12
15tracksRegLiveness: true
16body:             |
17  bb.0:
18    liveins: $r0
19    ; CHECK-LABEL: name:           CheckAddrMode_i12
20    ; CHECK: $r1 = MOVr killed $r0, 14 /* CC::al */, $noreg, $noreg
21    ; CHECK-NEXT: BL @foo, implicit-def dead $lr, implicit $sp
22    ; CHECK-NEXT: BL @OUTLINED_FUNCTION_[[I12:[0-9]+]]
23    ; CHECK-NEXT: $r6 = LDRi12 $sp, 4088, 14 /* CC::al */, $noreg
24    $r1 = MOVr killed $r0, 14, $noreg, $noreg
25    BL @foo, implicit-def dead $lr, implicit $sp
26    $r1 = LDRi12 $sp, 0, 14, $noreg
27    $r2 = LDRi12 $sp, 8, 14, $noreg
28    $r5 = LDRi12 $sp, 4086, 14, $noreg
29    $r6 = LDRi12 $sp, 4088, 14, $noreg
30    BL @foo, implicit-def dead $lr, implicit $sp
31    $r1 = LDRi12 $sp, 0, 14, $noreg
32    $r2 = LDRi12 $sp, 8, 14, $noreg
33    $r5 = LDRi12 $sp, 4086, 14, $noreg
34    $r6 = LDRi12 $sp, 4088, 14, $noreg
35    BL @foo, implicit-def dead $lr, implicit $sp
36    $r1 = LDRi12 $sp, 0, 14, $noreg
37    $r2 = LDRi12 $sp, 8, 14, $noreg
38    $r5 = LDRi12 $sp, 4086, 14, $noreg
39    $r6 = LDRi12 $sp, 4088, 14, $noreg
40    BX_RET 14, $noreg
41...
42---
43
44name:           CheckAddrMode3
45tracksRegLiveness: true
46body:             |
47  bb.0:
48    liveins: $r1
49    ; CHECK-LABEL: name:           CheckAddrMode3
50    ; CHECK: $r0 = MOVr killed $r1, 14 /* CC::al */, $noreg, $noreg
51    ; CHECK-NEXT: BL @foo, implicit-def dead $lr, implicit $sp
52    ; CHECK-NEXT: BL @OUTLINED_FUNCTION_[[I3:[0-9]+]]
53    ; CHECK-NEXT: $r6 = LDRSH $sp, $noreg, 248, 14 /* CC::al */, $noreg
54    $r0 = MOVr killed $r1, 14, $noreg, $noreg
55    BL @foo, implicit-def dead $lr, implicit $sp
56    $r1 = LDRSH $sp, $noreg, 0, 14, $noreg
57    $r2 = LDRSH $sp, $noreg, 8, 14, $noreg
58    $r5 = LDRSH $sp, $noreg, 247, 14, $noreg
59    $r6 = LDRSH $sp, $noreg, 248, 14, $noreg
60    BL @foo, implicit-def dead $lr, implicit $sp
61    $r1 = LDRSH $sp, $noreg, 0, 14, $noreg
62    $r2 = LDRSH $sp, $noreg, 8, 14, $noreg
63    $r5 = LDRSH $sp, $noreg, 247, 14, $noreg
64    $r6 = LDRSH $sp, $noreg, 248, 14, $noreg
65    BL @foo, implicit-def dead $lr, implicit $sp
66    $r1 = LDRSH $sp, $noreg, 0, 14, $noreg
67    $r2 = LDRSH $sp, $noreg, 8, 14, $noreg
68    $r5 = LDRSH $sp, $noreg, 247, 14, $noreg
69    $r6 = LDRSH $sp, $noreg, 248, 14, $noreg
70    BX_RET 14, $noreg
71...
72---
73
74name:           CheckAddrMode5
75tracksRegLiveness: true
76body:             |
77  bb.0:
78    liveins: $r2
79    ; CHECK-LABEL: name:           CheckAddrMode5
80    ; CHECK: $r0 = MOVr killed $r2, 14 /* CC::al */, $noreg, $noreg
81    ; CHECK-NEXT: BL @foo, implicit-def dead $lr, implicit $sp
82    ; CHECK-NEXT: BL @OUTLINED_FUNCTION_[[I5:[0-9]+]]
83    ; CHECK-NEXT: $d5 = VLDRD $sp, 254, 14 /* CC::al */, $noreg
84    $r0 = MOVr killed $r2, 14, $noreg, $noreg
85    BL @foo, implicit-def dead $lr, implicit $sp
86    $d0 = VLDRD $sp, 0, 14, $noreg
87    $d1 = VLDRD $sp, 8, 14, $noreg
88    $d4 = VLDRD $sp, 253, 14, $noreg
89    $d5 = VLDRD $sp, 254, 14, $noreg
90    BL @foo, implicit-def dead $lr, implicit $sp
91    $d0 = VLDRD $sp, 0, 14, $noreg
92    $d1 = VLDRD $sp, 8, 14, $noreg
93    $d4 = VLDRD $sp, 253, 14, $noreg
94    $d5 = VLDRD $sp, 254, 14, $noreg
95    BL @foo, implicit-def dead $lr, implicit $sp
96    $d0 = VLDRD $sp, 0, 14, $noreg
97    $d1 = VLDRD $sp, 8, 14, $noreg
98    $d4 = VLDRD $sp, 253, 14, $noreg
99    $d5 = VLDRD $sp, 254, 14, $noreg
100    BL @foo, implicit-def dead $lr, implicit $sp
101    $d0 = VLDRD $sp, 0, 14, $noreg
102    $d1 = VLDRD $sp, 8, 14, $noreg
103    $d4 = VLDRD $sp, 253, 14, $noreg
104    $d5 = VLDRD $sp, 254, 14, $noreg
105    BX_RET 14, $noreg
106...
107---
108
109name:           CheckAddrMode5FP16
110tracksRegLiveness: true
111body:             |
112  bb.0:
113    liveins: $r3
114    ; CHECK-LABEL: name:           CheckAddrMode5FP16
115    ; CHECK: $r0 = MOVr killed $r3, 14 /* CC::al */, $noreg, $noreg
116    ; CHECK-NEXT: BL @foo, implicit-def dead $lr, implicit $sp
117    ; CHECK-NEXT: BL @OUTLINED_FUNCTION_[[I5FP16:[0-9]+]]
118    ; CHECK-NEXT: $s6 = VLDRH $sp, 252, 14, $noreg
119    $r0 = MOVr killed $r3, 14, $noreg, $noreg
120    BL @foo, implicit-def dead $lr, implicit $sp
121    $s1 = VLDRH $sp, 0, 14, $noreg
122    $s2 = VLDRH $sp, 8, 14, $noreg
123    $s5 = VLDRH $sp, 240, 14, $noreg
124    $s6 = VLDRH $sp, 252, 14, $noreg
125    BL @foo, implicit-def dead $lr, implicit $sp
126    $s1 = VLDRH $sp, 0, 14, $noreg
127    $s2 = VLDRH $sp, 8, 14, $noreg
128    $s5 = VLDRH $sp, 240, 14, $noreg
129    $s6 = VLDRH $sp, 252, 14, $noreg
130    BL @foo, implicit-def dead $lr, implicit $sp
131    $s1 = VLDRH $sp, 0, 14, $noreg
132    $s2 = VLDRH $sp, 8, 14, $noreg
133    $s5 = VLDRH $sp, 240, 14, $noreg
134    $s6 = VLDRH $sp, 252, 14, $noreg
135    BL @foo, implicit-def dead $lr, implicit $sp
136    $s1 = VLDRH $sp, 0, 14, $noreg
137    $s2 = VLDRH $sp, 8, 14, $noreg
138    $s5 = VLDRH $sp, 240, 14, $noreg
139    $s6 = VLDRH $sp, 252, 14, $noreg
140    BX_RET 14, $noreg
141...
142---
143
144name:           foo
145tracksRegLiveness: true
146body:             |
147  bb.0:
148    liveins: $lr
149
150    BX_RET 14, $noreg
151
152    ;CHECK: name:           OUTLINED_FUNCTION_[[I5]]
153    ;CHECK: liveins: $r10, $r9, $r8, $r7, $r6, $r5, $r4, $d15, $d14, $d13, $d12, $d11, $d10, $d9, $d8
154    ;CHECK: $d0 = VLDRD $sp, 0, 14 /* CC::al */, $noreg
155    ;CHECK-NEXT: $d1 = VLDRD $sp, 8, 14 /* CC::al */, $noreg
156    ;CHECK-NEXT: $d4 = VLDRD $sp, 253, 14 /* CC::al */, $noreg
157    ;CHECK-NEXT: BX_RET 14 /* CC::al */, $noreg
158
159    ;CHECK: name:           OUTLINED_FUNCTION_[[I5FP16]]
160    ;CHECK: liveins: $r10, $r9, $r8, $r7, $r6, $r5, $r4, $d15, $d14, $d13, $d12, $d11, $d10, $d9, $d8
161    ;CHECK: $s1 = VLDRH $sp, 0, 14, $noreg
162    ;CHECK-NEXT: $s2 = VLDRH $sp, 8, 14, $noreg
163    ;CHECK-NEXT: $s5 = VLDRH $sp, 240, 14, $noreg
164    ;CHECK-NEXT: BX_RET 14 /* CC::al */, $noreg
165
166    ;CHECK: name:           OUTLINED_FUNCTION_[[I12]]
167    ;CHECK: liveins: $r10, $r9, $r8, $r7, $d8, $r4, $d15, $d14, $d13, $d12, $d11, $d10, $d9
168    ;CHECK: $r1 = LDRi12 $sp, 0, 14 /* CC::al */, $noreg
169    ;CHECK-NEXT: $r2 = LDRi12 $sp, 8, 14 /* CC::al */, $noreg
170    ;CHECK-NEXT: $r5 = LDRi12 $sp, 4086, 14 /* CC::al */, $noreg
171    ;CHECK-NEXT: BX_RET 14 /* CC::al */, $noreg
172
173    ;CHECK: name:           OUTLINED_FUNCTION_[[I3]]
174    ;CHECK: liveins: $r10, $r9, $r8, $r7, $d8, $r4, $d15, $d14, $d13, $d12, $d11, $d10, $d9
175    ;CHECK: $r1 = LDRSH $sp, $noreg, 0, 14 /* CC::al */, $noreg
176    ;CHECK-NEXT: $r2 = LDRSH $sp, $noreg, 8, 14 /* CC::al */, $noreg
177    ;CHECK-NEXT: $r5 = LDRSH $sp, $noreg, 247, 14 /* CC::al */, $noreg
178    ;CHECK-NEXT: BX_RET 14 /* CC::al */, $noreg
179