xref: /llvm-project/llvm/test/CodeGen/ARM/machine-cse-cmp.ll (revision bed1c7f061aa12417aa081e334afdba45767b938)
1; RUN: llc < %s -mtriple=armv7-apple-ios | FileCheck %s
2;rdar://8003725
3
4declare void @llvm.trap()
5
6@G1 = external global i32
7@G2 = external global i32
8
9define i32 @f1(i32 %cond1, i32 %x1, i32 %x2, i32 %x3) {
10entry:
11; CHECK-LABEL: f1:
12; CHECK: cmp
13; CHECK: moveq
14; CHECK-NOT: cmp
15; CHECK: mov{{eq|ne}}
16    %tmp1 = icmp eq i32 %cond1, 0
17    %tmp2 = select i1 %tmp1, i32 %x1, i32 %x2
18    %tmp3 = select i1 %tmp1, i32 %x2, i32 %x3
19    %tmp4 = add i32 %tmp2, %tmp3
20    ret i32 %tmp4
21}
22
23@foo = external global i32
24@bar = external global [250 x i8], align 1
25
26; CSE of cmp across BB boundary
27; rdar://10660865
28define void @f2() nounwind ssp {
29entry:
30; CHECK-LABEL: f2:
31; CHECK: cmp
32; CHECK: bxlt
33; CHECK-NOT: cmp
34; CHECK: movle
35  %0 = load i32, ptr @foo, align 4
36  %cmp28 = icmp sgt i32 %0, 0
37  br i1 %cmp28, label %for.body.lr.ph, label %for.cond1.preheader
38
39for.body.lr.ph:                                   ; preds = %entry
40  %1 = icmp sgt i32 %0, 1
41  %smax = select i1 %1, i32 %0, i32 1
42  call void @llvm.memset.p0.i32(ptr @bar, i8 0, i32 %smax, i1 false)
43  call void @llvm.trap()
44  unreachable
45
46for.cond1.preheader:                              ; preds = %entry
47  ret void
48}
49
50declare void @llvm.memset.p0.i32(ptr nocapture, i8, i32, i1) nounwind
51
52; rdar://12462006
53define ptr @f3(ptr %base, ptr nocapture %offset, i32 %size) nounwind {
54entry:
55; CHECK-LABEL: f3:
56; CHECK-NOT: sub
57; CHECK: cmp
58; CHECK: blt
59%0 = load i32, ptr %offset, align 4
60%cmp = icmp slt i32 %0, %size
61%s = sub nsw i32 %0, %size
62%size2 = sub nsw i32 %size, 0
63br i1 %cmp, label %return, label %if.end
64
65if.end:
66; We are checking cse between %sub here and %s in entry block.
67%sub = sub nsw i32 %0, %size2
68%s2 = sub nsw i32 %s, %size
69%s3 = sub nsw i32 %sub, %s2
70; CHECK: sub [[R1:r[0-9]+]], [[R2:r[0-9]+]], r2
71; CHECK: sub [[R3:r[0-9]+]], r2, [[R1]]
72; CHECK: add [[R4:r[0-9]+]], [[R1]], [[R3]]
73; CHECK-NOT: sub
74; CHECK: str
75store i32 %s3, ptr %offset, align 4
76%add.ptr = getelementptr inbounds i8, ptr %base, i32 %sub
77br label %return
78
79return:
80%retval.0 = phi ptr [ %add.ptr, %if.end ], [ null, %entry ]
81ret ptr %retval.0
82}
83
84; The cmp of %val should not be hoisted above the preceding conditional branch
85define void @f4(ptr %ptr1, ptr %ptr2, i64 %val) {
86entry:
87; CHECK-LABEL: f4:
88; CHECK: cmp
89; CHECK: movne
90; CHECK: strne
91; CHECK: orrs
92; CHECK-NOT: subs
93; CHECK-NOT: sbcs
94; CHECK: beq
95  %tobool.not = icmp eq ptr %ptr1, null
96  br i1 %tobool.not, label %if.end, label %if.then
97
98if.then:
99  store ptr null, ptr %ptr1, align 4
100  br label %if.end
101
102if.end:
103; CHECK: subs
104; CHECK: sbcs
105; CHECK: bxlt lr
106  %tobool1 = icmp ne i64 %val, 0
107  %cmp = icmp slt i64 %val, 10
108  %or.cond = and i1 %tobool1, %cmp
109  br i1 %or.cond, label %cleanup, label %if.end3
110
111if.end3:
112; CHECK: subs
113; CHECK: sbc
114  %sub = add nsw i64 %val, -10
115  store i64 %sub, ptr %ptr2, align 8
116  br label %cleanup
117
118cleanup:
119  ret void
120}
121