1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -regalloc=greedy -arm-atomic-cfg-tidy=0 < %s | FileCheck %s 3 4; LSR shouldn't introduce more induction variables than needed, increasing 5; register pressure and therefore spilling. There is more room for improvement 6; here. 7 8; CHECK: sub sp, #{{40|36|32|28|24}} 9 10; CHECK: %for.inc 11; CHECK: adds r6, #1 12; CHECK: adds r4, #24 13; CHECK: cmp r1, r6 14; CHECK: bne LBB0_3 15 16 17target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:32:64-v128:32:128-a0:0:32-n32" 18target triple = "thumbv7-apple-ios" 19 20%struct.partition_entry = type { i32, i32, i64, i64 } 21 22define i32 @partition_overlap_check(%struct.partition_entry* nocapture %part, i32 %num_entries) nounwind readonly optsize ssp "frame-pointer"="all" { 23entry: 24 %cmp79 = icmp sgt i32 %num_entries, 0 25 br i1 %cmp79, label %outer.loop, label %for.end72 26 27outer.loop: ; preds = %for.inc69, %entry 28 %overlap.081 = phi i32 [ %overlap.4, %for.inc69 ], [ 0, %entry ] 29 %0 = phi i32 [ %inc71, %for.inc69 ], [ 0, %entry ] 30 %offset = getelementptr %struct.partition_entry, %struct.partition_entry* %part, i32 %0, i32 2 31 %len = getelementptr %struct.partition_entry, %struct.partition_entry* %part, i32 %0, i32 3 32 %tmp5 = load i64, i64* %offset, align 4 33 %tmp15 = load i64, i64* %len, align 4 34 %add = add nsw i64 %tmp15, %tmp5 35 br label %inner.loop 36 37inner.loop: ; preds = %for.inc, %outer.loop 38 %overlap.178 = phi i32 [ %overlap.081, %outer.loop ], [ %overlap.4, %for.inc ] 39 %1 = phi i32 [ 0, %outer.loop ], [ %inc, %for.inc ] 40 %cmp23 = icmp eq i32 %0, %1 41 br i1 %cmp23, label %for.inc, label %if.end 42 43if.end: ; preds = %inner.loop 44 %len39 = getelementptr %struct.partition_entry, %struct.partition_entry* %part, i32 %1, i32 3 45 %offset28 = getelementptr %struct.partition_entry, %struct.partition_entry* %part, i32 %1, i32 2 46 %tmp29 = load i64, i64* %offset28, align 4 47 %tmp40 = load i64, i64* %len39, align 4 48 %add41 = add nsw i64 %tmp40, %tmp29 49 %cmp44 = icmp sge i64 %tmp29, %tmp5 50 %cmp47 = icmp slt i64 %tmp29, %add 51 %or.cond = and i1 %cmp44, %cmp47 52 %overlap.2 = select i1 %or.cond, i32 1, i32 %overlap.178 53 %cmp52 = icmp sle i64 %add41, %add 54 %cmp56 = icmp sgt i64 %add41, %tmp5 55 %or.cond74 = and i1 %cmp52, %cmp56 56 %overlap.3 = select i1 %or.cond74, i32 1, i32 %overlap.2 57 %cmp61 = icmp sgt i64 %tmp29, %tmp5 58 %cmp65 = icmp slt i64 %add41, %add 59 %or.cond75 = or i1 %cmp61, %cmp65 60 br i1 %or.cond75, label %for.inc, label %if.then66 61 62if.then66: ; preds = %if.end 63 br label %for.inc 64 65for.inc: ; preds = %if.end, %if.then66, %inner.loop 66 %overlap.4 = phi i32 [ %overlap.178, %inner.loop ], [ 1, %if.then66 ], [ %overlap.3, %if.end ] 67 %inc = add nsw i32 %1, 1 68 %exitcond = icmp eq i32 %inc, %num_entries 69 br i1 %exitcond, label %for.inc69, label %inner.loop 70 71for.inc69: ; preds = %for.inc 72 %inc71 = add nsw i32 %0, 1 73 %exitcond83 = icmp eq i32 %inc71, %num_entries 74 br i1 %exitcond83, label %for.end72, label %outer.loop 75 76for.end72: ; preds = %for.inc69, %entry 77 %overlap.0.lcssa = phi i32 [ 0, %entry ], [ %overlap.4, %for.inc69 ] 78 ret i32 %overlap.0.lcssa 79} 80