1; RUN: llc -mtriple=arm-eabi %s -o - | FileCheck %s 2; Should use scaled addressing mode. 3 4; RUN: llc -mtriple=arm-eabi -mcpu=cortex-a53 %s -o - | FileCheck %s -check-prefix CHECK-NONEGOFF-A53 5; RUN: llc -mtriple=arm-eabi -mcpu=cortex-a57 %s -o - | FileCheck %s -check-prefix CHECK-NONEGOFF-A57 6; Should not generate negated register offset 7 8define void @sintzero(i32* %a) nounwind { 9entry: 10 store i32 0, i32* %a 11 br label %cond_next 12 13cond_next: ; preds = %cond_next, %entry 14 %indvar = phi i32 [ 0, %entry ], [ %tmp25, %cond_next ] ; <i32> [#uses=1] 15 %tmp25 = add i32 %indvar, 1 ; <i32> [#uses=3] 16 %tmp36 = getelementptr i32, i32* %a, i32 %tmp25 ; <i32*> [#uses=1] 17 store i32 0, i32* %tmp36 18 icmp eq i32 %tmp25, -1 ; <i1>:0 [#uses=1] 19 br i1 %0, label %return, label %cond_next 20 21return: ; preds = %cond_next 22 ret void 23} 24 25; CHECK: lsl{{.*}}#2] 26; CHECK-NONEGOFF-A53: [{{r[0-9]+}}, {{r[0-9]+}}, lsl{{.*}}#2] 27; CHECK-NONEGOFF-A57: [{{r[0-9]+}}, {{r[0-9]+}}, lsl{{.*}}#2] 28 29