1; RUN: llc < %s -mtriple=arm-unknown | FileCheck %s 2; RUN: llc < %s -mtriple=armv6-unknown | FileCheck %s --check-prefix=CHECK-ARMv6 3 4; i8* p; // p is 1 byte aligned 5; (i32) p[0] | ((i32) p[1] << 8) | ((i32) p[2] << 16) | ((i32) p[3] << 24) 6define i32 @load_i32_by_i8_unaligned(i32* %arg) { 7; CHECK-LABEL: load_i32_by_i8_unaligned: 8; CHECK: ldrb{{.*}}r0 9; CHECK: ldrb{{.*}}r0 10; CHECK: ldrb{{.*}}r0 11; CHECK: ldrb{{.*}}r0 12; CHECK: orr 13; CHECK: mov pc, lr 14 15; CHECK-ARMv6-LABEL: load_i32_by_i8_unaligned: 16; CHECK-ARMv6: ldrb{{.*}}r0 17; CHECK-ARMv6: ldrb{{.*}}r0 18; CHECK-ARMv6: ldrb{{.*}}r0 19; CHECK-ARMv6: ldrb{{.*}}r0 20; CHECK-ARMv6: orr 21; CHECK-ARMv6: bx lr 22 %tmp = bitcast i32* %arg to i8* 23 %tmp1 = getelementptr inbounds i8, i8* %tmp, i32 0 24 %tmp2 = load i8, i8* %tmp, align 1 25 %tmp3 = zext i8 %tmp2 to i32 26 %tmp4 = getelementptr inbounds i8, i8* %tmp, i32 1 27 %tmp5 = load i8, i8* %tmp4, align 1 28 %tmp6 = zext i8 %tmp5 to i32 29 %tmp7 = shl nuw nsw i32 %tmp6, 8 30 %tmp8 = or i32 %tmp7, %tmp3 31 %tmp9 = getelementptr inbounds i8, i8* %tmp, i32 2 32 %tmp10 = load i8, i8* %tmp9, align 1 33 %tmp11 = zext i8 %tmp10 to i32 34 %tmp12 = shl nuw nsw i32 %tmp11, 16 35 %tmp13 = or i32 %tmp8, %tmp12 36 %tmp14 = getelementptr inbounds i8, i8* %tmp, i32 3 37 %tmp15 = load i8, i8* %tmp14, align 1 38 %tmp16 = zext i8 %tmp15 to i32 39 %tmp17 = shl nuw nsw i32 %tmp16, 24 40 %tmp18 = or i32 %tmp13, %tmp17 41 ret i32 %tmp18 42} 43 44; i8* p; // p is 4 byte aligned 45; (i32) p[0] | ((i32) p[1] << 8) | ((i32) p[2] << 16) | ((i32) p[3] << 24) 46define i32 @load_i32_by_i8_aligned(i32* %arg) { 47; CHECK-LABEL: load_i32_by_i8_aligned: 48; CHECK: ldr r0, [r0] 49; CHECK-NEXT: mov pc, lr 50 51; CHECK-ARMv6-LABEL: load_i32_by_i8_aligned: 52; CHECK-ARMv6: ldr r0, [r0] 53; CHECK-ARMv6-NEXT: bx lr 54 %tmp = bitcast i32* %arg to i8* 55 %tmp1 = getelementptr inbounds i8, i8* %tmp, i32 0 56 %tmp2 = load i8, i8* %tmp, align 4 57 %tmp3 = zext i8 %tmp2 to i32 58 %tmp4 = getelementptr inbounds i8, i8* %tmp, i32 1 59 %tmp5 = load i8, i8* %tmp4, align 1 60 %tmp6 = zext i8 %tmp5 to i32 61 %tmp7 = shl nuw nsw i32 %tmp6, 8 62 %tmp8 = or i32 %tmp7, %tmp3 63 %tmp9 = getelementptr inbounds i8, i8* %tmp, i32 2 64 %tmp10 = load i8, i8* %tmp9, align 1 65 %tmp11 = zext i8 %tmp10 to i32 66 %tmp12 = shl nuw nsw i32 %tmp11, 16 67 %tmp13 = or i32 %tmp8, %tmp12 68 %tmp14 = getelementptr inbounds i8, i8* %tmp, i32 3 69 %tmp15 = load i8, i8* %tmp14, align 1 70 %tmp16 = zext i8 %tmp15 to i32 71 %tmp17 = shl nuw nsw i32 %tmp16, 24 72 %tmp18 = or i32 %tmp13, %tmp17 73 ret i32 %tmp18 74} 75 76; i8* p; // p is 4 byte aligned 77; ((i32) p[0] << 24) | ((i32) p[1] << 16) | ((i32) p[2] << 8) | (i32) p[3] 78define i32 @load_i32_by_i8_bswap(i32* %arg) { 79; BSWAP is not supported by 32 bit target 80; CHECK-LABEL: load_i32_by_i8_bswap: 81; CHECK: ldr r0, [r0] 82; CHECK: and 83; CHECK-NEXT: and 84; CHECK-NEXT: orr 85; CHECK-NEXT: orr 86; CHECK-NEXT: orr 87; CHECK: mov pc, lr 88 89; CHECK-ARMv6-LABEL: load_i32_by_i8_bswap: 90; CHECK-ARMv6: ldr r0, [r0] 91; CHECK-ARMv6-NEXT: rev r0, r0 92; CHECK-ARMv6-NEXT: bx lr 93 %tmp = bitcast i32* %arg to i8* 94 %tmp1 = load i8, i8* %tmp, align 4 95 %tmp2 = zext i8 %tmp1 to i32 96 %tmp3 = shl nuw nsw i32 %tmp2, 24 97 %tmp4 = getelementptr inbounds i8, i8* %tmp, i32 1 98 %tmp5 = load i8, i8* %tmp4, align 1 99 %tmp6 = zext i8 %tmp5 to i32 100 %tmp7 = shl nuw nsw i32 %tmp6, 16 101 %tmp8 = or i32 %tmp7, %tmp3 102 %tmp9 = getelementptr inbounds i8, i8* %tmp, i32 2 103 %tmp10 = load i8, i8* %tmp9, align 1 104 %tmp11 = zext i8 %tmp10 to i32 105 %tmp12 = shl nuw nsw i32 %tmp11, 8 106 %tmp13 = or i32 %tmp8, %tmp12 107 %tmp14 = getelementptr inbounds i8, i8* %tmp, i32 3 108 %tmp15 = load i8, i8* %tmp14, align 1 109 %tmp16 = zext i8 %tmp15 to i32 110 %tmp17 = or i32 %tmp13, %tmp16 111 ret i32 %tmp17 112} 113 114; i8* p; // p is 8 byte aligned 115; (i64) p[0] | ((i64) p[1] << 8) | ((i64) p[2] << 16) | ((i64) p[3] << 24) | ((i64) p[4] << 32) | ((i64) p[5] << 40) | ((i64) p[6] << 48) | ((i64) p[7] << 56) 116define i64 @load_i64_by_i8(i64* %arg) { 117; CHECK-LABEL: load_i64_by_i8: 118; CHECK: ldr r2, [r0] 119; CHECK-NEXT: ldr r1, [r0, #4] 120; CHECK-NEXT: mov r0, r2 121; CHECK-NEXT: mov pc, lr 122 123; CHECK-ARMv6-LABEL: load_i64_by_i8: 124; CHECK-ARMv6: ldrd r0, r1, [r0] 125; CHECK-ARMv6: bx lr 126 %tmp = bitcast i64* %arg to i8* 127 %tmp1 = load i8, i8* %tmp, align 8 128 %tmp2 = zext i8 %tmp1 to i64 129 %tmp3 = getelementptr inbounds i8, i8* %tmp, i64 1 130 %tmp4 = load i8, i8* %tmp3, align 1 131 %tmp5 = zext i8 %tmp4 to i64 132 %tmp6 = shl nuw nsw i64 %tmp5, 8 133 %tmp7 = or i64 %tmp6, %tmp2 134 %tmp8 = getelementptr inbounds i8, i8* %tmp, i64 2 135 %tmp9 = load i8, i8* %tmp8, align 1 136 %tmp10 = zext i8 %tmp9 to i64 137 %tmp11 = shl nuw nsw i64 %tmp10, 16 138 %tmp12 = or i64 %tmp7, %tmp11 139 %tmp13 = getelementptr inbounds i8, i8* %tmp, i64 3 140 %tmp14 = load i8, i8* %tmp13, align 1 141 %tmp15 = zext i8 %tmp14 to i64 142 %tmp16 = shl nuw nsw i64 %tmp15, 24 143 %tmp17 = or i64 %tmp12, %tmp16 144 %tmp18 = getelementptr inbounds i8, i8* %tmp, i64 4 145 %tmp19 = load i8, i8* %tmp18, align 1 146 %tmp20 = zext i8 %tmp19 to i64 147 %tmp21 = shl nuw nsw i64 %tmp20, 32 148 %tmp22 = or i64 %tmp17, %tmp21 149 %tmp23 = getelementptr inbounds i8, i8* %tmp, i64 5 150 %tmp24 = load i8, i8* %tmp23, align 1 151 %tmp25 = zext i8 %tmp24 to i64 152 %tmp26 = shl nuw nsw i64 %tmp25, 40 153 %tmp27 = or i64 %tmp22, %tmp26 154 %tmp28 = getelementptr inbounds i8, i8* %tmp, i64 6 155 %tmp29 = load i8, i8* %tmp28, align 1 156 %tmp30 = zext i8 %tmp29 to i64 157 %tmp31 = shl nuw nsw i64 %tmp30, 48 158 %tmp32 = or i64 %tmp27, %tmp31 159 %tmp33 = getelementptr inbounds i8, i8* %tmp, i64 7 160 %tmp34 = load i8, i8* %tmp33, align 1 161 %tmp35 = zext i8 %tmp34 to i64 162 %tmp36 = shl nuw i64 %tmp35, 56 163 %tmp37 = or i64 %tmp32, %tmp36 164 ret i64 %tmp37 165} 166 167; i8* p; // p is 8 byte aligned 168; ((i64) p[0] << 56) | ((i64) p[1] << 48) | ((i64) p[2] << 40) | ((i64) p[3] << 32) | ((i64) p[4] << 24) | ((i64) p[5] << 16) | ((i64) p[6] << 8) | (i64) p[7] 169define i64 @load_i64_by_i8_bswap(i64* %arg) { 170; CHECK-LABEL: load_i64_by_i8_bswap: 171; CHECK: ldr{{.*}}r0 172; CHECK: ldr{{.*}}r0 173; CHECK: and 174; CHECK-NEXT: and 175; CHECK-NEXT: orr 176; CHECK-NEXT: orr 177; CHECK-NEXT: and 178; CHECK-NEXT: orr 179; CHECK-NEXT: and 180; CHECK-NEXT: orr 181; CHECK-NEXT: orr 182; CHECK-NEXT: orr 183; CHECK: mov pc, lr 184 185; CHECK-ARMv6-LABEL: load_i64_by_i8_bswap: 186; CHECK-ARMv6: ldrd r2, r3, [r0] 187; CHECK-ARMv6: rev r0, r3 188; CHECK-ARMv6: rev r1, r2 189; CHECK-ARMv6: bx lr 190 %tmp = bitcast i64* %arg to i8* 191 %tmp1 = load i8, i8* %tmp, align 8 192 %tmp2 = zext i8 %tmp1 to i64 193 %tmp3 = shl nuw i64 %tmp2, 56 194 %tmp4 = getelementptr inbounds i8, i8* %tmp, i64 1 195 %tmp5 = load i8, i8* %tmp4, align 1 196 %tmp6 = zext i8 %tmp5 to i64 197 %tmp7 = shl nuw nsw i64 %tmp6, 48 198 %tmp8 = or i64 %tmp7, %tmp3 199 %tmp9 = getelementptr inbounds i8, i8* %tmp, i64 2 200 %tmp10 = load i8, i8* %tmp9, align 1 201 %tmp11 = zext i8 %tmp10 to i64 202 %tmp12 = shl nuw nsw i64 %tmp11, 40 203 %tmp13 = or i64 %tmp8, %tmp12 204 %tmp14 = getelementptr inbounds i8, i8* %tmp, i64 3 205 %tmp15 = load i8, i8* %tmp14, align 1 206 %tmp16 = zext i8 %tmp15 to i64 207 %tmp17 = shl nuw nsw i64 %tmp16, 32 208 %tmp18 = or i64 %tmp13, %tmp17 209 %tmp19 = getelementptr inbounds i8, i8* %tmp, i64 4 210 %tmp20 = load i8, i8* %tmp19, align 1 211 %tmp21 = zext i8 %tmp20 to i64 212 %tmp22 = shl nuw nsw i64 %tmp21, 24 213 %tmp23 = or i64 %tmp18, %tmp22 214 %tmp24 = getelementptr inbounds i8, i8* %tmp, i64 5 215 %tmp25 = load i8, i8* %tmp24, align 1 216 %tmp26 = zext i8 %tmp25 to i64 217 %tmp27 = shl nuw nsw i64 %tmp26, 16 218 %tmp28 = or i64 %tmp23, %tmp27 219 %tmp29 = getelementptr inbounds i8, i8* %tmp, i64 6 220 %tmp30 = load i8, i8* %tmp29, align 1 221 %tmp31 = zext i8 %tmp30 to i64 222 %tmp32 = shl nuw nsw i64 %tmp31, 8 223 %tmp33 = or i64 %tmp28, %tmp32 224 %tmp34 = getelementptr inbounds i8, i8* %tmp, i64 7 225 %tmp35 = load i8, i8* %tmp34, align 1 226 %tmp36 = zext i8 %tmp35 to i64 227 %tmp37 = or i64 %tmp33, %tmp36 228 ret i64 %tmp37 229} 230 231; i8* p; // p[1] is 4 byte aligned 232; (i32) p[1] | ((i32) p[2] << 8) | ((i32) p[3] << 16) | ((i32) p[4] << 24) 233define i32 @load_i32_by_i8_nonzero_offset(i32* %arg) { 234; CHECK-LABEL: load_i32_by_i8_nonzero_offset: 235; CHECK: ldr r0, [r0, #1] 236; CHECK-NEXT: mov pc, lr 237 238; CHECK-ARMv6-LABEL: load_i32_by_i8_nonzero_offset: 239; CHECK-ARMv6: ldr r0, [r0, #1] 240; CHECK-ARMv6-NEXT: bx lr 241 242 %tmp = bitcast i32* %arg to i8* 243 %tmp1 = getelementptr inbounds i8, i8* %tmp, i32 1 244 %tmp2 = load i8, i8* %tmp1, align 4 245 %tmp3 = zext i8 %tmp2 to i32 246 %tmp4 = getelementptr inbounds i8, i8* %tmp, i32 2 247 %tmp5 = load i8, i8* %tmp4, align 1 248 %tmp6 = zext i8 %tmp5 to i32 249 %tmp7 = shl nuw nsw i32 %tmp6, 8 250 %tmp8 = or i32 %tmp7, %tmp3 251 %tmp9 = getelementptr inbounds i8, i8* %tmp, i32 3 252 %tmp10 = load i8, i8* %tmp9, align 1 253 %tmp11 = zext i8 %tmp10 to i32 254 %tmp12 = shl nuw nsw i32 %tmp11, 16 255 %tmp13 = or i32 %tmp8, %tmp12 256 %tmp14 = getelementptr inbounds i8, i8* %tmp, i32 4 257 %tmp15 = load i8, i8* %tmp14, align 1 258 %tmp16 = zext i8 %tmp15 to i32 259 %tmp17 = shl nuw nsw i32 %tmp16, 24 260 %tmp18 = or i32 %tmp13, %tmp17 261 ret i32 %tmp18 262} 263 264; i8* p; // p[-4] is 4 byte aligned 265; (i32) p[-4] | ((i32) p[-3] << 8) | ((i32) p[-2] << 16) | ((i32) p[-1] << 24) 266define i32 @load_i32_by_i8_neg_offset(i32* %arg) { 267; CHECK-LABEL: load_i32_by_i8_neg_offset: 268; CHECK: ldr r0, [r0, #-4] 269; CHECK-NEXT: mov pc, lr 270 271; CHECK-ARMv6-LABEL: load_i32_by_i8_neg_offset: 272; CHECK-ARMv6: ldr r0, [r0, #-4] 273; CHECK-ARMv6-NEXT: bx lr 274 275 %tmp = bitcast i32* %arg to i8* 276 %tmp1 = getelementptr inbounds i8, i8* %tmp, i32 -4 277 %tmp2 = load i8, i8* %tmp1, align 4 278 %tmp3 = zext i8 %tmp2 to i32 279 %tmp4 = getelementptr inbounds i8, i8* %tmp, i32 -3 280 %tmp5 = load i8, i8* %tmp4, align 1 281 %tmp6 = zext i8 %tmp5 to i32 282 %tmp7 = shl nuw nsw i32 %tmp6, 8 283 %tmp8 = or i32 %tmp7, %tmp3 284 %tmp9 = getelementptr inbounds i8, i8* %tmp, i32 -2 285 %tmp10 = load i8, i8* %tmp9, align 1 286 %tmp11 = zext i8 %tmp10 to i32 287 %tmp12 = shl nuw nsw i32 %tmp11, 16 288 %tmp13 = or i32 %tmp8, %tmp12 289 %tmp14 = getelementptr inbounds i8, i8* %tmp, i32 -1 290 %tmp15 = load i8, i8* %tmp14, align 1 291 %tmp16 = zext i8 %tmp15 to i32 292 %tmp17 = shl nuw nsw i32 %tmp16, 24 293 %tmp18 = or i32 %tmp13, %tmp17 294 ret i32 %tmp18 295} 296 297; i8* p; // p[1] is 4 byte aligned 298; (i32) p[4] | ((i32) p[3] << 8) | ((i32) p[2] << 16) | ((i32) p[1] << 24) 299define i32 @load_i32_by_i8_nonzero_offset_bswap(i32* %arg) { 300; CHECK-LABEL: load_i32_by_i8_nonzero_offset_bswap: 301; CHECK: ldr r0, [r0, #1] 302; CHECK-NEXT: mov r1, #65280 303; CHECK-NEXT: mov r2, #16711680 304; CHECK-NEXT: and r1, r1, r0, lsr #8 305; CHECK-NEXT: and r2, r2, r0, lsl #8 306; CHECK-NEXT: orr r1, r1, r0, lsr #24 307; CHECK-NEXT: orr r0, r2, r0, lsl #24 308; CHECK-NEXT: orr r0, r0, r1 309; CHECK-NEXT: mov pc, lr 310 311; CHECK-ARMv6-LABEL: load_i32_by_i8_nonzero_offset_bswap: 312; CHECK-ARMv6: ldr r0, [r0, #1] 313; CHECK-ARMv6-NEXT: rev r0, r0 314; CHECK-ARMv6-NEXT: bx lr 315 316 %tmp = bitcast i32* %arg to i8* 317 %tmp1 = getelementptr inbounds i8, i8* %tmp, i32 4 318 %tmp2 = load i8, i8* %tmp1, align 1 319 %tmp3 = zext i8 %tmp2 to i32 320 %tmp4 = getelementptr inbounds i8, i8* %tmp, i32 3 321 %tmp5 = load i8, i8* %tmp4, align 1 322 %tmp6 = zext i8 %tmp5 to i32 323 %tmp7 = shl nuw nsw i32 %tmp6, 8 324 %tmp8 = or i32 %tmp7, %tmp3 325 %tmp9 = getelementptr inbounds i8, i8* %tmp, i32 2 326 %tmp10 = load i8, i8* %tmp9, align 1 327 %tmp11 = zext i8 %tmp10 to i32 328 %tmp12 = shl nuw nsw i32 %tmp11, 16 329 %tmp13 = or i32 %tmp8, %tmp12 330 %tmp14 = getelementptr inbounds i8, i8* %tmp, i32 1 331 %tmp15 = load i8, i8* %tmp14, align 4 332 %tmp16 = zext i8 %tmp15 to i32 333 %tmp17 = shl nuw nsw i32 %tmp16, 24 334 %tmp18 = or i32 %tmp13, %tmp17 335 ret i32 %tmp18 336} 337 338; i8* p; // p[-4] is 4 byte aligned 339; (i32) p[-1] | ((i32) p[-2] << 8) | ((i32) p[-3] << 16) | ((i32) p[-4] << 24) 340define i32 @load_i32_by_i8_neg_offset_bswap(i32* %arg) { 341; CHECK-LABEL: load_i32_by_i8_neg_offset_bswap: 342; CHECK: ldr r0, [r0, #-4] 343; CHECK-NEXT: mov r1, #65280 344; CHECK-NEXT: mov r2, #16711680 345; CHECK-NEXT: and r1, r1, r0, lsr #8 346; CHECK-NEXT: and r2, r2, r0, lsl #8 347; CHECK-NEXT: orr r1, r1, r0, lsr #24 348; CHECK-NEXT: orr r0, r2, r0, lsl #24 349; CHECK-NEXT: orr r0, r0, r1 350; CHECK-NEXT: mov pc, lr 351 352; CHECK-ARMv6-LABEL: load_i32_by_i8_neg_offset_bswap: 353; CHECK-ARMv6: ldr r0, [r0, #-4] 354; CHECK-ARMv6-NEXT: rev r0, r0 355; CHECK-ARMv6-NEXT: bx lr 356 357 %tmp = bitcast i32* %arg to i8* 358 %tmp1 = getelementptr inbounds i8, i8* %tmp, i32 -1 359 %tmp2 = load i8, i8* %tmp1, align 1 360 %tmp3 = zext i8 %tmp2 to i32 361 %tmp4 = getelementptr inbounds i8, i8* %tmp, i32 -2 362 %tmp5 = load i8, i8* %tmp4, align 1 363 %tmp6 = zext i8 %tmp5 to i32 364 %tmp7 = shl nuw nsw i32 %tmp6, 8 365 %tmp8 = or i32 %tmp7, %tmp3 366 %tmp9 = getelementptr inbounds i8, i8* %tmp, i32 -3 367 %tmp10 = load i8, i8* %tmp9, align 1 368 %tmp11 = zext i8 %tmp10 to i32 369 %tmp12 = shl nuw nsw i32 %tmp11, 16 370 %tmp13 = or i32 %tmp8, %tmp12 371 %tmp14 = getelementptr inbounds i8, i8* %tmp, i32 -4 372 %tmp15 = load i8, i8* %tmp14, align 4 373 %tmp16 = zext i8 %tmp15 to i32 374 %tmp17 = shl nuw nsw i32 %tmp16, 24 375 %tmp18 = or i32 %tmp13, %tmp17 376 ret i32 %tmp18 377} 378 379declare i16 @llvm.bswap.i16(i16) 380 381; i16* p; // p is 4 byte aligned 382; (i32) bswap(p[1]) | (i32) bswap(p[0] << 16) 383define i32 @load_i32_by_bswap_i16(i32* %arg) { 384; CHECK-LABEL: load_i32_by_bswap_i16: 385; CHECK: ldr r0, [r0] 386; CHECK-NEXT: mov r1, #65280 387; CHECK-NEXT: mov r2, #16711680 388; CHECK-NEXT: and r1, r1, r0, lsr #8 389; CHECK-NEXT: and r2, r2, r0, lsl #8 390; CHECK-NEXT: orr r1, r1, r0, lsr #24 391; CHECK-NEXT: orr r0, r2, r0, lsl #24 392; CHECK-NEXT: orr r0, r0, r1 393; CHECK-NEXT: mov pc, lr 394 395; CHECK-ARMv6-LABEL: load_i32_by_bswap_i16: 396; CHECK-ARMv6: ldr r0, [r0] 397; CHECK-ARMv6-NEXT: rev r0, r0 398; CHECK-ARMv6-NEXT: bx lr 399 400 %tmp = bitcast i32* %arg to i16* 401 %tmp1 = load i16, i16* %tmp, align 4 402 %tmp11 = call i16 @llvm.bswap.i16(i16 %tmp1) 403 %tmp2 = zext i16 %tmp11 to i32 404 %tmp3 = getelementptr inbounds i16, i16* %tmp, i32 1 405 %tmp4 = load i16, i16* %tmp3, align 1 406 %tmp41 = call i16 @llvm.bswap.i16(i16 %tmp4) 407 %tmp5 = zext i16 %tmp41 to i32 408 %tmp6 = shl nuw nsw i32 %tmp2, 16 409 %tmp7 = or i32 %tmp6, %tmp5 410 ret i32 %tmp7 411} 412 413; i16* p; 414; (i32) p[0] | (sext(p[1] << 16) to i32) 415define i32 @load_i32_by_sext_i16(i32* %arg) { 416; CHECK-LABEL: load_i32_by_sext_i16: 417; CHECK: ldrh r1, [r0, #2] 418; CHECK-NEXT: ldrh r0, [r0] 419; CHECK-NEXT: orr r0, r0, r1, lsl #16 420; CHECK-NEXT: mov pc, lr 421; 422; CHECK-ARMv6-LABEL: load_i32_by_sext_i16: 423; CHECK-ARMv6: ldrh r1, [r0, #2] 424; CHECK-ARMv6-NEXT: ldrh r0, [r0] 425; CHECK-ARMv6-NEXT: orr r0, r0, r1, lsl #16 426; CHECK-ARMv6-NEXT: bx lr 427 428 %tmp = bitcast i32* %arg to i16* 429 %tmp1 = load i16, i16* %tmp, align 4 430 %tmp2 = zext i16 %tmp1 to i32 431 %tmp3 = getelementptr inbounds i16, i16* %tmp, i32 1 432 %tmp4 = load i16, i16* %tmp3, align 1 433 %tmp5 = sext i16 %tmp4 to i32 434 %tmp6 = shl nuw nsw i32 %tmp5, 16 435 %tmp7 = or i32 %tmp6, %tmp2 436 ret i32 %tmp7 437} 438 439; i8* arg; i32 i; 440; p = arg + 12; 441; (i32) p[i] | ((i32) p[i + 1] << 8) | ((i32) p[i + 2] << 16) | ((i32) p[i + 3] << 24) 442define i32 @load_i32_by_i8_base_offset_index(i8* %arg, i32 %i) { 443; CHECK-LABEL: load_i32_by_i8_base_offset_index: 444; CHECK: add r0, r0, r1 445; CHECK-NEXT: ldr r0, [r0, #12] 446; CHECK-NEXT: mov pc, lr 447; 448; CHECK-ARMv6-LABEL: load_i32_by_i8_base_offset_index: 449; CHECK-ARMv6: add r0, r0, r1 450; CHECK-ARMv6-NEXT: ldr r0, [r0, #12] 451; CHECK-ARMv6-NEXT: bx lr 452 453 %tmp = add nuw nsw i32 %i, 3 454 %tmp2 = add nuw nsw i32 %i, 2 455 %tmp3 = add nuw nsw i32 %i, 1 456 %tmp4 = getelementptr inbounds i8, i8* %arg, i64 12 457 %tmp5 = zext i32 %i to i64 458 %tmp6 = getelementptr inbounds i8, i8* %tmp4, i64 %tmp5 459 %tmp7 = load i8, i8* %tmp6, align 4 460 %tmp8 = zext i8 %tmp7 to i32 461 %tmp9 = zext i32 %tmp3 to i64 462 %tmp10 = getelementptr inbounds i8, i8* %tmp4, i64 %tmp9 463 %tmp11 = load i8, i8* %tmp10, align 1 464 %tmp12 = zext i8 %tmp11 to i32 465 %tmp13 = shl nuw nsw i32 %tmp12, 8 466 %tmp14 = or i32 %tmp13, %tmp8 467 %tmp15 = zext i32 %tmp2 to i64 468 %tmp16 = getelementptr inbounds i8, i8* %tmp4, i64 %tmp15 469 %tmp17 = load i8, i8* %tmp16, align 1 470 %tmp18 = zext i8 %tmp17 to i32 471 %tmp19 = shl nuw nsw i32 %tmp18, 16 472 %tmp20 = or i32 %tmp14, %tmp19 473 %tmp21 = zext i32 %tmp to i64 474 %tmp22 = getelementptr inbounds i8, i8* %tmp4, i64 %tmp21 475 %tmp23 = load i8, i8* %tmp22, align 1 476 %tmp24 = zext i8 %tmp23 to i32 477 %tmp25 = shl nuw i32 %tmp24, 24 478 %tmp26 = or i32 %tmp20, %tmp25 479 ret i32 %tmp26 480} 481 482; i8* arg; i32 i; 483; p = arg + 12; 484; (i32) p[i + 1] | ((i32) p[i + 2] << 8) | ((i32) p[i + 3] << 16) | ((i32) p[i + 4] << 24) 485define i32 @load_i32_by_i8_base_offset_index_2(i8* %arg, i32 %i) { 486; CHECK-LABEL: load_i32_by_i8_base_offset_index_2: 487; CHECK: add r0, r0, r1 488; CHECK-NEXT: ldr r0, [r0, #13] 489; CHECK-NEXT: mov pc, lr 490; 491; CHECK-ARMv6-LABEL: load_i32_by_i8_base_offset_index_2: 492; CHECK-ARMv6: add r0, r0, r1 493; CHECK-ARMv6-NEXT: ldr r0, [r0, #13] 494; CHECK-ARMv6-NEXT: bx lr 495 496 %tmp = add nuw nsw i32 %i, 4 497 %tmp2 = add nuw nsw i32 %i, 3 498 %tmp3 = add nuw nsw i32 %i, 2 499 %tmp4 = getelementptr inbounds i8, i8* %arg, i64 12 500 %tmp5 = add nuw nsw i32 %i, 1 501 %tmp27 = zext i32 %tmp5 to i64 502 %tmp28 = getelementptr inbounds i8, i8* %tmp4, i64 %tmp27 503 %tmp29 = load i8, i8* %tmp28, align 4 504 %tmp30 = zext i8 %tmp29 to i32 505 %tmp31 = zext i32 %tmp3 to i64 506 %tmp32 = getelementptr inbounds i8, i8* %tmp4, i64 %tmp31 507 %tmp33 = load i8, i8* %tmp32, align 1 508 %tmp34 = zext i8 %tmp33 to i32 509 %tmp35 = shl nuw nsw i32 %tmp34, 8 510 %tmp36 = or i32 %tmp35, %tmp30 511 %tmp37 = zext i32 %tmp2 to i64 512 %tmp38 = getelementptr inbounds i8, i8* %tmp4, i64 %tmp37 513 %tmp39 = load i8, i8* %tmp38, align 1 514 %tmp40 = zext i8 %tmp39 to i32 515 %tmp41 = shl nuw nsw i32 %tmp40, 16 516 %tmp42 = or i32 %tmp36, %tmp41 517 %tmp43 = zext i32 %tmp to i64 518 %tmp44 = getelementptr inbounds i8, i8* %tmp4, i64 %tmp43 519 %tmp45 = load i8, i8* %tmp44, align 1 520 %tmp46 = zext i8 %tmp45 to i32 521 %tmp47 = shl nuw i32 %tmp46, 24 522 %tmp48 = or i32 %tmp42, %tmp47 523 ret i32 %tmp48 524} 525 526; i8* p; // p is 2 byte aligned 527; (i32) p[0] | ((i32) p[1] << 8) 528define i32 @zext_load_i32_by_i8(i32* %arg) { 529; CHECK-LABEL: zext_load_i32_by_i8: 530; CHECK: ldrb r1, [r0] 531; CHECK-NEXT: ldrb r0, [r0, #1] 532; CHECK-NEXT: orr r0, r1, r0, lsl #8 533; CHECK-NEXT: mov pc, lr 534; 535; CHECK-ARMv6-LABEL: zext_load_i32_by_i8: 536; CHECK-ARMv6: ldrb r1, [r0] 537; CHECK-ARMv6-NEXT: ldrb r0, [r0, #1] 538; CHECK-ARMv6-NEXT: orr r0, r1, r0, lsl #8 539; CHECK-ARMv6-NEXT: bx lr 540 541 %tmp = bitcast i32* %arg to i8* 542 %tmp1 = getelementptr inbounds i8, i8* %tmp, i32 0 543 %tmp2 = load i8, i8* %tmp1, align 2 544 %tmp3 = zext i8 %tmp2 to i32 545 %tmp4 = getelementptr inbounds i8, i8* %tmp, i32 1 546 %tmp5 = load i8, i8* %tmp4, align 1 547 %tmp6 = zext i8 %tmp5 to i32 548 %tmp7 = shl nuw nsw i32 %tmp6, 8 549 %tmp8 = or i32 %tmp7, %tmp3 550 ret i32 %tmp8 551} 552 553; i8* p; // p is 2 byte aligned 554; ((i32) p[0] << 8) | ((i32) p[1] << 16) 555define i32 @zext_load_i32_by_i8_shl_8(i32* %arg) { 556; CHECK-LABEL: zext_load_i32_by_i8_shl_8: 557; CHECK: ldrb r1, [r0] 558; CHECK-NEXT: ldrb r0, [r0, #1] 559; CHECK-NEXT: lsl r0, r0, #16 560; CHECK-NEXT: orr r0, r0, r1, lsl #8 561; CHECK-NEXT: mov pc, lr 562; 563; CHECK-ARMv6-LABEL: zext_load_i32_by_i8_shl_8: 564; CHECK-ARMv6: ldrb r1, [r0] 565; CHECK-ARMv6-NEXT: ldrb r0, [r0, #1] 566; CHECK-ARMv6-NEXT: lsl r0, r0, #16 567; CHECK-ARMv6-NEXT: orr r0, r0, r1, lsl #8 568; CHECK-ARMv6-NEXT: bx lr 569 570 %tmp = bitcast i32* %arg to i8* 571 %tmp1 = getelementptr inbounds i8, i8* %tmp, i32 0 572 %tmp2 = load i8, i8* %tmp1, align 2 573 %tmp3 = zext i8 %tmp2 to i32 574 %tmp30 = shl nuw nsw i32 %tmp3, 8 575 %tmp4 = getelementptr inbounds i8, i8* %tmp, i32 1 576 %tmp5 = load i8, i8* %tmp4, align 1 577 %tmp6 = zext i8 %tmp5 to i32 578 %tmp7 = shl nuw nsw i32 %tmp6, 16 579 %tmp8 = or i32 %tmp7, %tmp30 580 ret i32 %tmp8 581} 582 583; i8* p; // p is 2 byte aligned 584; ((i32) p[0] << 16) | ((i32) p[1] << 24) 585define i32 @zext_load_i32_by_i8_shl_16(i32* %arg) { 586; CHECK-LABEL: zext_load_i32_by_i8_shl_16: 587; CHECK: ldrb r1, [r0] 588; CHECK-NEXT: ldrb r0, [r0, #1] 589; CHECK-NEXT: lsl r0, r0, #24 590; CHECK-NEXT: orr r0, r0, r1, lsl #16 591; CHECK-NEXT: mov pc, lr 592; 593; CHECK-ARMv6-LABEL: zext_load_i32_by_i8_shl_16: 594; CHECK-ARMv6: ldrb r1, [r0] 595; CHECK-ARMv6-NEXT: ldrb r0, [r0, #1] 596; CHECK-ARMv6-NEXT: lsl r0, r0, #24 597; CHECK-ARMv6-NEXT: orr r0, r0, r1, lsl #16 598; CHECK-ARMv6-NEXT: bx lr 599 600 %tmp = bitcast i32* %arg to i8* 601 %tmp1 = getelementptr inbounds i8, i8* %tmp, i32 0 602 %tmp2 = load i8, i8* %tmp1, align 2 603 %tmp3 = zext i8 %tmp2 to i32 604 %tmp30 = shl nuw nsw i32 %tmp3, 16 605 %tmp4 = getelementptr inbounds i8, i8* %tmp, i32 1 606 %tmp5 = load i8, i8* %tmp4, align 1 607 %tmp6 = zext i8 %tmp5 to i32 608 %tmp7 = shl nuw nsw i32 %tmp6, 24 609 %tmp8 = or i32 %tmp7, %tmp30 610 ret i32 %tmp8 611} 612 613; i8* p; // p is 2 byte aligned 614; (i32) p[1] | ((i32) p[0] << 8) 615define i32 @zext_load_i32_by_i8_bswap(i32* %arg) { 616; CHECK-LABEL: zext_load_i32_by_i8_bswap: 617; CHECK: ldrb r1, [r0] 618; CHECK-NEXT: ldrb r0, [r0, #1] 619; CHECK-NEXT: orr r0, r0, r1, lsl #8 620; CHECK-NEXT: mov pc, lr 621; 622; CHECK-ARMv6-LABEL: zext_load_i32_by_i8_bswap: 623; CHECK-ARMv6: ldrb r1, [r0] 624; CHECK-ARMv6-NEXT: ldrb r0, [r0, #1] 625; CHECK-ARMv6-NEXT: orr r0, r0, r1, lsl #8 626; CHECK-ARMv6-NEXT: bx lr 627 628 %tmp = bitcast i32* %arg to i8* 629 %tmp1 = getelementptr inbounds i8, i8* %tmp, i32 1 630 %tmp2 = load i8, i8* %tmp1, align 1 631 %tmp3 = zext i8 %tmp2 to i32 632 %tmp4 = getelementptr inbounds i8, i8* %tmp, i32 0 633 %tmp5 = load i8, i8* %tmp4, align 2 634 %tmp6 = zext i8 %tmp5 to i32 635 %tmp7 = shl nuw nsw i32 %tmp6, 8 636 %tmp8 = or i32 %tmp7, %tmp3 637 ret i32 %tmp8 638} 639 640; i8* p; // p is 2 byte aligned 641; ((i32) p[1] << 8) | ((i32) p[0] << 16) 642define i32 @zext_load_i32_by_i8_bswap_shl_8(i32* %arg) { 643; CHECK-LABEL: zext_load_i32_by_i8_bswap_shl_8: 644; CHECK: ldrb r1, [r0] 645; CHECK-NEXT: ldrb r0, [r0, #1] 646; CHECK-NEXT: lsl r1, r1, #16 647; CHECK-NEXT: orr r0, r1, r0, lsl #8 648; CHECK-NEXT: mov pc, lr 649; 650; CHECK-ARMv6-LABEL: zext_load_i32_by_i8_bswap_shl_8: 651; CHECK-ARMv6: ldrb r1, [r0] 652; CHECK-ARMv6-NEXT: ldrb r0, [r0, #1] 653; CHECK-ARMv6-NEXT: lsl r1, r1, #16 654; CHECK-ARMv6-NEXT: orr r0, r1, r0, lsl #8 655; CHECK-ARMv6-NEXT: bx lr 656 657 %tmp = bitcast i32* %arg to i8* 658 %tmp1 = getelementptr inbounds i8, i8* %tmp, i32 1 659 %tmp2 = load i8, i8* %tmp1, align 1 660 %tmp3 = zext i8 %tmp2 to i32 661 %tmp30 = shl nuw nsw i32 %tmp3, 8 662 %tmp4 = getelementptr inbounds i8, i8* %tmp, i32 0 663 %tmp5 = load i8, i8* %tmp4, align 2 664 %tmp6 = zext i8 %tmp5 to i32 665 %tmp7 = shl nuw nsw i32 %tmp6, 16 666 %tmp8 = or i32 %tmp7, %tmp30 667 ret i32 %tmp8 668} 669 670; i8* p; // p is 2 byte aligned 671; ((i32) p[1] << 16) | ((i32) p[0] << 24) 672define i32 @zext_load_i32_by_i8_bswap_shl_16(i32* %arg) { 673; CHECK-LABEL: zext_load_i32_by_i8_bswap_shl_16: 674; CHECK: ldrb r1, [r0] 675; CHECK-NEXT: ldrb r0, [r0, #1] 676; CHECK-NEXT: lsl r1, r1, #24 677; CHECK-NEXT: orr r0, r1, r0, lsl #16 678; CHECK-NEXT: mov pc, lr 679; 680; CHECK-ARMv6-LABEL: zext_load_i32_by_i8_bswap_shl_16: 681; CHECK-ARMv6: ldrb r1, [r0] 682; CHECK-ARMv6-NEXT: ldrb r0, [r0, #1] 683; CHECK-ARMv6-NEXT: lsl r1, r1, #24 684; CHECK-ARMv6-NEXT: orr r0, r1, r0, lsl #16 685; CHECK-ARMv6-NEXT: bx lr 686 687 %tmp = bitcast i32* %arg to i8* 688 %tmp1 = getelementptr inbounds i8, i8* %tmp, i32 1 689 %tmp2 = load i8, i8* %tmp1, align 1 690 %tmp3 = zext i8 %tmp2 to i32 691 %tmp30 = shl nuw nsw i32 %tmp3, 16 692 %tmp4 = getelementptr inbounds i8, i8* %tmp, i32 0 693 %tmp5 = load i8, i8* %tmp4, align 2 694 %tmp6 = zext i8 %tmp5 to i32 695 %tmp7 = shl nuw nsw i32 %tmp6, 24 696 %tmp8 = or i32 %tmp7, %tmp30 697 ret i32 %tmp8 698} 699