1; RUN: llc < %s -mtriple=arm-unknown | FileCheck %s 2; RUN: llc < %s -mtriple=armv6-unknown | FileCheck %s --check-prefix=CHECK-ARMv6 3 4; i8* p; // p is 1 byte aligned 5; (i32) p[0] | ((i32) p[1] << 8) | ((i32) p[2] << 16) | ((i32) p[3] << 24) 6define i32 @load_i32_by_i8_unaligned(i32* %arg) { 7; CHECK-LABEL: load_i32_by_i8_unaligned: 8; CHECK: ldrb{{.*}}r0 9; CHECK: ldrb{{.*}}r0 10; CHECK: ldrb{{.*}}r0 11; CHECK: ldrb{{.*}}r0 12; CHECK: orr 13; CHECK: mov pc, lr 14 15; CHECK-ARMv6-LABEL: load_i32_by_i8_unaligned: 16; CHECK-ARMv6: ldrb{{.*}}r0 17; CHECK-ARMv6: ldrb{{.*}}r0 18; CHECK-ARMv6: ldrb{{.*}}r0 19; CHECK-ARMv6: ldrb{{.*}}r0 20; CHECK-ARMv6: orr 21; CHECK-ARMv6: bx lr 22 %tmp = bitcast i32* %arg to i8* 23 %tmp1 = getelementptr inbounds i8, i8* %tmp, i32 0 24 %tmp2 = load i8, i8* %tmp, align 1 25 %tmp3 = zext i8 %tmp2 to i32 26 %tmp4 = getelementptr inbounds i8, i8* %tmp, i32 1 27 %tmp5 = load i8, i8* %tmp4, align 1 28 %tmp6 = zext i8 %tmp5 to i32 29 %tmp7 = shl nuw nsw i32 %tmp6, 8 30 %tmp8 = or i32 %tmp7, %tmp3 31 %tmp9 = getelementptr inbounds i8, i8* %tmp, i32 2 32 %tmp10 = load i8, i8* %tmp9, align 1 33 %tmp11 = zext i8 %tmp10 to i32 34 %tmp12 = shl nuw nsw i32 %tmp11, 16 35 %tmp13 = or i32 %tmp8, %tmp12 36 %tmp14 = getelementptr inbounds i8, i8* %tmp, i32 3 37 %tmp15 = load i8, i8* %tmp14, align 1 38 %tmp16 = zext i8 %tmp15 to i32 39 %tmp17 = shl nuw nsw i32 %tmp16, 24 40 %tmp18 = or i32 %tmp13, %tmp17 41 ret i32 %tmp18 42} 43 44; i8* p; // p is 4 byte aligned 45; (i32) p[0] | ((i32) p[1] << 8) | ((i32) p[2] << 16) | ((i32) p[3] << 24) 46define i32 @load_i32_by_i8_aligned(i32* %arg) { 47; CHECK-LABEL: load_i32_by_i8_aligned: 48; CHECK: ldr r0, [r0] 49; CHECK-NEXT: mov pc, lr 50 51; CHECK-ARMv6-LABEL: load_i32_by_i8_aligned: 52; CHECK-ARMv6: ldr r0, [r0] 53; CHECK-ARMv6-NEXT: bx lr 54 %tmp = bitcast i32* %arg to i8* 55 %tmp1 = getelementptr inbounds i8, i8* %tmp, i32 0 56 %tmp2 = load i8, i8* %tmp, align 4 57 %tmp3 = zext i8 %tmp2 to i32 58 %tmp4 = getelementptr inbounds i8, i8* %tmp, i32 1 59 %tmp5 = load i8, i8* %tmp4, align 1 60 %tmp6 = zext i8 %tmp5 to i32 61 %tmp7 = shl nuw nsw i32 %tmp6, 8 62 %tmp8 = or i32 %tmp7, %tmp3 63 %tmp9 = getelementptr inbounds i8, i8* %tmp, i32 2 64 %tmp10 = load i8, i8* %tmp9, align 1 65 %tmp11 = zext i8 %tmp10 to i32 66 %tmp12 = shl nuw nsw i32 %tmp11, 16 67 %tmp13 = or i32 %tmp8, %tmp12 68 %tmp14 = getelementptr inbounds i8, i8* %tmp, i32 3 69 %tmp15 = load i8, i8* %tmp14, align 1 70 %tmp16 = zext i8 %tmp15 to i32 71 %tmp17 = shl nuw nsw i32 %tmp16, 24 72 %tmp18 = or i32 %tmp13, %tmp17 73 ret i32 %tmp18 74} 75 76; i8* p; // p is 4 byte aligned 77; ((i32) p[0] << 24) | ((i32) p[1] << 16) | ((i32) p[2] << 8) | (i32) p[3] 78define i32 @load_i32_by_i8_bswap(i32* %arg) { 79; BSWAP is not supported by 32 bit target 80; CHECK-LABEL: load_i32_by_i8_bswap: 81; CHECK: ldr r0, [r0] 82; CHECK: and 83; CHECK-NEXT: and 84; CHECK-NEXT: orr 85; CHECK-NEXT: orr 86; CHECK-NEXT: orr 87; CHECK: mov pc, lr 88 89; CHECK-ARMv6-LABEL: load_i32_by_i8_bswap: 90; CHECK-ARMv6: ldr r0, [r0] 91; CHECK-ARMv6-NEXT: rev r0, r0 92; CHECK-ARMv6-NEXT: bx lr 93 %tmp = bitcast i32* %arg to i8* 94 %tmp1 = load i8, i8* %tmp, align 4 95 %tmp2 = zext i8 %tmp1 to i32 96 %tmp3 = shl nuw nsw i32 %tmp2, 24 97 %tmp4 = getelementptr inbounds i8, i8* %tmp, i32 1 98 %tmp5 = load i8, i8* %tmp4, align 1 99 %tmp6 = zext i8 %tmp5 to i32 100 %tmp7 = shl nuw nsw i32 %tmp6, 16 101 %tmp8 = or i32 %tmp7, %tmp3 102 %tmp9 = getelementptr inbounds i8, i8* %tmp, i32 2 103 %tmp10 = load i8, i8* %tmp9, align 1 104 %tmp11 = zext i8 %tmp10 to i32 105 %tmp12 = shl nuw nsw i32 %tmp11, 8 106 %tmp13 = or i32 %tmp8, %tmp12 107 %tmp14 = getelementptr inbounds i8, i8* %tmp, i32 3 108 %tmp15 = load i8, i8* %tmp14, align 1 109 %tmp16 = zext i8 %tmp15 to i32 110 %tmp17 = or i32 %tmp13, %tmp16 111 ret i32 %tmp17 112} 113 114; i8* p; // p is 8 byte aligned 115; (i64) p[0] | ((i64) p[1] << 8) | ((i64) p[2] << 16) | ((i64) p[3] << 24) | ((i64) p[4] << 32) | ((i64) p[5] << 40) | ((i64) p[6] << 48) | ((i64) p[7] << 56) 116define i64 @load_i64_by_i8(i64* %arg) { 117; CHECK-LABEL: load_i64_by_i8: 118; CHECK: ldr r2, [r0] 119; CHECK-NEXT: ldr r1, [r0, #4] 120; CHECK-NEXT: mov r0, r2 121; CHECK-NEXT: mov pc, lr 122 123; CHECK-ARMv6-LABEL: load_i64_by_i8: 124; CHECK-ARMv6: ldrd r0, r1, [r0] 125; CHECK-ARMv6: bx lr 126 %tmp = bitcast i64* %arg to i8* 127 %tmp1 = load i8, i8* %tmp, align 8 128 %tmp2 = zext i8 %tmp1 to i64 129 %tmp3 = getelementptr inbounds i8, i8* %tmp, i64 1 130 %tmp4 = load i8, i8* %tmp3, align 1 131 %tmp5 = zext i8 %tmp4 to i64 132 %tmp6 = shl nuw nsw i64 %tmp5, 8 133 %tmp7 = or i64 %tmp6, %tmp2 134 %tmp8 = getelementptr inbounds i8, i8* %tmp, i64 2 135 %tmp9 = load i8, i8* %tmp8, align 1 136 %tmp10 = zext i8 %tmp9 to i64 137 %tmp11 = shl nuw nsw i64 %tmp10, 16 138 %tmp12 = or i64 %tmp7, %tmp11 139 %tmp13 = getelementptr inbounds i8, i8* %tmp, i64 3 140 %tmp14 = load i8, i8* %tmp13, align 1 141 %tmp15 = zext i8 %tmp14 to i64 142 %tmp16 = shl nuw nsw i64 %tmp15, 24 143 %tmp17 = or i64 %tmp12, %tmp16 144 %tmp18 = getelementptr inbounds i8, i8* %tmp, i64 4 145 %tmp19 = load i8, i8* %tmp18, align 1 146 %tmp20 = zext i8 %tmp19 to i64 147 %tmp21 = shl nuw nsw i64 %tmp20, 32 148 %tmp22 = or i64 %tmp17, %tmp21 149 %tmp23 = getelementptr inbounds i8, i8* %tmp, i64 5 150 %tmp24 = load i8, i8* %tmp23, align 1 151 %tmp25 = zext i8 %tmp24 to i64 152 %tmp26 = shl nuw nsw i64 %tmp25, 40 153 %tmp27 = or i64 %tmp22, %tmp26 154 %tmp28 = getelementptr inbounds i8, i8* %tmp, i64 6 155 %tmp29 = load i8, i8* %tmp28, align 1 156 %tmp30 = zext i8 %tmp29 to i64 157 %tmp31 = shl nuw nsw i64 %tmp30, 48 158 %tmp32 = or i64 %tmp27, %tmp31 159 %tmp33 = getelementptr inbounds i8, i8* %tmp, i64 7 160 %tmp34 = load i8, i8* %tmp33, align 1 161 %tmp35 = zext i8 %tmp34 to i64 162 %tmp36 = shl nuw i64 %tmp35, 56 163 %tmp37 = or i64 %tmp32, %tmp36 164 ret i64 %tmp37 165} 166 167; i8* p; // p is 8 byte aligned 168; ((i64) p[0] << 56) | ((i64) p[1] << 48) | ((i64) p[2] << 40) | ((i64) p[3] << 32) | ((i64) p[4] << 24) | ((i64) p[5] << 16) | ((i64) p[6] << 8) | (i64) p[7] 169define i64 @load_i64_by_i8_bswap(i64* %arg) { 170; CHECK-LABEL: load_i64_by_i8_bswap: 171; CHECK: ldr{{.*}}r0 172; CHECK: ldr{{.*}}r0 173; CHECK: and 174; CHECK-NEXT: and 175; CHECK-NEXT: orr 176; CHECK-NEXT: orr 177; CHECK-NEXT: and 178; CHECK-NEXT: orr 179; CHECK-NEXT: and 180; CHECK-NEXT: orr 181; CHECK-NEXT: orr 182; CHECK-NEXT: orr 183; CHECK: mov pc, lr 184 185; CHECK-ARMv6-LABEL: load_i64_by_i8_bswap: 186; CHECK-ARMv6: ldrd r2, r3, [r0] 187; CHECK-ARMv6: rev r0, r3 188; CHECK-ARMv6: rev r1, r2 189; CHECK-ARMv6: bx lr 190 %tmp = bitcast i64* %arg to i8* 191 %tmp1 = load i8, i8* %tmp, align 8 192 %tmp2 = zext i8 %tmp1 to i64 193 %tmp3 = shl nuw i64 %tmp2, 56 194 %tmp4 = getelementptr inbounds i8, i8* %tmp, i64 1 195 %tmp5 = load i8, i8* %tmp4, align 1 196 %tmp6 = zext i8 %tmp5 to i64 197 %tmp7 = shl nuw nsw i64 %tmp6, 48 198 %tmp8 = or i64 %tmp7, %tmp3 199 %tmp9 = getelementptr inbounds i8, i8* %tmp, i64 2 200 %tmp10 = load i8, i8* %tmp9, align 1 201 %tmp11 = zext i8 %tmp10 to i64 202 %tmp12 = shl nuw nsw i64 %tmp11, 40 203 %tmp13 = or i64 %tmp8, %tmp12 204 %tmp14 = getelementptr inbounds i8, i8* %tmp, i64 3 205 %tmp15 = load i8, i8* %tmp14, align 1 206 %tmp16 = zext i8 %tmp15 to i64 207 %tmp17 = shl nuw nsw i64 %tmp16, 32 208 %tmp18 = or i64 %tmp13, %tmp17 209 %tmp19 = getelementptr inbounds i8, i8* %tmp, i64 4 210 %tmp20 = load i8, i8* %tmp19, align 1 211 %tmp21 = zext i8 %tmp20 to i64 212 %tmp22 = shl nuw nsw i64 %tmp21, 24 213 %tmp23 = or i64 %tmp18, %tmp22 214 %tmp24 = getelementptr inbounds i8, i8* %tmp, i64 5 215 %tmp25 = load i8, i8* %tmp24, align 1 216 %tmp26 = zext i8 %tmp25 to i64 217 %tmp27 = shl nuw nsw i64 %tmp26, 16 218 %tmp28 = or i64 %tmp23, %tmp27 219 %tmp29 = getelementptr inbounds i8, i8* %tmp, i64 6 220 %tmp30 = load i8, i8* %tmp29, align 1 221 %tmp31 = zext i8 %tmp30 to i64 222 %tmp32 = shl nuw nsw i64 %tmp31, 8 223 %tmp33 = or i64 %tmp28, %tmp32 224 %tmp34 = getelementptr inbounds i8, i8* %tmp, i64 7 225 %tmp35 = load i8, i8* %tmp34, align 1 226 %tmp36 = zext i8 %tmp35 to i64 227 %tmp37 = or i64 %tmp33, %tmp36 228 ret i64 %tmp37 229} 230