xref: /llvm-project/llvm/test/CodeGen/ARM/ldr_ext.ll (revision 36b74471c84f11626cbb33ecf5df78e5d3baac7e)
1; RUN: llvm-as < %s | llc -march=arm &&
2; RUN: llvm-as < %s | llc -march=arm | grep "ldrb"  | wc -l | grep 1 &&
3; RUN: llvm-as < %s | llc -march=arm | grep "ldrh"  | wc -l | grep 1 &&
4; RUN: llvm-as < %s | llc -march=arm | grep "ldrsb" | wc -l | grep 1 &&
5; RUN: llvm-as < %s | llc -march=arm | grep "ldrsh" | wc -l | grep 1 &&
6; RUN: llvm-as < %s | llc -march=arm -enable-thumb | grep "ldrb"  | wc -l | grep 1 &&
7; RUN: llvm-as < %s | llc -march=arm -enable-thumb | grep "ldrh"  | wc -l | grep 1 &&
8; RUN: llvm-as < %s | llc -march=arm -enable-thumb | grep "ldrsb" | wc -l | grep 1 &&
9; RUN: llvm-as < %s | llc -march=arm -enable-thumb | grep "ldrsh" | wc -l | grep 1
10
11define i32 %test1(i8* %v.pntr.s0.u1) {
12    %tmp.u = load i8* %v.pntr.s0.u1
13    %tmp1.s = zext i8 %tmp.u to i32
14    ret i32 %tmp1.s
15}
16
17define i32 %test2(i16* %v.pntr.s0.u1) {
18    %tmp.u = load i16* %v.pntr.s0.u1
19    %tmp1.s = zext i16 %tmp.u to i32
20    ret i32 %tmp1.s
21}
22
23define i32 %test3(i8* %v.pntr.s1.u0) {
24    %tmp.s = load i8* %v.pntr.s1.u0
25    %tmp1.s = sext i8 %tmp.s to i32
26    ret i32 %tmp1.s
27}
28
29define i32 %test4() {
30    %tmp.s = load i16* null
31    %tmp1.s = sext i16 %tmp.s to i32
32    ret i32 %tmp1.s
33}
34