xref: /llvm-project/llvm/test/CodeGen/ARM/inlineasm3.ll (revision 1e3e8933edf5ed7a027003ff3fcbe1c93dee2cc8)
1; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
2
3; Radar 7449043
4%struct.int32x4_t = type { <4 x i32> }
5
6define void @t() nounwind {
7entry:
8; CHECK: vmov.I64 q15, #0
9; CHECK: vmov.32 d30[0],
10; CHECK: vmov q8, q15
11  %tmp = alloca %struct.int32x4_t, align 16
12  call void asm sideeffect "vmov.I64 q15, #0\0Avmov.32 d30[0], $1\0Avmov ${0:q}, q15\0A", "=*w,r,~{d31},~{d30}"(%struct.int32x4_t* %tmp, i32 8192) nounwind
13  ret void
14}
15
16; Radar 7457110
17%struct.int32x2_t = type { <4 x i32> }
18
19define void @t2() nounwind {
20entry:
21; CHECK: vmov d30, d16
22; CHECK: vmov.32 r0, d30[0]
23  %asmtmp2 = tail call i32 asm sideeffect "vmov d30, $1\0Avmov.32 $0, d30[0]\0A", "=r,w,~{d30}"(<2 x i32> undef) nounwind
24  ret void
25}
26
27; Radar 9306086
28
29%0 = type { <8 x i8>, <16 x i8>* }
30
31define hidden void @conv4_8_E() nounwind {
32entry:
33%asmtmp31 = call %0 asm "vld1.u8  {$0}, [$1, :128]!\0A", "=w,=r,1"(<16 x i8>* undef) nounwind
34unreachable
35}
36
37; Radar 9037836 & 9119939
38
39define i32 @t3() nounwind {
40entry:
41tail call void asm sideeffect "flds s15, $0 \0A", "^Uv|m,~{s15}"(float 1.000000e+00) nounwind
42ret i32 0
43}
44
45; Radar 9037836 & 9119939
46
47@k.2126 = internal unnamed_addr global float 1.000000e+00
48define i32 @t4() nounwind {
49entry:
50call void asm sideeffect "flds s15, $0 \0A", "*^Uv,~{s15}"(float* @k.2126) nounwind
51ret i32 0
52}
53
54; Radar 9037836 & 9119939
55
56define i32 @t5() nounwind {
57entry:
58call void asm sideeffect "flds s15, $0 \0A", "*^Uvm,~{s15}"(float* @k.2126) nounwind
59ret i32 0
60}
61