xref: /llvm-project/llvm/test/CodeGen/ARM/fpconv.ll (revision c8054d90fbe7ff386577c27dd51d597924036cde) 
1; RUN: llc < %s -march=arm -mattr=+vfp2 > %t
2; RUN: grep fcvtsd %t
3; RUN: grep fcvtds %t
4; RUN: grep ftosizs %t
5; RUN: grep ftouizs %t
6; RUN: grep ftosizd %t
7; RUN: grep ftouizd %t
8; RUN: grep fsitos %t
9; RUN: grep fsitod %t
10; RUN: grep fuitos %t
11; RUN: grep fuitod %t
12; RUN: llc < %s -march=arm > %t
13; RUN: grep truncdfsf2 %t
14; RUN: grep extendsfdf2 %t
15; RUN: grep fixsfsi %t
16; RUN: grep fixunssfsi %t
17; RUN: grep fixdfsi %t
18; RUN: grep fixunsdfsi %t
19; RUN: grep floatsisf %t
20; RUN: grep floatsidf %t
21; RUN: grep floatunsisf %t
22; RUN: grep floatunsidf %t
23
24define float @f1(double %x) {
25entry:
26	%tmp1 = fptrunc double %x to float		; <float> [#uses=1]
27	ret float %tmp1
28}
29
30define double @f2(float %x) {
31entry:
32	%tmp1 = fpext float %x to double		; <double> [#uses=1]
33	ret double %tmp1
34}
35
36define i32 @f3(float %x) {
37entry:
38	%tmp = fptosi float %x to i32		; <i32> [#uses=1]
39	ret i32 %tmp
40}
41
42define i32 @f4(float %x) {
43entry:
44	%tmp = fptoui float %x to i32		; <i32> [#uses=1]
45	ret i32 %tmp
46}
47
48define i32 @f5(double %x) {
49entry:
50	%tmp = fptosi double %x to i32		; <i32> [#uses=1]
51	ret i32 %tmp
52}
53
54define i32 @f6(double %x) {
55entry:
56	%tmp = fptoui double %x to i32		; <i32> [#uses=1]
57	ret i32 %tmp
58}
59
60define float @f7(i32 %a) {
61entry:
62	%tmp = sitofp i32 %a to float		; <float> [#uses=1]
63	ret float %tmp
64}
65
66define double @f8(i32 %a) {
67entry:
68	%tmp = sitofp i32 %a to double		; <double> [#uses=1]
69	ret double %tmp
70}
71
72define float @f9(i32 %a) {
73entry:
74	%tmp = uitofp i32 %a to float		; <float> [#uses=1]
75	ret float %tmp
76}
77
78define double @f10(i32 %a) {
79entry:
80	%tmp = uitofp i32 %a to double		; <double> [#uses=1]
81	ret double %tmp
82}
83