xref: /llvm-project/llvm/test/CodeGen/ARM/fpconv.ll (revision 0bd72c5ccdc645816ce8dfa355819571d787cdd4) 
1; RUN: llvm-as < %s | llc -march=arm -mattr=+vfp2 > %t
2; RUN: grep fcvtsd %t
3; RUN: grep fcvtds %t
4; RUN: grep ftosizs %t
5; RUN: grep ftouizs %t
6; RUN: grep ftosizd %t
7; RUN: grep ftouizd %t
8; RUN: grep fsitos %t
9; RUN: grep fsitod %t
10; RUN: grep fuitos %t
11; RUN: grep fuitod %t
12; RUN: llvm-as < %s | llc -march=arm > %t
13; RUN: grep truncdfsf2 %t
14; RUN: grep extendsfdf2 %t
15; RUN: grep fixsfsi %t
16; RUN: grep fixunssfsi %t
17; RUN: grep fixdfsi %t
18; RUN: grep fixunsdfsi %t
19; RUN: grep floatsisf %t
20; RUN: grep floatsidf %t
21; RUN: grep floatunsisf %t
22; RUN: grep floatunsidf %t
23; RUN: llvm-as < %s | llc -march=thumb
24
25define float @f1(double %x) {
26entry:
27	%tmp1 = fptrunc double %x to float		; <float> [#uses=1]
28	ret float %tmp1
29}
30
31define double @f2(float %x) {
32entry:
33	%tmp1 = fpext float %x to double		; <double> [#uses=1]
34	ret double %tmp1
35}
36
37define i32 @f3(float %x) {
38entry:
39	%tmp = fptosi float %x to i32		; <i32> [#uses=1]
40	ret i32 %tmp
41}
42
43define i32 @f4(float %x) {
44entry:
45	%tmp = fptoui float %x to i32		; <i32> [#uses=1]
46	ret i32 %tmp
47}
48
49define i32 @f5(double %x) {
50entry:
51	%tmp = fptosi double %x to i32		; <i32> [#uses=1]
52	ret i32 %tmp
53}
54
55define i32 @f6(double %x) {
56entry:
57	%tmp = fptoui double %x to i32		; <i32> [#uses=1]
58	ret i32 %tmp
59}
60
61define float @f7(i32 %a) {
62entry:
63	%tmp = sitofp i32 %a to float		; <float> [#uses=1]
64	ret float %tmp
65}
66
67define double @f8(i32 %a) {
68entry:
69	%tmp = sitofp i32 %a to double		; <double> [#uses=1]
70	ret double %tmp
71}
72
73define float @f9(i32 %a) {
74entry:
75	%tmp = uitofp i32 %a to float		; <float> [#uses=1]
76	ret float %tmp
77}
78
79define double @f10(i32 %a) {
80entry:
81	%tmp = uitofp i32 %a to double		; <double> [#uses=1]
82	ret double %tmp
83}
84