xref: /llvm-project/llvm/test/CodeGen/ARM/fpcmp-f64-neon-opt.ll (revision 6fb9c2ea702116381c430a221eaf00d1a2bb17b2)
1*6fb9c2eaSRenato Golin; RUN: llc -mtriple=linux-arm-gnueabihf -mattr=+neon %s -o - | FileCheck %s
2*6fb9c2eaSRenato Golin
3*6fb9c2eaSRenato Golin; Check that no intermediate integer register is used.
4*6fb9c2eaSRenato Golindefine i32 @no-intermediate-register-for-zero-imm(double %x) #0 {
5*6fb9c2eaSRenato Golinentry:
6*6fb9c2eaSRenato Golin; CHECK-LABEL: no-intermediate-register-for-zero-imm
7*6fb9c2eaSRenato Golin; CHECK-NOT: vmov
8*6fb9c2eaSRenato Golin; CHECK: vcmp
9*6fb9c2eaSRenato Golin  %cmp = fcmp une double %x, 0.000000e+00
10*6fb9c2eaSRenato Golin  %conv = zext i1 %cmp to i32
11*6fb9c2eaSRenato Golin  ret i32 %conv
12*6fb9c2eaSRenato Golin}
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