xref: /llvm-project/llvm/test/CodeGen/ARM/fp16-insert-extract.ll (revision 08da01b496481ea079b2e213f6e67ef1fd1c6f29) 
1; RUN: llc -mtriple=arm-eabi -mattr=+armv8.2-a,+fullfp16,+neon -float-abi=hard -O1 < %s | FileCheck %s
2; RUN: llc -mtriple=arm-eabi -mattr=+armv8.2-a,+fullfp16,+neon -float-abi=soft -O1 < %s | FileCheck %s
3
4define float @test_vget_lane_f16_1(<4 x half> %a) nounwind {
5; CHECK-LABEL: test_vget_lane_f16_1:
6; CHECK:      vmovx.f16 s0, s0
7; CHECK-NEXT: vcvtb.f32.f16 s0, s0
8entry:
9  %elt = extractelement <4 x half> %a, i32 1
10  %conv = fpext half %elt to float
11  ret float %conv
12}
13
14define float @test_vget_lane_f16_2(<4 x half> %a) nounwind {
15; CHECK-LABEL: test_vget_lane_f16_2:
16; CHECK-NOT:  vmovx.f16
17; CHECK:      vcvtb.f32.f16 s0, s1
18entry:
19  %elt = extractelement <4 x half> %a, i32 2
20  %conv = fpext half %elt to float
21  ret float %conv
22}
23
24define float @test_vget_laneq_f16_6(<8 x half> %a) nounwind {
25; CHECK-LABEL: test_vget_laneq_f16_6:
26; CHECK-NOT:  vmovx.f16
27; CHECK:      vcvtb.f32.f16 s0, s3
28entry:
29  %elt = extractelement <8 x half> %a, i32 6
30  %conv = fpext half %elt to float
31  ret float %conv
32}
33
34define float @test_vget_laneq_f16_7(<8 x half> %a) nounwind {
35; CHECK-LABEL: test_vget_laneq_f16_7:
36; CHECK:      vmovx.f16 s0, s3
37; CHECK:      vcvtb.f32.f16 s0, s0
38entry:
39  %elt = extractelement <8 x half> %a, i32 7
40  %conv = fpext half %elt to float
41  ret float %conv
42}
43
44define <4 x half> @test_vset_lane_f16(<4 x half> %a, float %fb) nounwind {
45; CHECK-LABEL: test_vset_lane_f16:
46; CHECK: vmov.f16 r[[GPR:[0-9]+]], s{{[0-9]+}}
47; CHECK: vmov.16  d{{[0-9]+}}[3], r[[GPR]]
48entry:
49  %b = fptrunc float %fb to half
50  %x = insertelement <4 x half> %a, half %b, i32 3
51  ret <4 x half> %x
52}
53
54define <8 x half> @test_vset_laneq_f16_1(<8 x half> %a, float %fb) nounwind {
55; CHECK-LABEL: test_vset_laneq_f16_1:
56; CHECK: vmov.f16 r[[GPR:[0-9]+]], s{{[0-9]+}}
57; CHECK: vmov.16  d{{[0-9]+}}[1], r[[GPR]]
58entry:
59  %b = fptrunc float %fb to half
60  %x = insertelement <8 x half> %a, half %b, i32 1
61  ret <8 x half> %x
62}
63
64define <8 x half> @test_vset_laneq_f16_7(<8 x half> %a, float %fb) nounwind {
65; CHECK-LABEL: test_vset_laneq_f16_7:
66; CHECK: vmov.f16 r[[GPR:[0-9]+]], s{{[0-9]+}}
67; CHECK: vmov.16  d{{[0-9]+}}[3], r[[GPR]]
68entry:
69  %b = fptrunc float %fb to half
70  %x = insertelement <8 x half> %a, half %b, i32 7
71  ret <8 x half> %x
72}
73