1; RUN: llc -fast-isel-sink-local-values < %s -O0 -verify-machineinstrs -fast-isel-abort=1 -relocation-model=dynamic-no-pic -mtriple=armv7-apple-ios | FileCheck %s --check-prefix=ARM 2; RUN: llc -fast-isel-sink-local-values < %s -O0 -verify-machineinstrs -fast-isel-abort=1 -relocation-model=dynamic-no-pic -mtriple=armv7-linux-gnueabi | FileCheck %s --check-prefix=ARM 3; RUN: llc -fast-isel-sink-local-values < %s -O0 -verify-machineinstrs -fast-isel-abort=1 -relocation-model=dynamic-no-pic -mtriple=thumbv7-apple-ios | FileCheck %s --check-prefix=THUMB 4; RUN: llc -fast-isel-sink-local-values < %s -O0 -fast-isel-abort=1 -relocation-model=dynamic-no-pic -mtriple=thumbv8-apple-ios | FileCheck %s --check-prefix=THUMB 5 6define i32 @t1(i1 %c) nounwind readnone { 7entry: 8; ARM: t1 9; ARM: tst r0, #1 10; ARM: movw r0, #10 11; ARM: moveq r0, #20 12; THUMB: t1 13; THUMB: tst.w r0, #1 14; THUMB: movw r0, #10 15; THUMB: it eq 16; THUMB: moveq r0, #20 17 %0 = select i1 %c, i32 10, i32 20 18 ret i32 %0 19} 20 21define i32 @t2(i1 %c, i32 %a) nounwind readnone { 22entry: 23; ARM: t2 24; ARM: tst r0, #1 25; ARM: moveq r{{[1-9]}}, #20 26; ARM: mov r0, r{{[1-9]}} 27; THUMB-LABEL: t2 28; THUMB: tst.w r0, #1 29; THUMB: it eq 30; THUMB: moveq r{{[1-9]}}, #20 31; THUMB: mov r0, r{{[1-9]}} 32 %0 = select i1 %c, i32 %a, i32 20 33 ret i32 %0 34} 35 36define i32 @t3(i1 %c, i32 %a, i32 %b) nounwind readnone { 37entry: 38; ARM: t3 39; ARM: tst r0, #1 40; ARM: movne r2, r1 41; ARM: add r0, r2, r1 42; THUMB: t3 43; THUMB: tst.w r0, #1 44; THUMB: it ne 45; THUMB: movne r2, r1 46; THUMB: add.w r0, r2, r1 47 %0 = select i1 %c, i32 %a, i32 %b 48 %1 = add i32 %0, %a 49 ret i32 %1 50} 51 52define i32 @t4(i1 %c) nounwind readnone { 53entry: 54; ARM: t4 55; ARM: tst r0, #1 56; ARM: mvn r0, #9 57; ARM: mvneq r0, #0 58; THUMB-LABEL: t4 59; THUMB: tst.w r0, #1 60; THUMB: mvn r0, #9 61; THUMB: it eq 62; THUMB: mvneq r0, #0 63 %0 = select i1 %c, i32 -10, i32 -1 64 ret i32 %0 65} 66 67define i32 @t5(i1 %c, i32 %a) nounwind readnone { 68entry: 69; ARM: t5 70; ARM: tst r0, #1 71; ARM: mvneq r{{[1-9]}}, #1 72; ARM: mov r0, r{{[1-9]}} 73; THUMB: t5 74; THUMB: tst.w r0, #1 75; THUMB: it eq 76; THUMB: mvneq r{{[1-9]}}, #1 77; THUMB: mov r0, r{{[1-9]}} 78 %0 = select i1 %c, i32 %a, i32 -2 79 ret i32 %0 80} 81 82; Check one large negative immediates. 83define i32 @t6(i1 %c, i32 %a) nounwind readnone { 84entry: 85; ARM: t6 86; ARM: tst r0, #1 87; ARM: mvneq r{{[1-9]}}, #978944 88; ARM: mov r0, r{{[1-9]}} 89; THUMB: t6 90; THUMB: tst.w r0, #1 91; THUMB: it eq 92; THUMB: mvneq r{{[1-9]}}, #978944 93; THUMB: mov r0, r{{[1-9]}} 94 %0 = select i1 %c, i32 %a, i32 -978945 95 ret i32 %0 96} 97