1; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=armv7-apple-ios | FileCheck %s --check-prefix=ARM 2; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=armv7-linux-gnueabi | FileCheck %s --check-prefix=ARM 3; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=thumbv7-apple-ios | FileCheck %s --check-prefix=THUMB 4 5define i32 @t1(i1 %c) nounwind readnone { 6entry: 7; ARM: t1 8; ARM: movw r{{[1-9]}}, #10 9; ARM: cmp r0, #0 10; ARM: moveq r{{[1-9]}}, #20 11; ARM: mov r0, r{{[1-9]}} 12; THUMB: t1 13; THUMB: movs r{{[1-9]}}, #10 14; THUMB: movt r{{[1-9]}}, #0 15; THUMB: cmp r0, #0 16; THUMB: it eq 17; THUMB: moveq r{{[1-9]}}, #20 18; THUMB: mov r0, r{{[1-9]}} 19 %0 = select i1 %c, i32 10, i32 20 20 ret i32 %0 21} 22 23define i32 @t2(i1 %c, i32 %a) nounwind readnone { 24entry: 25; ARM: t2 26; ARM: cmp r0, #0 27; ARM: moveq r{{[1-9]}}, #20 28; ARM: mov r0, r{{[1-9]}} 29; THUMB: t2 30; THUMB: cmp r0, #0 31; THUMB: it eq 32; THUMB: moveq r{{[1-9]}}, #20 33; THUMB: mov r0, r{{[1-9]}} 34 %0 = select i1 %c, i32 %a, i32 20 35 ret i32 %0 36} 37 38define i32 @t3(i1 %c, i32 %a, i32 %b) nounwind readnone { 39entry: 40; ARM: t3 41; ARM: cmp r0, #0 42; ARM: movne r{{[1-9]}}, r{{[1-9]}} 43; ARM: mov r0, r{{[1-9]}} 44; THUMB: t3 45; THUMB: cmp r0, #0 46; THUMB: it ne 47; THUMB: movne r{{[1-9]}}, r{{[1-9]}} 48; THUMB: mov r0, r{{[1-9]}} 49 %0 = select i1 %c, i32 %a, i32 %b 50 ret i32 %0 51} 52 53define i32 @t4(i1 %c) nounwind readnone { 54entry: 55; ARM: t4 56; ARM: mvn r{{[1-9]}}, #9 57; ARM: cmp r0, #0 58; ARM: mvneq r{{[1-9]}}, #0 59; ARM: mov r0, r{{[1-9]}} 60; THUMB: t4 61; THUMB: movw r{{[1-9]}}, #65526 62; THUMB: movt r{{[1-9]}}, #65535 63; THUMB: cmp r0, #0 64; THUMB: it eq 65; THUMB: mvneq r{{[1-9]}}, #0 66; THUMB: mov r0, r{{[1-9]}} 67 %0 = select i1 %c, i32 -10, i32 -1 68 ret i32 %0 69} 70 71define i32 @t5(i1 %c, i32 %a) nounwind readnone { 72entry: 73; ARM: t5 74; ARM: cmp r0, #0 75; ARM: mvneq r{{[1-9]}}, #1 76; ARM: mov r0, r{{[1-9]}} 77; THUMB: t5 78; THUMB: cmp r0, #0 79; THUMB: it eq 80; THUMB: mvneq r{{[1-9]}}, #1 81; THUMB: mov r0, r{{[1-9]}} 82 %0 = select i1 %c, i32 %a, i32 -2 83 ret i32 %0 84} 85 86; Check one large negative immediates. 87define i32 @t6(i1 %c, i32 %a) nounwind readnone { 88entry: 89; ARM: t6 90; ARM: cmp r0, #0 91; ARM: mvneq r{{[1-9]}}, #978944 92; ARM: mov r0, r{{[1-9]}} 93; THUMB: t6 94; THUMB: cmp r0, #0 95; THUMB: it eq 96; THUMB: mvneq r{{[1-9]}}, #978944 97; THUMB: mov r0, r{{[1-9]}} 98 %0 = select i1 %c, i32 %a, i32 -978945 99 ret i32 %0 100} 101