xref: /llvm-project/llvm/test/CodeGen/ARM/fast-isel-inline-asm.ll (revision ebd579ccae97c060a309a8a212281d46cf8538a1)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
2; RUN: llc -opaque-pointers=0 -fast-isel < %s | FileCheck %s
3target datalayout = "e-m:o-p:32:32-i1:8:32-i8:8:32-i16:16:32-f64:32:64-v64:32:64-v128:32:128-a:0:32-n32-S32"
4target triple = "thumbv7-apple-ios5.0.0"
5
6%0 = type opaque
7
8; Make sure that the inline asm starts right after the call to bar.
9define void @test_inline_asm_sideeffect(%0* %call) {
10; CHECK-LABEL: test_inline_asm_sideeffect:
11; CHECK:       @ %bb.0:
12; CHECK-NEXT:    push {r4, r7, lr}
13; CHECK-NEXT:    add r7, sp, #4
14; CHECK-NEXT:    mov r4, r0
15; CHECK-NEXT:    bl _bar
16; CHECK-NEXT:    @ InlineAsm Start
17; CHECK-NEXT:    mov r7, r7 @ marker
18; CHECK-NEXT:    @ InlineAsm End
19; CHECK-NEXT:    movw r0, :lower16:(L_foo$non_lazy_ptr-(LPC0_0+4))
20; CHECK-NEXT:    movt r0, :upper16:(L_foo$non_lazy_ptr-(LPC0_0+4))
21; CHECK-NEXT:  LPC0_0:
22; CHECK-NEXT:    add r0, pc
23; CHECK-NEXT:    ldr r1, [r0]
24; CHECK-NEXT:    mov r0, r4
25; CHECK-NEXT:    blx r1
26; CHECK-NEXT:    pop {r4, r7, pc}
27  call void @bar()
28  call void asm sideeffect "mov\09r7, r7\09\09@ marker", ""()
29  %1 = call %0* bitcast (i8* (i8*)* @foo to %0* (%0*)*)(%0* %call)
30  ret void
31}
32
33declare i8* @foo(i8*)
34declare void @bar()
35