1; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=armv7-apple-darwin | FileCheck %s --check-prefix=ARM 2; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=armv7-linux-gnueabi | FileCheck %s --check-prefix=ARM 3; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=thumbv7-apple-darwin | FileCheck %s --check-prefix=THUMB 4 5@a = global i8 1, align 1 6@b = global i16 2, align 2 7 8define void @t1() nounwind uwtable ssp { 9; ARM: t1 10; ARM: ldrb 11; ARM-NOT: uxtb 12; THUMB: t1 13; THUMB: ldrb 14; THUMB-NOT: uxtb 15 %1 = load i8* @a, align 1 16 call void @foo1(i8 zeroext %1) 17 ret void 18} 19 20define void @t2() nounwind uwtable ssp { 21; ARM: t2 22; ARM: ldrh 23; ARM-NOT: uxth 24; THUMB: t2 25; THUMB: ldrh 26; THUMB-NOT: uxth 27 %1 = load i16* @b, align 2 28 call void @foo2(i16 zeroext %1) 29 ret void 30} 31 32declare void @foo1(i8 zeroext) 33declare void @foo2(i16 zeroext) 34 35define i32 @t3() nounwind uwtable ssp { 36; ARM: t3 37; ARM: ldrb 38; ARM-NOT: uxtb 39; THUMB: t3 40; THUMB: ldrb 41; THUMB-NOT: uxtb 42 %1 = load i8* @a, align 1 43 %2 = zext i8 %1 to i32 44 ret i32 %2 45} 46 47define i32 @t4() nounwind uwtable ssp { 48; ARM: t4 49; ARM: ldrh 50; ARM-NOT: uxth 51; THUMB: t4 52; THUMB: ldrh 53; THUMB-NOT: uxth 54 %1 = load i16* @b, align 2 55 %2 = zext i16 %1 to i32 56 ret i32 %2 57} 58 59define i32 @t5() nounwind uwtable ssp { 60; ARM: t5 61; ARM: ldrsh 62; ARM-NOT: sxth 63; THUMB: t5 64; THUMB: ldrsh 65; THUMB-NOT: sxth 66 %1 = load i16* @b, align 2 67 %2 = sext i16 %1 to i32 68 ret i32 %2 69} 70 71define i32 @t6() nounwind uwtable ssp { 72; ARM: t6 73; ARM: ldrsb 74; ARM-NOT: sxtb 75; THUMB: t6 76; THUMB: ldrsb 77; THUMB-NOT: sxtb 78 %1 = load i8* @a, align 2 79 %2 = sext i8 %1 to i32 80 ret i32 %2 81} 82