xref: /llvm-project/llvm/test/CodeGen/ARM/fast-isel-call-multi-reg-return.ll (revision 945a660cbc928a451b2a3114104c2b55e63c7bac)
1*945a660cSMehdi Amini; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort=1 -relocation-model=dynamic-no-pic -mtriple=armv7-apple-ios | FileCheck %s --check-prefix=ARM
2*945a660cSMehdi Amini; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort=1 -relocation-model=dynamic-no-pic -mtriple=armv7-linux-gnueabi | FileCheck %s --check-prefix=ARM
3*945a660cSMehdi Amini; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort=1 -relocation-model=dynamic-no-pic -mtriple=thumbv7-apple-ios | FileCheck %s --check-prefix=THUMB
490f9afe6SChad Rosier
590f9afe6SChad Rosier; Fast-isel can't handle non-double multi-reg retvals.
690f9afe6SChad Rosier; This test just check to make sure we don't hit the assert in FinishCall.
790f9afe6SChad Rosierdefine <16 x i8> @foo() nounwind ssp {
890f9afe6SChad Rosierentry:
990f9afe6SChad Rosier  ret <16 x i8> zeroinitializer
1090f9afe6SChad Rosier}
1190f9afe6SChad Rosier
1290f9afe6SChad Rosierdefine void @t1() nounwind ssp {
1390f9afe6SChad Rosierentry:
1490f9afe6SChad Rosier; ARM: @t1
1590f9afe6SChad Rosier; THUMB: @t1
1690f9afe6SChad Rosier  %call = call <16 x i8> @foo()
1790f9afe6SChad Rosier  ret void
1890f9afe6SChad Rosier}
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